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([152.115.213.158]) by smtp.gmail.com with ESMTPSA id tm6-20020a170907c38600b00a1db955c809sm10789122ejc.73.2023.12.15.06.39.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Dec 2023 06:39:17 -0800 (PST) From: Emil Renner Berthing To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Cc: Hoan Tran , Serge Semin , Linus Walleij , Bartosz Golaszewski , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jisheng Zhang , Guo Ren , Fu Wei , Paul Walmsley , Palmer Dabbelt Subject: [PATCH v1 7/8] riscv: dts: thead: Add TH1520 pinctrl settings for UART0 Date: Fri, 15 Dec 2023 15:39:05 +0100 Message-Id: <20231215143906.3651122-8-emil.renner.berthing@canonical.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20231215143906.3651122-1-emil.renner.berthing@canonical.com> References: <20231215143906.3651122-1-emil.renner.berthing@canonical.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add pinctrl settings for UART0 used as the default debug console on both the Lichee Pi 4A and BeagleV Ahead boards. Signed-off-by: Emil Renner Berthing --- .../boot/dts/thead/th1520-beaglev-ahead.dts | 26 +++++++++++++++++++ .../boot/dts/thead/th1520-lichee-pi-4a.dts | 26 +++++++++++++++++++ 2 files changed, 52 insertions(+) diff --git a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts b/arch/risc= v/boot/dts/thead/th1520-beaglev-ahead.dts index 91ba96588ae8..54d86aab6656 100644 --- a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts +++ b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts @@ -58,6 +58,32 @@ &dmac0 { status =3D "okay"; }; =20 +&padctrl0_apsys { + uart0_pins: uart0-0 { + tx-pins { + pins =3D "UART0_TXD"; + function =3D "0"; + bias-disable; + drive-strength =3D <3>; + input-disable; + input-schmitt-disable; + slew-rate =3D <0>; + }; + + rx-pins { + pins =3D "UART0_RXD"; + function =3D "0"; + bias-disable; + drive-strength =3D <1>; + input-enable; + input-schmitt-enable; + slew-rate =3D <0>; + }; + }; +}; + &uart0 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&uart0_pins>; status =3D "okay"; }; diff --git a/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts b/arch/riscv= /boot/dts/thead/th1520-lichee-pi-4a.dts index 0ae2c20d5641..260aa5e0769f 100644 --- a/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts +++ b/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts @@ -29,6 +29,32 @@ chosen { }; }; =20 +&padctrl0_apsys { + uart0_pins: uart0-0 { + tx-pins { + pins =3D "UART0_TXD"; + function =3D "0"; + bias-disable; + drive-strength =3D <3>; + input-disable; + input-schmitt-disable; + slew-rate =3D <0>; + }; + + rx-pins { + pins =3D "UART0_RXD"; + function =3D "0"; + bias-disable; + drive-strength =3D <1>; + input-enable; + input-schmitt-enable; + slew-rate =3D <0>; + }; + }; +}; + &uart0 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&uart0_pins>; status =3D "okay"; }; --=20 2.40.1