From nobody Sun Dec 28 00:57:32 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DE6EBC19774 for ; Wed, 13 Dec 2023 19:53:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1442263AbjLMTwy (ORCPT ); Wed, 13 Dec 2023 14:52:54 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34248 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233846AbjLMTwk (ORCPT ); Wed, 13 Dec 2023 14:52:40 -0500 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B2A0C1997; Wed, 13 Dec 2023 11:52:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1702497128; x=1734033128; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=SpAuD5FfbNjLNWDRd+6avwBRAD+LlWp7sWQNhiI/U6I=; b=XRgo6F3eZvEfqu6+yCMY5oxVj4y3BNq/yOipTFljulVgjDN8oGfcoEE5 YYgW/lyHZ9Rt1dR79aEZoBlrREaFWytIEKWhAM44ZKKIAdvB8aWVHgaLR mWOTiIRSAmSty7bsRBjnu6aPq3oknALh7F/zjyyJrFXAT9e6s8OG8v91h 8a/FAKMvmRs8ycTQuu16fcO7iYXLn1aIGKZQ4kL/lWbLyr9p/rfPxmYkb XKloEzkjTjcShoXS2rchnCW3Pz/f3mS6bNUCnG8fsBDmWDuK7rsTI38Z4 no+edYAMI6nW3mGjNG+fUL1b9fI6/lEAHRKePLx7k0MvZXLdO/qwrggId w==; X-IronPort-AV: E=McAfee;i="6600,9927,10923"; a="8412884" X-IronPort-AV: E=Sophos;i="6.04,273,1695711600"; d="scan'208";a="8412884" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Dec 2023 11:52:06 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10923"; a="917772552" X-IronPort-AV: E=Sophos;i="6.04,273,1695711600"; d="scan'208";a="917772552" Received: from kanliang-dev.jf.intel.com ([10.165.154.102]) by fmsmga001.fm.intel.com with ESMTP; 13 Dec 2023 11:52:05 -0800 From: kan.liang@linux.intel.com To: acme@kernel.org, irogers@google.com, peterz@infradead.org, mingo@redhat.com, namhyung@kernel.org, jolsa@kernel.org, adrian.hunter@intel.com, john.g.garry@oracle.com, will@kernel.org, james.clark@arm.com, mike.leach@linaro.org, leo.yan@linaro.org, yuhaixin.yhx@linux.alibaba.com, renyu.zj@linux.alibaba.com, tmricht@linux.ibm.com, ravi.bangoria@amd.com, atrajeev@linux.vnet.ibm.com, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Kan Liang Subject: [PATCH V3 1/7] perf mem: Add mem_events into the supported perf_pmu Date: Wed, 13 Dec 2023 11:51:48 -0800 Message-Id: <20231213195154.1085945-2-kan.liang@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20231213195154.1085945-1-kan.liang@linux.intel.com> References: <20231213195154.1085945-1-kan.liang@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Kan Liang With the mem_events, perf doesn't need to read sysfs for each PMU to find the mem-events-supported PMU. The patch also makes it possible to clean up the related __weak functions later. The patch is only to add the mem_events into the perf_pmu for all ARCHs. It will be used in the later cleanup patches. Reviewed-by: Ian Rogers Tested-by: Ravi Bangoria Suggested-by: Leo Yan Signed-off-by: Kan Liang Reviewed-by: Kajol Jain Reviewed-by: Leo Yan Tested-by: Kajol Jain Tested-by: Leo Yan --- tools/perf/arch/arm/util/pmu.c | 3 +++ tools/perf/arch/arm64/util/mem-events.c | 7 ++++--- tools/perf/arch/arm64/util/mem-events.h | 7 +++++++ tools/perf/arch/s390/util/pmu.c | 3 +++ tools/perf/arch/x86/util/mem-events.c | 4 ++-- tools/perf/arch/x86/util/mem-events.h | 9 +++++++++ tools/perf/arch/x86/util/pmu.c | 7 +++++++ tools/perf/util/mem-events.c | 2 +- tools/perf/util/mem-events.h | 1 + tools/perf/util/pmu.c | 4 +++- tools/perf/util/pmu.h | 7 +++++++ 11 files changed, 47 insertions(+), 7 deletions(-) create mode 100644 tools/perf/arch/arm64/util/mem-events.h create mode 100644 tools/perf/arch/x86/util/mem-events.h diff --git a/tools/perf/arch/arm/util/pmu.c b/tools/perf/arch/arm/util/pmu.c index 7f3af3b97f3b..8b7cb68ba1a8 100644 --- a/tools/perf/arch/arm/util/pmu.c +++ b/tools/perf/arch/arm/util/pmu.c @@ -13,6 +13,7 @@ #include "hisi-ptt.h" #include "../../../util/pmu.h" #include "../../../util/cs-etm.h" +#include "../../arm64/util/mem-events.h" =20 void perf_pmu__arch_init(struct perf_pmu *pmu __maybe_unused) { @@ -26,6 +27,8 @@ void perf_pmu__arch_init(struct perf_pmu *pmu __maybe_unu= sed) pmu->selectable =3D true; pmu->is_uncore =3D false; pmu->perf_event_attr_init_default =3D arm_spe_pmu_default_config; + if (!strcmp(pmu->name, "arm_spe_0")) + pmu->mem_events =3D perf_mem_events_arm; } else if (strstarts(pmu->name, HISI_PTT_PMU_NAME)) { pmu->selectable =3D true; #endif diff --git a/tools/perf/arch/arm64/util/mem-events.c b/tools/perf/arch/arm6= 4/util/mem-events.c index 3bcc5c7035c2..edf8207f7812 100644 --- a/tools/perf/arch/arm64/util/mem-events.c +++ b/tools/perf/arch/arm64/util/mem-events.c @@ -1,10 +1,11 @@ // SPDX-License-Identifier: GPL-2.0 -#include "map_symbol.h" +#include "util/map_symbol.h" +#include "util/mem-events.h" #include "mem-events.h" =20 #define E(t, n, s) { .tag =3D t, .name =3D n, .sysfs_name =3D s } =20 -static struct perf_mem_event perf_mem_events[PERF_MEM_EVENTS__MAX] =3D { +struct perf_mem_event perf_mem_events_arm[PERF_MEM_EVENTS__MAX] =3D { E("spe-load", "arm_spe_0/ts_enable=3D1,pa_enable=3D1,load_filter=3D1,stor= e_filter=3D0,min_latency=3D%u/", "arm_spe_0"), E("spe-store", "arm_spe_0/ts_enable=3D1,pa_enable=3D1,load_filter=3D0,sto= re_filter=3D1/", "arm_spe_0"), E("spe-ldst", "arm_spe_0/ts_enable=3D1,pa_enable=3D1,load_filter=3D1,stor= e_filter=3D1,min_latency=3D%u/", "arm_spe_0"), @@ -17,7 +18,7 @@ struct perf_mem_event *perf_mem_events__ptr(int i) if (i >=3D PERF_MEM_EVENTS__MAX) return NULL; =20 - return &perf_mem_events[i]; + return &perf_mem_events_arm[i]; } =20 const char *perf_mem_events__name(int i, const char *pmu_name __maybe_unus= ed) diff --git a/tools/perf/arch/arm64/util/mem-events.h b/tools/perf/arch/arm6= 4/util/mem-events.h new file mode 100644 index 000000000000..5fc50be4be38 --- /dev/null +++ b/tools/perf/arch/arm64/util/mem-events.h @@ -0,0 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef _ARM64_MEM_EVENTS_H +#define _ARM64_MEM_EVENTS_H + +extern struct perf_mem_event perf_mem_events_arm[PERF_MEM_EVENTS__MAX]; + +#endif /* _ARM64_MEM_EVENTS_H */ diff --git a/tools/perf/arch/s390/util/pmu.c b/tools/perf/arch/s390/util/pm= u.c index 886c30e001fa..225d7dc2379c 100644 --- a/tools/perf/arch/s390/util/pmu.c +++ b/tools/perf/arch/s390/util/pmu.c @@ -19,4 +19,7 @@ void perf_pmu__arch_init(struct perf_pmu *pmu) !strcmp(pmu->name, S390_PMUPAI_EXT) || !strcmp(pmu->name, S390_PMUCPUM_CF)) pmu->selectable =3D true; + + if (pmu->is_core) + pmu->mem_events =3D perf_mem_events; } diff --git a/tools/perf/arch/x86/util/mem-events.c b/tools/perf/arch/x86/ut= il/mem-events.c index 191b372f9a2d..2b81d229982c 100644 --- a/tools/perf/arch/x86/util/mem-events.c +++ b/tools/perf/arch/x86/util/mem-events.c @@ -16,13 +16,13 @@ static char mem_stores_name[100]; =20 #define E(t, n, s) { .tag =3D t, .name =3D n, .sysfs_name =3D s } =20 -static struct perf_mem_event perf_mem_events_intel[PERF_MEM_EVENTS__MAX] = =3D { +struct perf_mem_event perf_mem_events_intel[PERF_MEM_EVENTS__MAX] =3D { E("ldlat-loads", "%s/mem-loads,ldlat=3D%u/P", "%s/events/mem-loads"), E("ldlat-stores", "%s/mem-stores/P", "%s/events/mem-stores"), E(NULL, NULL, NULL), }; =20 -static struct perf_mem_event perf_mem_events_amd[PERF_MEM_EVENTS__MAX] =3D= { +struct perf_mem_event perf_mem_events_amd[PERF_MEM_EVENTS__MAX] =3D { E(NULL, NULL, NULL), E(NULL, NULL, NULL), E("mem-ldst", "ibs_op//", "ibs_op"), diff --git a/tools/perf/arch/x86/util/mem-events.h b/tools/perf/arch/x86/ut= il/mem-events.h new file mode 100644 index 000000000000..3959e427f482 --- /dev/null +++ b/tools/perf/arch/x86/util/mem-events.h @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef _X86_MEM_EVENTS_H +#define _X86_MEM_EVENTS_H + +extern struct perf_mem_event perf_mem_events_intel[PERF_MEM_EVENTS__MAX]; + +extern struct perf_mem_event perf_mem_events_amd[PERF_MEM_EVENTS__MAX]; + +#endif /* _X86_MEM_EVENTS_H */ diff --git a/tools/perf/arch/x86/util/pmu.c b/tools/perf/arch/x86/util/pmu.c index 469555ae9b3c..cd22e80e5657 100644 --- a/tools/perf/arch/x86/util/pmu.c +++ b/tools/perf/arch/x86/util/pmu.c @@ -15,6 +15,7 @@ #include "../../../util/pmu.h" #include "../../../util/fncache.h" #include "../../../util/pmus.h" +#include "mem-events.h" #include "env.h" =20 void perf_pmu__arch_init(struct perf_pmu *pmu __maybe_unused) @@ -30,6 +31,12 @@ void perf_pmu__arch_init(struct perf_pmu *pmu __maybe_un= used) pmu->selectable =3D true; } #endif + + if (x86__is_amd_cpu()) { + if (!strcmp(pmu->name, "ibs_op")) + pmu->mem_events =3D perf_mem_events_amd; + } else if (pmu->is_core) + pmu->mem_events =3D perf_mem_events_intel; } =20 int perf_pmus__num_mem_pmus(void) diff --git a/tools/perf/util/mem-events.c b/tools/perf/util/mem-events.c index 3a2e3687878c..0a8f415f5efe 100644 --- a/tools/perf/util/mem-events.c +++ b/tools/perf/util/mem-events.c @@ -19,7 +19,7 @@ unsigned int perf_mem_events__loads_ldlat =3D 30; =20 #define E(t, n, s) { .tag =3D t, .name =3D n, .sysfs_name =3D s } =20 -static struct perf_mem_event perf_mem_events[PERF_MEM_EVENTS__MAX] =3D { +struct perf_mem_event perf_mem_events[PERF_MEM_EVENTS__MAX] =3D { E("ldlat-loads", "cpu/mem-loads,ldlat=3D%u/P", "cpu/events/mem-loads"), E("ldlat-stores", "cpu/mem-stores/P", "cpu/events/mem-stores"), E(NULL, NULL, NULL), diff --git a/tools/perf/util/mem-events.h b/tools/perf/util/mem-events.h index b40ad6ea93fc..8c5694b2d0b0 100644 --- a/tools/perf/util/mem-events.h +++ b/tools/perf/util/mem-events.h @@ -34,6 +34,7 @@ enum { }; =20 extern unsigned int perf_mem_events__loads_ldlat; +extern struct perf_mem_event perf_mem_events[PERF_MEM_EVENTS__MAX]; =20 int perf_mem_events__parse(const char *str); int perf_mem_events__init(void); diff --git a/tools/perf/util/pmu.c b/tools/perf/util/pmu.c index 3c9609944a2f..3d4373b8ab63 100644 --- a/tools/perf/util/pmu.c +++ b/tools/perf/util/pmu.c @@ -986,8 +986,10 @@ static int pmu_max_precise(int dirfd, struct perf_pmu = *pmu) } =20 void __weak -perf_pmu__arch_init(struct perf_pmu *pmu __maybe_unused) +perf_pmu__arch_init(struct perf_pmu *pmu) { + if (pmu->is_core) + pmu->mem_events =3D perf_mem_events; } =20 struct perf_pmu *perf_pmu__lookup(struct list_head *pmus, int dirfd, const= char *name) diff --git a/tools/perf/util/pmu.h b/tools/perf/util/pmu.h index 424c3fee0949..e35d985206db 100644 --- a/tools/perf/util/pmu.h +++ b/tools/perf/util/pmu.h @@ -10,6 +10,8 @@ #include #include "parse-events.h" #include "pmu-events/pmu-events.h" +#include "map_symbol.h" +#include "mem-events.h" =20 struct evsel_config_term; struct perf_cpu_map; @@ -162,6 +164,11 @@ struct perf_pmu { */ bool exclude_guest; } missing_features; + + /** + * @mem_events: List of the supported mem events + */ + struct perf_mem_event *mem_events; }; =20 /** @perf_pmu__fake: A special global PMU used for testing. */ --=20 2.35.1 From nobody Sun Dec 28 00:57:32 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 85F3DC4332F for ; Wed, 13 Dec 2023 19:53:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1442467AbjLMTxA (ORCPT ); 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X-IronPort-AV: E=McAfee;i="6600,9927,10923"; a="8412897" X-IronPort-AV: E=Sophos;i="6.04,273,1695711600"; d="scan'208";a="8412897" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Dec 2023 11:52:06 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10923"; a="917772560" X-IronPort-AV: E=Sophos;i="6.04,273,1695711600"; d="scan'208";a="917772560" Received: from kanliang-dev.jf.intel.com ([10.165.154.102]) by fmsmga001.fm.intel.com with ESMTP; 13 Dec 2023 11:52:05 -0800 From: kan.liang@linux.intel.com To: acme@kernel.org, irogers@google.com, peterz@infradead.org, mingo@redhat.com, namhyung@kernel.org, jolsa@kernel.org, adrian.hunter@intel.com, john.g.garry@oracle.com, will@kernel.org, james.clark@arm.com, mike.leach@linaro.org, leo.yan@linaro.org, yuhaixin.yhx@linux.alibaba.com, renyu.zj@linux.alibaba.com, tmricht@linux.ibm.com, ravi.bangoria@amd.com, atrajeev@linux.vnet.ibm.com, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Kan Liang Subject: [PATCH V3 2/7] perf mem: Clean up perf_mem_events__ptr() Date: Wed, 13 Dec 2023 11:51:49 -0800 Message-Id: <20231213195154.1085945-3-kan.liang@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20231213195154.1085945-1-kan.liang@linux.intel.com> References: <20231213195154.1085945-1-kan.liang@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Kan Liang The mem_events can be retrieved from the struct perf_pmu now. An ARCH specific perf_mem_events__ptr() is not required anymore. Remove all of them. The Intel hybrid has multiple mem-events-supported PMUs. But they share the same mem_events. Other ARCHs only support one mem-events-supported PMU. In the configuration, it's good enough to only configure the mem_events for one PMU. Add perf_mem_events_find_pmu() which returns the first mem-events-supported PMU. In the perf_mem_events__init(), the perf_pmus__scan() is not required anymore. It avoids checking the sysfs for every PMU on the system. Make the perf_mem_events__record_args() more generic. Remove the perf_mem_events__print_unsupport_hybrid(). Since pmu is added as a new parameter, rename perf_mem_events__ptr() to perf_pmu__mem_events_ptr(). Several other functions also do a similar rename. Reviewed-by: Ian Rogers Tested-by: Ravi Bangoria Signed-off-by: Kan Liang Reviewed-by: Leo Yan Tested-by: Kajol jain Tested-by: Leo Yan --- tools/perf/arch/arm64/util/mem-events.c | 10 +-- tools/perf/arch/x86/util/mem-events.c | 18 ++--- tools/perf/builtin-c2c.c | 28 +++++-- tools/perf/builtin-mem.c | 28 +++++-- tools/perf/util/mem-events.c | 103 ++++++++++++------------ tools/perf/util/mem-events.h | 9 ++- 6 files changed, 104 insertions(+), 92 deletions(-) diff --git a/tools/perf/arch/arm64/util/mem-events.c b/tools/perf/arch/arm6= 4/util/mem-events.c index edf8207f7812..d3e69a520c2b 100644 --- a/tools/perf/arch/arm64/util/mem-events.c +++ b/tools/perf/arch/arm64/util/mem-events.c @@ -13,17 +13,9 @@ struct perf_mem_event perf_mem_events_arm[PERF_MEM_EVENT= S__MAX] =3D { =20 static char mem_ev_name[100]; =20 -struct perf_mem_event *perf_mem_events__ptr(int i) -{ - if (i >=3D PERF_MEM_EVENTS__MAX) - return NULL; - - return &perf_mem_events_arm[i]; -} - const char *perf_mem_events__name(int i, const char *pmu_name __maybe_unus= ed) { - struct perf_mem_event *e =3D perf_mem_events__ptr(i); + struct perf_mem_event *e =3D &perf_mem_events_arm[i]; =20 if (i >=3D PERF_MEM_EVENTS__MAX) return NULL; diff --git a/tools/perf/arch/x86/util/mem-events.c b/tools/perf/arch/x86/ut= il/mem-events.c index 2b81d229982c..5fb41d50118d 100644 --- a/tools/perf/arch/x86/util/mem-events.c +++ b/tools/perf/arch/x86/util/mem-events.c @@ -28,17 +28,6 @@ struct perf_mem_event perf_mem_events_amd[PERF_MEM_EVENT= S__MAX] =3D { E("mem-ldst", "ibs_op//", "ibs_op"), }; =20 -struct perf_mem_event *perf_mem_events__ptr(int i) -{ - if (i >=3D PERF_MEM_EVENTS__MAX) - return NULL; - - if (x86__is_amd_cpu()) - return &perf_mem_events_amd[i]; - - return &perf_mem_events_intel[i]; -} - bool is_mem_loads_aux_event(struct evsel *leader) { struct perf_pmu *pmu =3D perf_pmus__find("cpu"); @@ -54,7 +43,12 @@ bool is_mem_loads_aux_event(struct evsel *leader) =20 const char *perf_mem_events__name(int i, const char *pmu_name) { - struct perf_mem_event *e =3D perf_mem_events__ptr(i); + struct perf_mem_event *e; + + if (x86__is_amd_cpu()) + e =3D &perf_mem_events_amd[i]; + else + e =3D &perf_mem_events_intel[i]; =20 if (!e) return NULL; diff --git a/tools/perf/builtin-c2c.c b/tools/perf/builtin-c2c.c index f78eea9e2153..838481505e08 100644 --- a/tools/perf/builtin-c2c.c +++ b/tools/perf/builtin-c2c.c @@ -3215,12 +3215,19 @@ static int parse_record_events(const struct option = *opt, const char *str, int unset __maybe_unused) { bool *event_set =3D (bool *) opt->value; + struct perf_pmu *pmu; + + pmu =3D perf_mem_events_find_pmu(); + if (!pmu) { + pr_err("failed: there is no PMU that supports perf c2c\n"); + exit(-1); + } =20 if (!strcmp(str, "list")) { - perf_mem_events__list(); + perf_pmu__mem_events_list(pmu); exit(0); } - if (perf_mem_events__parse(str)) + if (perf_pmu__mem_events_parse(pmu, str)) exit(-1); =20 *event_set =3D true; @@ -3245,6 +3252,7 @@ static int perf_c2c__record(int argc, const char **ar= gv) bool all_user =3D false, all_kernel =3D false; bool event_set =3D false; struct perf_mem_event *e; + struct perf_pmu *pmu; struct option options[] =3D { OPT_CALLBACK('e', "event", &event_set, "event", "event selector. Use 'perf c2c record -e list' to list available ev= ents", @@ -3256,7 +3264,13 @@ static int perf_c2c__record(int argc, const char **a= rgv) OPT_END() }; =20 - if (perf_mem_events__init()) { + pmu =3D perf_mem_events_find_pmu(); + if (!pmu) { + pr_err("failed: no PMU supports the memory events\n"); + return -1; + } + + if (perf_pmu__mem_events_init(pmu)) { pr_err("failed: memory events not supported\n"); return -1; } @@ -3280,7 +3294,7 @@ static int perf_c2c__record(int argc, const char **ar= gv) rec_argv[i++] =3D "record"; =20 if (!event_set) { - e =3D perf_mem_events__ptr(PERF_MEM_EVENTS__LOAD_STORE); + e =3D perf_pmu__mem_events_ptr(pmu, PERF_MEM_EVENTS__LOAD_STORE); /* * The load and store operations are required, use the event * PERF_MEM_EVENTS__LOAD_STORE if it is supported. @@ -3289,15 +3303,15 @@ static int perf_c2c__record(int argc, const char **= argv) e->record =3D true; rec_argv[i++] =3D "-W"; } else { - e =3D perf_mem_events__ptr(PERF_MEM_EVENTS__LOAD); + e =3D perf_pmu__mem_events_ptr(pmu, PERF_MEM_EVENTS__LOAD); e->record =3D true; =20 - e =3D perf_mem_events__ptr(PERF_MEM_EVENTS__STORE); + e =3D perf_pmu__mem_events_ptr(pmu, PERF_MEM_EVENTS__STORE); e->record =3D true; } } =20 - e =3D perf_mem_events__ptr(PERF_MEM_EVENTS__LOAD); + e =3D perf_pmu__mem_events_ptr(pmu, PERF_MEM_EVENTS__LOAD); if (e->record) rec_argv[i++] =3D "-W"; =20 diff --git a/tools/perf/builtin-mem.c b/tools/perf/builtin-mem.c index 51499c20da01..ef64bae77ca7 100644 --- a/tools/perf/builtin-mem.c +++ b/tools/perf/builtin-mem.c @@ -43,12 +43,19 @@ static int parse_record_events(const struct option *opt, const char *str, int unset __maybe_unused) { struct perf_mem *mem =3D *(struct perf_mem **)opt->value; + struct perf_pmu *pmu; + + pmu =3D perf_mem_events_find_pmu(); + if (!pmu) { + pr_err("failed: there is no PMU that supports perf mem\n"); + exit(-1); + } =20 if (!strcmp(str, "list")) { - perf_mem_events__list(); + perf_pmu__mem_events_list(pmu); exit(0); } - if (perf_mem_events__parse(str)) + if (perf_pmu__mem_events_parse(pmu, str)) exit(-1); =20 mem->operation =3D 0; @@ -72,6 +79,7 @@ static int __cmd_record(int argc, const char **argv, stru= ct perf_mem *mem) int ret; bool all_user =3D false, all_kernel =3D false; struct perf_mem_event *e; + struct perf_pmu *pmu; struct option options[] =3D { OPT_CALLBACK('e', "event", &mem, "event", "event selector. use 'perf mem record -e list' to list available ev= ents", @@ -84,7 +92,13 @@ static int __cmd_record(int argc, const char **argv, str= uct perf_mem *mem) OPT_END() }; =20 - if (perf_mem_events__init()) { + pmu =3D perf_mem_events_find_pmu(); + if (!pmu) { + pr_err("failed: no PMU supports the memory events\n"); + return -1; + } + + if (perf_pmu__mem_events_init(pmu)) { pr_err("failed: memory events not supported\n"); return -1; } @@ -113,7 +127,7 @@ static int __cmd_record(int argc, const char **argv, st= ruct perf_mem *mem) =20 rec_argv[i++] =3D "record"; =20 - e =3D perf_mem_events__ptr(PERF_MEM_EVENTS__LOAD_STORE); + e =3D perf_pmu__mem_events_ptr(pmu, PERF_MEM_EVENTS__LOAD_STORE); =20 /* * The load and store operations are required, use the event @@ -126,17 +140,17 @@ static int __cmd_record(int argc, const char **argv, = struct perf_mem *mem) rec_argv[i++] =3D "-W"; } else { if (mem->operation & MEM_OPERATION_LOAD) { - e =3D perf_mem_events__ptr(PERF_MEM_EVENTS__LOAD); + e =3D perf_pmu__mem_events_ptr(pmu, PERF_MEM_EVENTS__LOAD); e->record =3D true; } =20 if (mem->operation & MEM_OPERATION_STORE) { - e =3D perf_mem_events__ptr(PERF_MEM_EVENTS__STORE); + e =3D perf_pmu__mem_events_ptr(pmu, PERF_MEM_EVENTS__STORE); e->record =3D true; } } =20 - e =3D perf_mem_events__ptr(PERF_MEM_EVENTS__LOAD); + e =3D perf_pmu__mem_events_ptr(pmu, PERF_MEM_EVENTS__LOAD); if (e->record) rec_argv[i++] =3D "-W"; =20 diff --git a/tools/perf/util/mem-events.c b/tools/perf/util/mem-events.c index 0a8f415f5efe..27a33dc44964 100644 --- a/tools/perf/util/mem-events.c +++ b/tools/perf/util/mem-events.c @@ -29,17 +29,42 @@ struct perf_mem_event perf_mem_events[PERF_MEM_EVENTS__= MAX] =3D { static char mem_loads_name[100]; static bool mem_loads_name__init; =20 -struct perf_mem_event * __weak perf_mem_events__ptr(int i) +struct perf_mem_event *perf_pmu__mem_events_ptr(struct perf_pmu *pmu, int = i) { - if (i >=3D PERF_MEM_EVENTS__MAX) + if (i >=3D PERF_MEM_EVENTS__MAX || !pmu) return NULL; =20 - return &perf_mem_events[i]; + return &pmu->mem_events[i]; +} + +static struct perf_pmu *perf_pmus__scan_mem(struct perf_pmu *pmu) +{ + while ((pmu =3D perf_pmus__scan(pmu)) !=3D NULL) { + if (pmu->mem_events) + return pmu; + } + return NULL; +} + +struct perf_pmu *perf_mem_events_find_pmu(void) +{ + /* + * The current perf mem doesn't support per-PMU configuration. + * The exact same configuration is applied to all the + * mem_events supported PMUs. + * Return the first mem_events supported PMU. + * + * Notes: The only case which may support multiple mem_events + * supported PMUs is Intel hybrid. The exact same mem_events + * is shared among the PMUs. Only configure the first PMU + * is good enough as well. + */ + return perf_pmus__scan_mem(NULL); } =20 const char * __weak perf_mem_events__name(int i, const char *pmu_name __m= aybe_unused) { - struct perf_mem_event *e =3D perf_mem_events__ptr(i); + struct perf_mem_event *e =3D &perf_mem_events[i]; =20 if (!e) return NULL; @@ -61,7 +86,7 @@ __weak bool is_mem_loads_aux_event(struct evsel *leader _= _maybe_unused) return false; } =20 -int perf_mem_events__parse(const char *str) +int perf_pmu__mem_events_parse(struct perf_pmu *pmu, const char *str) { char *tok, *saveptr =3D NULL; bool found =3D false; @@ -79,7 +104,7 @@ int perf_mem_events__parse(const char *str) =20 while (tok) { for (j =3D 0; j < PERF_MEM_EVENTS__MAX; j++) { - struct perf_mem_event *e =3D perf_mem_events__ptr(j); + struct perf_mem_event *e =3D perf_pmu__mem_events_ptr(pmu, j); =20 if (!e->tag) continue; @@ -112,7 +137,7 @@ static bool perf_mem_event__supported(const char *mnt, = struct perf_pmu *pmu, return !stat(path, &st); } =20 -int perf_mem_events__init(void) +int perf_pmu__mem_events_init(struct perf_pmu *pmu) { const char *mnt =3D sysfs__mount(); bool found =3D false; @@ -122,8 +147,7 @@ int perf_mem_events__init(void) return -ENOENT; =20 for (j =3D 0; j < PERF_MEM_EVENTS__MAX; j++) { - struct perf_mem_event *e =3D perf_mem_events__ptr(j); - struct perf_pmu *pmu =3D NULL; + struct perf_mem_event *e =3D perf_pmu__mem_events_ptr(pmu, j); =20 /* * If the event entry isn't valid, skip initialization @@ -132,29 +156,20 @@ int perf_mem_events__init(void) if (!e->tag) continue; =20 - /* - * Scan all PMUs not just core ones, since perf mem/c2c on - * platforms like AMD uses IBS OP PMU which is independent - * of core PMU. - */ - while ((pmu =3D perf_pmus__scan(pmu)) !=3D NULL) { - e->supported |=3D perf_mem_event__supported(mnt, pmu, e); - if (e->supported) { - found =3D true; - break; - } - } + e->supported |=3D perf_mem_event__supported(mnt, pmu, e); + if (e->supported) + found =3D true; } =20 return found ? 0 : -ENOENT; } =20 -void perf_mem_events__list(void) +void perf_pmu__mem_events_list(struct perf_pmu *pmu) { int j; =20 for (j =3D 0; j < PERF_MEM_EVENTS__MAX; j++) { - struct perf_mem_event *e =3D perf_mem_events__ptr(j); + struct perf_mem_event *e =3D perf_pmu__mem_events_ptr(pmu, j); =20 fprintf(stderr, "%-*s%-*s%s", e->tag ? 13 : 0, @@ -165,50 +180,32 @@ void perf_mem_events__list(void) } } =20 -static void perf_mem_events__print_unsupport_hybrid(struct perf_mem_event = *e, - int idx) -{ - const char *mnt =3D sysfs__mount(); - struct perf_pmu *pmu =3D NULL; - - while ((pmu =3D perf_pmus__scan(pmu)) !=3D NULL) { - if (!perf_mem_event__supported(mnt, pmu, e)) { - pr_err("failed: event '%s' not supported\n", - perf_mem_events__name(idx, pmu->name)); - } - } -} - int perf_mem_events__record_args(const char **rec_argv, int *argv_nr, char **rec_tmp, int *tmp_nr) { const char *mnt =3D sysfs__mount(); + struct perf_pmu *pmu =3D NULL; int i =3D *argv_nr, k =3D 0; struct perf_mem_event *e; =20 - for (int j =3D 0; j < PERF_MEM_EVENTS__MAX; j++) { - e =3D perf_mem_events__ptr(j); - if (!e->record) - continue; =20 - if (perf_pmus__num_mem_pmus() =3D=3D 1) { - if (!e->supported) { - pr_err("failed: event '%s' not supported\n", - perf_mem_events__name(j, NULL)); - return -1; - } + while ((pmu =3D perf_pmus__scan_mem(pmu)) !=3D NULL) { + for (int j =3D 0; j < PERF_MEM_EVENTS__MAX; j++) { + e =3D perf_pmu__mem_events_ptr(pmu, j); =20 - rec_argv[i++] =3D "-e"; - rec_argv[i++] =3D perf_mem_events__name(j, NULL); - } else { - struct perf_pmu *pmu =3D NULL; + if (!e->record) + continue; =20 if (!e->supported) { - perf_mem_events__print_unsupport_hybrid(e, j); + pr_err("failed: event '%s' not supported\n", + perf_mem_events__name(j, pmu->name)); return -1; } =20 - while ((pmu =3D perf_pmus__scan(pmu)) !=3D NULL) { + if (perf_pmus__num_mem_pmus() =3D=3D 1) { + rec_argv[i++] =3D "-e"; + rec_argv[i++] =3D perf_mem_events__name(j, NULL); + } else { const char *s =3D perf_mem_events__name(j, pmu->name); =20 if (!perf_mem_event__supported(mnt, pmu, e)) diff --git a/tools/perf/util/mem-events.h b/tools/perf/util/mem-events.h index 8c5694b2d0b0..0ad301a2e424 100644 --- a/tools/perf/util/mem-events.h +++ b/tools/perf/util/mem-events.h @@ -36,14 +36,15 @@ enum { extern unsigned int perf_mem_events__loads_ldlat; extern struct perf_mem_event perf_mem_events[PERF_MEM_EVENTS__MAX]; =20 -int perf_mem_events__parse(const char *str); -int perf_mem_events__init(void); +int perf_pmu__mem_events_parse(struct perf_pmu *pmu, const char *str); +int perf_pmu__mem_events_init(struct perf_pmu *pmu); =20 const char *perf_mem_events__name(int i, const char *pmu_name); -struct perf_mem_event *perf_mem_events__ptr(int i); +struct perf_mem_event *perf_pmu__mem_events_ptr(struct perf_pmu *pmu, int = i); +struct perf_pmu *perf_mem_events_find_pmu(void); bool is_mem_loads_aux_event(struct evsel *leader); =20 -void perf_mem_events__list(void); +void perf_pmu__mem_events_list(struct perf_pmu *pmu); int perf_mem_events__record_args(const char **rec_argv, int *argv_nr, char **rec_tmp, int *tmp_nr); =20 --=20 2.35.1 From nobody Sun Dec 28 00:57:32 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 80418C4332F for ; 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X-IronPort-AV: E=McAfee;i="6600,9927,10923"; a="8412910" X-IronPort-AV: E=Sophos;i="6.04,273,1695711600"; d="scan'208";a="8412910" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Dec 2023 11:52:07 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10923"; a="917772566" X-IronPort-AV: E=Sophos;i="6.04,273,1695711600"; d="scan'208";a="917772566" Received: from kanliang-dev.jf.intel.com ([10.165.154.102]) by fmsmga001.fm.intel.com with ESMTP; 13 Dec 2023 11:52:06 -0800 From: kan.liang@linux.intel.com To: acme@kernel.org, irogers@google.com, peterz@infradead.org, mingo@redhat.com, namhyung@kernel.org, jolsa@kernel.org, adrian.hunter@intel.com, john.g.garry@oracle.com, will@kernel.org, james.clark@arm.com, mike.leach@linaro.org, leo.yan@linaro.org, yuhaixin.yhx@linux.alibaba.com, renyu.zj@linux.alibaba.com, tmricht@linux.ibm.com, ravi.bangoria@amd.com, atrajeev@linux.vnet.ibm.com, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Kan Liang Subject: [PATCH V3 3/7] perf mem: Clean up perf_mem_events__name() Date: Wed, 13 Dec 2023 11:51:50 -0800 Message-Id: <20231213195154.1085945-4-kan.liang@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20231213195154.1085945-1-kan.liang@linux.intel.com> References: <20231213195154.1085945-1-kan.liang@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Kan Liang Introduce a generic perf_mem_events__name(). Remove the ARCH-specific one. The mem_load events may have a different format. Add ldlat and aux_event in the struct perf_mem_event to indicate the format and the extra aux event. Add perf_mem_events_intel_aux[] to support the extra mem_load_aux event. Rename perf_mem_events__name to perf_pmu__mem_events_name. Reviewed-by: Ian Rogers Tested-by: Ravi Bangoria Signed-off-by: Kan Liang Reviewed-by: Leo Yan Tested-by: Leo Yan --- tools/perf/arch/arm64/util/mem-events.c | 26 ++------- tools/perf/arch/powerpc/util/mem-events.c | 13 ++--- tools/perf/arch/powerpc/util/mem-events.h | 7 +++ tools/perf/arch/powerpc/util/pmu.c | 11 ++++ tools/perf/arch/x86/util/mem-events.c | 70 +++++------------------ tools/perf/arch/x86/util/mem-events.h | 1 + tools/perf/arch/x86/util/pmu.c | 8 ++- tools/perf/util/mem-events.c | 60 +++++++++++++------ tools/perf/util/mem-events.h | 3 +- 9 files changed, 93 insertions(+), 106 deletions(-) create mode 100644 tools/perf/arch/powerpc/util/mem-events.h create mode 100644 tools/perf/arch/powerpc/util/pmu.c diff --git a/tools/perf/arch/arm64/util/mem-events.c b/tools/perf/arch/arm6= 4/util/mem-events.c index d3e69a520c2b..96460c46640a 100644 --- a/tools/perf/arch/arm64/util/mem-events.c +++ b/tools/perf/arch/arm64/util/mem-events.c @@ -3,28 +3,10 @@ #include "util/mem-events.h" #include "mem-events.h" =20 -#define E(t, n, s) { .tag =3D t, .name =3D n, .sysfs_name =3D s } +#define E(t, n, s, l, a) { .tag =3D t, .name =3D n, .sysfs_name =3D s, .ld= lat =3D l, .aux_event =3D a } =20 struct perf_mem_event perf_mem_events_arm[PERF_MEM_EVENTS__MAX] =3D { - E("spe-load", "arm_spe_0/ts_enable=3D1,pa_enable=3D1,load_filter=3D1,stor= e_filter=3D0,min_latency=3D%u/", "arm_spe_0"), - E("spe-store", "arm_spe_0/ts_enable=3D1,pa_enable=3D1,load_filter=3D0,sto= re_filter=3D1/", "arm_spe_0"), - E("spe-ldst", "arm_spe_0/ts_enable=3D1,pa_enable=3D1,load_filter=3D1,stor= e_filter=3D1,min_latency=3D%u/", "arm_spe_0"), + E("spe-load", "%s/ts_enable=3D1,pa_enable=3D1,load_filter=3D1,store_filte= r=3D0,min_latency=3D%u/", "arm_spe_0", true, 0), + E("spe-store", "%s/ts_enable=3D1,pa_enable=3D1,load_filter=3D0,store_filt= er=3D1/", "arm_spe_0", false, 0), + E("spe-ldst", "%s/ts_enable=3D1,pa_enable=3D1,load_filter=3D1,store_filte= r=3D1,min_latency=3D%u/", "arm_spe_0", true, 0), }; - -static char mem_ev_name[100]; - -const char *perf_mem_events__name(int i, const char *pmu_name __maybe_unus= ed) -{ - struct perf_mem_event *e =3D &perf_mem_events_arm[i]; - - if (i >=3D PERF_MEM_EVENTS__MAX) - return NULL; - - if (i =3D=3D PERF_MEM_EVENTS__LOAD || i =3D=3D PERF_MEM_EVENTS__LOAD_STOR= E) - scnprintf(mem_ev_name, sizeof(mem_ev_name), - e->name, perf_mem_events__loads_ldlat); - else /* PERF_MEM_EVENTS__STORE */ - scnprintf(mem_ev_name, sizeof(mem_ev_name), e->name); - - return mem_ev_name; -} diff --git a/tools/perf/arch/powerpc/util/mem-events.c b/tools/perf/arch/po= werpc/util/mem-events.c index 78b986e5268d..b7883e38950f 100644 --- a/tools/perf/arch/powerpc/util/mem-events.c +++ b/tools/perf/arch/powerpc/util/mem-events.c @@ -2,11 +2,10 @@ #include "map_symbol.h" #include "mem-events.h" =20 -/* PowerPC does not support 'ldlat' parameter. */ -const char *perf_mem_events__name(int i, const char *pmu_name __maybe_unus= ed) -{ - if (i =3D=3D PERF_MEM_EVENTS__LOAD) - return "cpu/mem-loads/"; +#define E(t, n, s, l, a) { .tag =3D t, .name =3D n, .sysfs_name =3D s, .ld= lat =3D l, .aux_event =3D a } =20 - return "cpu/mem-stores/"; -} +struct perf_mem_event perf_mem_events_power[PERF_MEM_EVENTS__MAX] =3D { + E("ldlat-loads", "%s/mem-loads/", "cpu/events/mem-loads", false, 0), + E("ldlat-stores", "%s/mem-stores/", "cpu/events/mem-stores", false, 0), + E(NULL, NULL, NULL, false, 0), +}; diff --git a/tools/perf/arch/powerpc/util/mem-events.h b/tools/perf/arch/po= werpc/util/mem-events.h new file mode 100644 index 000000000000..6acc3d1b6873 --- /dev/null +++ b/tools/perf/arch/powerpc/util/mem-events.h @@ -0,0 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef _POWER_MEM_EVENTS_H +#define _POWER_MEM_EVENTS_H + +extern struct perf_mem_event perf_mem_events_power[PERF_MEM_EVENTS__MAX]; + +#endif /* _POWER_MEM_EVENTS_H */ diff --git a/tools/perf/arch/powerpc/util/pmu.c b/tools/perf/arch/powerpc/u= til/pmu.c new file mode 100644 index 000000000000..168173f88ddb --- /dev/null +++ b/tools/perf/arch/powerpc/util/pmu.c @@ -0,0 +1,11 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include + +#include "../../../util/pmu.h" + +void perf_pmu__arch_init(struct perf_pmu *pmu) +{ + if (pmu->is_core) + pmu->mem_events =3D perf_mem_events_power; +} diff --git a/tools/perf/arch/x86/util/mem-events.c b/tools/perf/arch/x86/ut= il/mem-events.c index 5fb41d50118d..f0e66a0151a0 100644 --- a/tools/perf/arch/x86/util/mem-events.c +++ b/tools/perf/arch/x86/util/mem-events.c @@ -7,25 +7,26 @@ #include "linux/string.h" #include "env.h" =20 -static char mem_loads_name[100]; -static bool mem_loads_name__init; -static char mem_stores_name[100]; - #define MEM_LOADS_AUX 0x8203 -#define MEM_LOADS_AUX_NAME "{%s/mem-loads-aux/,%s/mem-loads,ldlat=3D%u= /}:P" =20 -#define E(t, n, s) { .tag =3D t, .name =3D n, .sysfs_name =3D s } +#define E(t, n, s, l, a) { .tag =3D t, .name =3D n, .sysfs_name =3D s, .ld= lat =3D l, .aux_event =3D a } =20 struct perf_mem_event perf_mem_events_intel[PERF_MEM_EVENTS__MAX] =3D { - E("ldlat-loads", "%s/mem-loads,ldlat=3D%u/P", "%s/events/mem-loads"), - E("ldlat-stores", "%s/mem-stores/P", "%s/events/mem-stores"), - E(NULL, NULL, NULL), + E("ldlat-loads", "%s/mem-loads,ldlat=3D%u/P", "%s/events/mem-loads", true= , 0), + E("ldlat-stores", "%s/mem-stores/P", "%s/events/mem-stores", false, 0), + E(NULL, NULL, NULL, false, 0), +}; + +struct perf_mem_event perf_mem_events_intel_aux[PERF_MEM_EVENTS__MAX] =3D { + E("ldlat-loads", "{%s/mem-loads-aux/,%s/mem-loads,ldlat=3D%u/}:P", "%s/ev= ents/mem-loads", true, MEM_LOADS_AUX), + E("ldlat-stores", "%s/mem-stores/P", "%s/events/mem-stores", false, 0), + E(NULL, NULL, NULL, false, 0), }; =20 struct perf_mem_event perf_mem_events_amd[PERF_MEM_EVENTS__MAX] =3D { - E(NULL, NULL, NULL), - E(NULL, NULL, NULL), - E("mem-ldst", "ibs_op//", "ibs_op"), + E(NULL, NULL, NULL, false, 0), + E(NULL, NULL, NULL, false, 0), + E("mem-ldst", "%s//", "ibs_op", false, 0), }; =20 bool is_mem_loads_aux_event(struct evsel *leader) @@ -40,48 +41,3 @@ bool is_mem_loads_aux_event(struct evsel *leader) =20 return leader->core.attr.config =3D=3D MEM_LOADS_AUX; } - -const char *perf_mem_events__name(int i, const char *pmu_name) -{ - struct perf_mem_event *e; - - if (x86__is_amd_cpu()) - e =3D &perf_mem_events_amd[i]; - else - e =3D &perf_mem_events_intel[i]; - - if (!e) - return NULL; - - if (i =3D=3D PERF_MEM_EVENTS__LOAD) { - if (mem_loads_name__init && !pmu_name) - return mem_loads_name; - - if (!pmu_name) { - mem_loads_name__init =3D true; - pmu_name =3D "cpu"; - } - - if (perf_pmus__have_event(pmu_name, "mem-loads-aux")) { - scnprintf(mem_loads_name, sizeof(mem_loads_name), - MEM_LOADS_AUX_NAME, pmu_name, pmu_name, - perf_mem_events__loads_ldlat); - } else { - scnprintf(mem_loads_name, sizeof(mem_loads_name), - e->name, pmu_name, - perf_mem_events__loads_ldlat); - } - return mem_loads_name; - } - - if (i =3D=3D PERF_MEM_EVENTS__STORE) { - if (!pmu_name) - pmu_name =3D "cpu"; - - scnprintf(mem_stores_name, sizeof(mem_stores_name), - e->name, pmu_name); - return mem_stores_name; - } - - return e->name; -} diff --git a/tools/perf/arch/x86/util/mem-events.h b/tools/perf/arch/x86/ut= il/mem-events.h index 3959e427f482..f55c8d3b7d59 100644 --- a/tools/perf/arch/x86/util/mem-events.h +++ b/tools/perf/arch/x86/util/mem-events.h @@ -3,6 +3,7 @@ #define _X86_MEM_EVENTS_H =20 extern struct perf_mem_event perf_mem_events_intel[PERF_MEM_EVENTS__MAX]; +extern struct perf_mem_event perf_mem_events_intel_aux[PERF_MEM_EVENTS__MA= X]; =20 extern struct perf_mem_event perf_mem_events_amd[PERF_MEM_EVENTS__MAX]; =20 diff --git a/tools/perf/arch/x86/util/pmu.c b/tools/perf/arch/x86/util/pmu.c index cd22e80e5657..0f49ff13cfe2 100644 --- a/tools/perf/arch/x86/util/pmu.c +++ b/tools/perf/arch/x86/util/pmu.c @@ -35,8 +35,12 @@ void perf_pmu__arch_init(struct perf_pmu *pmu __maybe_un= used) if (x86__is_amd_cpu()) { if (!strcmp(pmu->name, "ibs_op")) pmu->mem_events =3D perf_mem_events_amd; - } else if (pmu->is_core) - pmu->mem_events =3D perf_mem_events_intel; + } else if (pmu->is_core) { + if (perf_pmu__have_event(pmu, "mem-loads-aux")) + pmu->mem_events =3D perf_mem_events_intel_aux; + else + pmu->mem_events =3D perf_mem_events_intel; + } } =20 int perf_pmus__num_mem_pmus(void) diff --git a/tools/perf/util/mem-events.c b/tools/perf/util/mem-events.c index 27a33dc44964..51e53e33df03 100644 --- a/tools/perf/util/mem-events.c +++ b/tools/perf/util/mem-events.c @@ -17,17 +17,17 @@ =20 unsigned int perf_mem_events__loads_ldlat =3D 30; =20 -#define E(t, n, s) { .tag =3D t, .name =3D n, .sysfs_name =3D s } +#define E(t, n, s, l, a) { .tag =3D t, .name =3D n, .sysfs_name =3D s, .ld= lat =3D l, .aux_event =3D a } =20 struct perf_mem_event perf_mem_events[PERF_MEM_EVENTS__MAX] =3D { - E("ldlat-loads", "cpu/mem-loads,ldlat=3D%u/P", "cpu/events/mem-loads"), - E("ldlat-stores", "cpu/mem-stores/P", "cpu/events/mem-stores"), - E(NULL, NULL, NULL), + E("ldlat-loads", "%s/mem-loads,ldlat=3D%u/P", "cpu/events/mem-loads", tr= ue, 0), + E("ldlat-stores", "%s/mem-stores/P", "cpu/events/mem-stores", false, 0), + E(NULL, NULL, NULL, false, 0), }; #undef E =20 static char mem_loads_name[100]; -static bool mem_loads_name__init; +static char mem_stores_name[100]; =20 struct perf_mem_event *perf_pmu__mem_events_ptr(struct perf_pmu *pmu, int = i) { @@ -62,23 +62,49 @@ struct perf_pmu *perf_mem_events_find_pmu(void) return perf_pmus__scan_mem(NULL); } =20 -const char * __weak perf_mem_events__name(int i, const char *pmu_name __m= aybe_unused) +static const char *perf_pmu__mem_events_name(int i, struct perf_pmu *pmu) { - struct perf_mem_event *e =3D &perf_mem_events[i]; + struct perf_mem_event *e; =20 + if (i >=3D PERF_MEM_EVENTS__MAX || !pmu) + return NULL; + + e =3D &pmu->mem_events[i]; if (!e) return NULL; =20 - if (i =3D=3D PERF_MEM_EVENTS__LOAD) { - if (!mem_loads_name__init) { - mem_loads_name__init =3D true; - scnprintf(mem_loads_name, sizeof(mem_loads_name), - e->name, perf_mem_events__loads_ldlat); + if (i =3D=3D PERF_MEM_EVENTS__LOAD || i =3D=3D PERF_MEM_EVENTS__LOAD_STOR= E) { + if (e->ldlat) { + if (!e->aux_event) { + /* ARM and Most of Intel */ + scnprintf(mem_loads_name, sizeof(mem_loads_name), + e->name, pmu->name, + perf_mem_events__loads_ldlat); + } else { + /* Intel with mem-loads-aux event */ + scnprintf(mem_loads_name, sizeof(mem_loads_name), + e->name, pmu->name, pmu->name, + perf_mem_events__loads_ldlat); + } + } else { + if (!e->aux_event) { + /* AMD and POWER */ + scnprintf(mem_loads_name, sizeof(mem_loads_name), + e->name, pmu->name); + } else + return NULL; } + return mem_loads_name; } =20 - return e->name; + if (i =3D=3D PERF_MEM_EVENTS__STORE) { + scnprintf(mem_stores_name, sizeof(mem_stores_name), + e->name, pmu->name); + return mem_stores_name; + } + + return NULL; } =20 __weak bool is_mem_loads_aux_event(struct evsel *leader __maybe_unused) @@ -175,7 +201,7 @@ void perf_pmu__mem_events_list(struct perf_pmu *pmu) e->tag ? 13 : 0, e->tag ? : "", e->tag && verbose > 0 ? 25 : 0, - e->tag && verbose > 0 ? perf_mem_events__name(j, NULL) : "", + e->tag && verbose > 0 ? perf_pmu__mem_events_name(j, pmu) : "", e->supported ? ": available\n" : ""); } } @@ -198,15 +224,15 @@ int perf_mem_events__record_args(const char **rec_arg= v, int *argv_nr, =20 if (!e->supported) { pr_err("failed: event '%s' not supported\n", - perf_mem_events__name(j, pmu->name)); + perf_pmu__mem_events_name(j, pmu)); return -1; } =20 if (perf_pmus__num_mem_pmus() =3D=3D 1) { rec_argv[i++] =3D "-e"; - rec_argv[i++] =3D perf_mem_events__name(j, NULL); + rec_argv[i++] =3D perf_pmu__mem_events_name(j, pmu); } else { - const char *s =3D perf_mem_events__name(j, pmu->name); + const char *s =3D perf_pmu__mem_events_name(j, pmu); =20 if (!perf_mem_event__supported(mnt, pmu, e)) continue; diff --git a/tools/perf/util/mem-events.h b/tools/perf/util/mem-events.h index 0ad301a2e424..79d342768d12 100644 --- a/tools/perf/util/mem-events.h +++ b/tools/perf/util/mem-events.h @@ -14,6 +14,8 @@ struct perf_mem_event { bool record; bool supported; + bool ldlat; + u32 aux_event; const char *tag; const char *name; const char *sysfs_name; @@ -39,7 +41,6 @@ extern struct perf_mem_event perf_mem_events[PERF_MEM_EVE= NTS__MAX]; int perf_pmu__mem_events_parse(struct perf_pmu *pmu, const char *str); int perf_pmu__mem_events_init(struct perf_pmu *pmu); =20 -const char *perf_mem_events__name(int i, const char *pmu_name); struct perf_mem_event *perf_pmu__mem_events_ptr(struct perf_pmu *pmu, int = i); struct perf_pmu *perf_mem_events_find_pmu(void); bool is_mem_loads_aux_event(struct evsel *leader); --=20 2.35.1 From nobody Sun Dec 28 00:57:32 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A5EECC4167D for ; Wed, 13 Dec 2023 19:53:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1379395AbjLMTx2 (ORCPT ); Wed, 13 Dec 2023 14:53:28 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49790 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1442527AbjLMTxB (ORCPT ); Wed, 13 Dec 2023 14:53:01 -0500 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 97762188; Wed, 13 Dec 2023 11:52:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1702497147; x=1734033147; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=+r6jgbLFvIcWvI4qWiCgNJQ8zB50pDocw0Vw9E2kfy8=; b=frGjTwSl/LvYOFqIQqHj3erl5sesRF9XeKHSfOuowXSvr8mylGDwGd7F RfG72cvlbKHKXtyMCOqnLZrkjNWLmQvuzjz4/D9mgUtDiVfmTDKs3mOun qlT/ebobn5zX1SqDVvEfO6fN2LE1tPpnzVwCjl62qUL4qdj7ML/x0H9jO O+LhVKES98LuCNLtuZuxJGc9yt3vGcLqpw8skRZ4kgH2FxmaThYmlvWm/ G34oJMuVdrFysY/MNrgT0OCEPq9jAXvbraewV+za1tG5ecTYCrcgoKmQt 2MMQKYC+4ZlTgAvuTz0ZNkLd1Y4MTn6cbU2BNbWPvyN+DdOz8Rz4vsVFB g==; X-IronPort-AV: E=McAfee;i="6600,9927,10923"; a="8412923" X-IronPort-AV: E=Sophos;i="6.04,273,1695711600"; d="scan'208";a="8412923" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Dec 2023 11:52:08 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10923"; a="917772569" X-IronPort-AV: E=Sophos;i="6.04,273,1695711600"; d="scan'208";a="917772569" Received: from kanliang-dev.jf.intel.com ([10.165.154.102]) by fmsmga001.fm.intel.com with ESMTP; 13 Dec 2023 11:52:06 -0800 From: kan.liang@linux.intel.com To: acme@kernel.org, irogers@google.com, peterz@infradead.org, mingo@redhat.com, namhyung@kernel.org, jolsa@kernel.org, adrian.hunter@intel.com, john.g.garry@oracle.com, will@kernel.org, james.clark@arm.com, mike.leach@linaro.org, leo.yan@linaro.org, yuhaixin.yhx@linux.alibaba.com, renyu.zj@linux.alibaba.com, tmricht@linux.ibm.com, ravi.bangoria@amd.com, atrajeev@linux.vnet.ibm.com, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Kan Liang Subject: [PATCH V3 4/7] perf mem: Clean up perf_mem_event__supported() Date: Wed, 13 Dec 2023 11:51:51 -0800 Message-Id: <20231213195154.1085945-5-kan.liang@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20231213195154.1085945-1-kan.liang@linux.intel.com> References: <20231213195154.1085945-1-kan.liang@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Kan Liang For some ARCHs, e.g., ARM and AMD, to get the availability of the mem-events, perf checks the existence of a specific PMU. For the other ARCHs, e.g., Intel and Power, perf has to check the existence of some specific events. The current perf only iterates the mem-events-supported PMUs. It's not required to check the existence of a specific PMU anymore. Rename sysfs_name to event_name, which stores the specific mem-events. Perf only needs to check those events for the availability of the mem-events. Rename perf_mem_event__supported to perf_pmu__mem_events_supported. Reviewed-by: Ian Rogers Tested-by: Ravi Bangoria Signed-off-by: Kan Liang Reviewed-by: Leo Yan Tested-by: Leo Yan --- tools/perf/arch/arm64/util/mem-events.c | 8 ++++---- tools/perf/arch/powerpc/util/mem-events.c | 8 ++++---- tools/perf/arch/x86/util/mem-events.c | 20 ++++++++++---------- tools/perf/util/mem-events.c | 22 ++++++++++++---------- tools/perf/util/mem-events.h | 2 +- 5 files changed, 31 insertions(+), 29 deletions(-) diff --git a/tools/perf/arch/arm64/util/mem-events.c b/tools/perf/arch/arm6= 4/util/mem-events.c index 96460c46640a..9f8da7937255 100644 --- a/tools/perf/arch/arm64/util/mem-events.c +++ b/tools/perf/arch/arm64/util/mem-events.c @@ -3,10 +3,10 @@ #include "util/mem-events.h" #include "mem-events.h" =20 -#define E(t, n, s, l, a) { .tag =3D t, .name =3D n, .sysfs_name =3D s, .ld= lat =3D l, .aux_event =3D a } +#define E(t, n, s, l, a) { .tag =3D t, .name =3D n, .event_name =3D s, .ld= lat =3D l, .aux_event =3D a } =20 struct perf_mem_event perf_mem_events_arm[PERF_MEM_EVENTS__MAX] =3D { - E("spe-load", "%s/ts_enable=3D1,pa_enable=3D1,load_filter=3D1,store_filte= r=3D0,min_latency=3D%u/", "arm_spe_0", true, 0), - E("spe-store", "%s/ts_enable=3D1,pa_enable=3D1,load_filter=3D0,store_filt= er=3D1/", "arm_spe_0", false, 0), - E("spe-ldst", "%s/ts_enable=3D1,pa_enable=3D1,load_filter=3D1,store_filte= r=3D1,min_latency=3D%u/", "arm_spe_0", true, 0), + E("spe-load", "%s/ts_enable=3D1,pa_enable=3D1,load_filter=3D1,store_filte= r=3D0,min_latency=3D%u/", NULL, true, 0), + E("spe-store", "%s/ts_enable=3D1,pa_enable=3D1,load_filter=3D0,store_filt= er=3D1/", NULL, false, 0), + E("spe-ldst", "%s/ts_enable=3D1,pa_enable=3D1,load_filter=3D1,store_filte= r=3D1,min_latency=3D%u/", NULL, true, 0), }; diff --git a/tools/perf/arch/powerpc/util/mem-events.c b/tools/perf/arch/po= werpc/util/mem-events.c index b7883e38950f..72a6ac2b52f5 100644 --- a/tools/perf/arch/powerpc/util/mem-events.c +++ b/tools/perf/arch/powerpc/util/mem-events.c @@ -2,10 +2,10 @@ #include "map_symbol.h" #include "mem-events.h" =20 -#define E(t, n, s, l, a) { .tag =3D t, .name =3D n, .sysfs_name =3D s, .ld= lat =3D l, .aux_event =3D a } +#define E(t, n, s, l, a) { .tag =3D t, .name =3D n, .event_name =3D s, .ld= lat =3D l, .aux_event =3D a } =20 struct perf_mem_event perf_mem_events_power[PERF_MEM_EVENTS__MAX] =3D { - E("ldlat-loads", "%s/mem-loads/", "cpu/events/mem-loads", false, 0), - E("ldlat-stores", "%s/mem-stores/", "cpu/events/mem-stores", false, 0), - E(NULL, NULL, NULL, false, 0), + E("ldlat-loads", "%s/mem-loads/", "mem-loads", false, 0), + E("ldlat-stores", "%s/mem-stores/", "mem-stores", false, 0), + E(NULL, NULL, NULL, false, 0), }; diff --git a/tools/perf/arch/x86/util/mem-events.c b/tools/perf/arch/x86/ut= il/mem-events.c index f0e66a0151a0..b776d849fc64 100644 --- a/tools/perf/arch/x86/util/mem-events.c +++ b/tools/perf/arch/x86/util/mem-events.c @@ -9,24 +9,24 @@ =20 #define MEM_LOADS_AUX 0x8203 =20 -#define E(t, n, s, l, a) { .tag =3D t, .name =3D n, .sysfs_name =3D s, .ld= lat =3D l, .aux_event =3D a } +#define E(t, n, s, l, a) { .tag =3D t, .name =3D n, .event_name =3D s, .ld= lat =3D l, .aux_event =3D a } =20 struct perf_mem_event perf_mem_events_intel[PERF_MEM_EVENTS__MAX] =3D { - E("ldlat-loads", "%s/mem-loads,ldlat=3D%u/P", "%s/events/mem-loads", true= , 0), - E("ldlat-stores", "%s/mem-stores/P", "%s/events/mem-stores", false, 0), - E(NULL, NULL, NULL, false, 0), + E("ldlat-loads", "%s/mem-loads,ldlat=3D%u/P", "mem-loads", true, 0), + E("ldlat-stores", "%s/mem-stores/P", "mem-stores", false, 0), + E(NULL, NULL, NULL, false, 0), }; =20 struct perf_mem_event perf_mem_events_intel_aux[PERF_MEM_EVENTS__MAX] =3D { - E("ldlat-loads", "{%s/mem-loads-aux/,%s/mem-loads,ldlat=3D%u/}:P", "%s/ev= ents/mem-loads", true, MEM_LOADS_AUX), - E("ldlat-stores", "%s/mem-stores/P", "%s/events/mem-stores", false, 0), - E(NULL, NULL, NULL, false, 0), + E("ldlat-loads", "{%s/mem-loads-aux/,%s/mem-loads,ldlat=3D%u/}:P", "mem-l= oads", true, MEM_LOADS_AUX), + E("ldlat-stores", "%s/mem-stores/P", "mem-stores", false, 0), + E(NULL, NULL, NULL, false, 0), }; =20 struct perf_mem_event perf_mem_events_amd[PERF_MEM_EVENTS__MAX] =3D { - E(NULL, NULL, NULL, false, 0), - E(NULL, NULL, NULL, false, 0), - E("mem-ldst", "%s//", "ibs_op", false, 0), + E(NULL, NULL, NULL, false, 0), + E(NULL, NULL, NULL, false, 0), + E("mem-ldst", "%s//", NULL, false, 0), }; =20 bool is_mem_loads_aux_event(struct evsel *leader) diff --git a/tools/perf/util/mem-events.c b/tools/perf/util/mem-events.c index 51e53e33df03..32890848bb3d 100644 --- a/tools/perf/util/mem-events.c +++ b/tools/perf/util/mem-events.c @@ -17,12 +17,12 @@ =20 unsigned int perf_mem_events__loads_ldlat =3D 30; =20 -#define E(t, n, s, l, a) { .tag =3D t, .name =3D n, .sysfs_name =3D s, .ld= lat =3D l, .aux_event =3D a } +#define E(t, n, s, l, a) { .tag =3D t, .name =3D n, .event_name =3D s, .ld= lat =3D l, .aux_event =3D a } =20 struct perf_mem_event perf_mem_events[PERF_MEM_EVENTS__MAX] =3D { - E("ldlat-loads", "%s/mem-loads,ldlat=3D%u/P", "cpu/events/mem-loads", tr= ue, 0), - E("ldlat-stores", "%s/mem-stores/P", "cpu/events/mem-stores", false, 0), - E(NULL, NULL, NULL, false, 0), + E("ldlat-loads", "%s/mem-loads,ldlat=3D%u/P", "mem-loads", true, 0), + E("ldlat-stores", "%s/mem-stores/P", "mem-stores", false, 0), + E(NULL, NULL, NULL, false, 0), }; #undef E =20 @@ -151,15 +151,17 @@ int perf_pmu__mem_events_parse(struct perf_pmu *pmu, = const char *str) return -1; } =20 -static bool perf_mem_event__supported(const char *mnt, struct perf_pmu *pm= u, +static bool perf_pmu__mem_events_supported(const char *mnt, struct perf_pm= u *pmu, struct perf_mem_event *e) { - char sysfs_name[100]; char path[PATH_MAX]; struct stat st; =20 - scnprintf(sysfs_name, sizeof(sysfs_name), e->sysfs_name, pmu->name); - scnprintf(path, PATH_MAX, "%s/devices/%s", mnt, sysfs_name); + if (!e->event_name) + return true; + + scnprintf(path, PATH_MAX, "%s/devices/%s/events/%s", mnt, pmu->name, e->e= vent_name); + return !stat(path, &st); } =20 @@ -182,7 +184,7 @@ int perf_pmu__mem_events_init(struct perf_pmu *pmu) if (!e->tag) continue; =20 - e->supported |=3D perf_mem_event__supported(mnt, pmu, e); + e->supported |=3D perf_pmu__mem_events_supported(mnt, pmu, e); if (e->supported) found =3D true; } @@ -234,7 +236,7 @@ int perf_mem_events__record_args(const char **rec_argv,= int *argv_nr, } else { const char *s =3D perf_pmu__mem_events_name(j, pmu); =20 - if (!perf_mem_event__supported(mnt, pmu, e)) + if (!perf_pmu__mem_events_supported(mnt, pmu, e)) continue; =20 rec_argv[i++] =3D "-e"; diff --git a/tools/perf/util/mem-events.h b/tools/perf/util/mem-events.h index 79d342768d12..f817a507b106 100644 --- a/tools/perf/util/mem-events.h +++ b/tools/perf/util/mem-events.h @@ -18,7 +18,7 @@ struct perf_mem_event { u32 aux_event; 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13 Dec 2023 11:52:07 -0800 From: kan.liang@linux.intel.com To: acme@kernel.org, irogers@google.com, peterz@infradead.org, mingo@redhat.com, namhyung@kernel.org, jolsa@kernel.org, adrian.hunter@intel.com, john.g.garry@oracle.com, will@kernel.org, james.clark@arm.com, mike.leach@linaro.org, leo.yan@linaro.org, yuhaixin.yhx@linux.alibaba.com, renyu.zj@linux.alibaba.com, tmricht@linux.ibm.com, ravi.bangoria@amd.com, atrajeev@linux.vnet.ibm.com, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Kan Liang Subject: [PATCH V3 5/7] perf mem: Clean up is_mem_loads_aux_event() Date: Wed, 13 Dec 2023 11:51:52 -0800 Message-Id: <20231213195154.1085945-6-kan.liang@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20231213195154.1085945-1-kan.liang@linux.intel.com> References: <20231213195154.1085945-1-kan.liang@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Kan Liang The aux_event can be retrieved from the perf_pmu now. Implement a generic support. Reviewed-by: Ian Rogers Tested-by: Ravi Bangoria Signed-off-by: Kan Liang Reviewed-by: Leo Yan Tested-by: Leo Yan --- tools/perf/arch/x86/util/mem-events.c | 23 ++++------------------- tools/perf/util/mem-events.c | 14 ++++++++++++-- 2 files changed, 16 insertions(+), 21 deletions(-) diff --git a/tools/perf/arch/x86/util/mem-events.c b/tools/perf/arch/x86/ut= il/mem-events.c index b776d849fc64..62df03e91c7e 100644 --- a/tools/perf/arch/x86/util/mem-events.c +++ b/tools/perf/arch/x86/util/mem-events.c @@ -1,11 +1,9 @@ // SPDX-License-Identifier: GPL-2.0 -#include "util/pmu.h" -#include "util/pmus.h" -#include "util/env.h" -#include "map_symbol.h" -#include "mem-events.h" #include "linux/string.h" -#include "env.h" +#include "util/map_symbol.h" +#include "util/mem-events.h" +#include "mem-events.h" + =20 #define MEM_LOADS_AUX 0x8203 =20 @@ -28,16 +26,3 @@ struct perf_mem_event perf_mem_events_amd[PERF_MEM_EVENT= S__MAX] =3D { E(NULL, NULL, NULL, false, 0), E("mem-ldst", "%s//", NULL, false, 0), }; - -bool is_mem_loads_aux_event(struct evsel *leader) -{ - struct perf_pmu *pmu =3D perf_pmus__find("cpu"); - - if (!pmu) - pmu =3D perf_pmus__find("cpu_core"); - - if (pmu && !perf_pmu__have_event(pmu, "mem-loads-aux")) - return false; - - return leader->core.attr.config =3D=3D MEM_LOADS_AUX; -} diff --git a/tools/perf/util/mem-events.c b/tools/perf/util/mem-events.c index 32890848bb3d..7d7df3d0b2b9 100644 --- a/tools/perf/util/mem-events.c +++ b/tools/perf/util/mem-events.c @@ -107,9 +107,19 @@ static const char *perf_pmu__mem_events_name(int i, st= ruct perf_pmu *pmu) return NULL; } =20 -__weak bool is_mem_loads_aux_event(struct evsel *leader __maybe_unused) +bool is_mem_loads_aux_event(struct evsel *leader) { - return false; + struct perf_pmu *pmu =3D leader->pmu; + struct perf_mem_event *e; + + if (!pmu || !pmu->mem_events) + return false; + + e =3D &pmu->mem_events[PERF_MEM_EVENTS__LOAD]; + if (!e->aux_event) + return false; + + return leader->core.attr.config =3D=3D e->aux_event; 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13 Dec 2023 11:52:08 -0800 From: kan.liang@linux.intel.com To: acme@kernel.org, irogers@google.com, peterz@infradead.org, mingo@redhat.com, namhyung@kernel.org, jolsa@kernel.org, adrian.hunter@intel.com, john.g.garry@oracle.com, will@kernel.org, james.clark@arm.com, mike.leach@linaro.org, leo.yan@linaro.org, yuhaixin.yhx@linux.alibaba.com, renyu.zj@linux.alibaba.com, tmricht@linux.ibm.com, ravi.bangoria@amd.com, atrajeev@linux.vnet.ibm.com, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Kan Liang Subject: [PATCH V3 6/7] perf mem: Clean up perf_mem_events__record_args() Date: Wed, 13 Dec 2023 11:51:53 -0800 Message-Id: <20231213195154.1085945-7-kan.liang@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20231213195154.1085945-1-kan.liang@linux.intel.com> References: <20231213195154.1085945-1-kan.liang@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Kan Liang The current code iterates all memory PMUs. It doesn't matter if the system has only one memory PMU or multiple PMUs. The check of perf_pmus__num_mem_pmus() is not required anymore. The rec_tmp is not used in c2c and mem. Removing them as well. Suggested-by: Leo Yan Signed-off-by: Kan Liang Reviewed-by: Leo Yan Tested-by: Leo Yan --- tools/perf/builtin-c2c.c | 15 ++------------- tools/perf/builtin-mem.c | 18 ++---------------- tools/perf/util/mem-events.c | 34 ++++++++++++---------------------- tools/perf/util/mem-events.h | 3 +-- 4 files changed, 17 insertions(+), 53 deletions(-) diff --git a/tools/perf/builtin-c2c.c b/tools/perf/builtin-c2c.c index 838481505e08..3bcb903b6b38 100644 --- a/tools/perf/builtin-c2c.c +++ b/tools/perf/builtin-c2c.c @@ -3245,9 +3245,8 @@ static const char * const *record_mem_usage =3D __usa= ge_record; =20 static int perf_c2c__record(int argc, const char **argv) { - int rec_argc, i =3D 0, j, rec_tmp_nr =3D 0; + int rec_argc, i =3D 0, j; const char **rec_argv; - char **rec_tmp; int ret; bool all_user =3D false, all_kernel =3D false; bool event_set =3D false; @@ -3285,12 +3284,6 @@ static int perf_c2c__record(int argc, const char **a= rgv) if (!rec_argv) return -1; =20 - rec_tmp =3D calloc(rec_argc + 1, sizeof(char *)); - if (!rec_tmp) { - free(rec_argv); - return -1; - } - rec_argv[i++] =3D "record"; =20 if (!event_set) { @@ -3319,7 +3312,7 @@ static int perf_c2c__record(int argc, const char **ar= gv) rec_argv[i++] =3D "--phys-data"; rec_argv[i++] =3D "--sample-cpu"; =20 - ret =3D perf_mem_events__record_args(rec_argv, &i, rec_tmp, &rec_tmp_nr); + ret =3D perf_mem_events__record_args(rec_argv, &i); if (ret) goto out; =20 @@ -3346,10 +3339,6 @@ static int perf_c2c__record(int argc, const char **a= rgv) =20 ret =3D cmd_record(i, rec_argv); out: - for (i =3D 0; i < rec_tmp_nr; i++) - free(rec_tmp[i]); - - free(rec_tmp); free(rec_argv); return ret; } diff --git a/tools/perf/builtin-mem.c b/tools/perf/builtin-mem.c index ef64bae77ca7..1d92e309c97c 100644 --- a/tools/perf/builtin-mem.c +++ b/tools/perf/builtin-mem.c @@ -72,10 +72,9 @@ static const char * const *record_mem_usage =3D __usage; =20 static int __cmd_record(int argc, const char **argv, struct perf_mem *mem) { - int rec_argc, i =3D 0, j, tmp_nr =3D 0; + int rec_argc, i =3D 0, j; int start, end; const char **rec_argv; - char **rec_tmp; int ret; bool all_user =3D false, all_kernel =3D false; struct perf_mem_event *e; @@ -116,15 +115,6 @@ static int __cmd_record(int argc, const char **argv, s= truct perf_mem *mem) if (!rec_argv) return -1; =20 - /* - * Save the allocated event name strings. - */ - rec_tmp =3D calloc(rec_argc + 1, sizeof(char *)); - if (!rec_tmp) { - free(rec_argv); - return -1; - } - rec_argv[i++] =3D "record"; =20 e =3D perf_pmu__mem_events_ptr(pmu, PERF_MEM_EVENTS__LOAD_STORE); @@ -163,7 +153,7 @@ static int __cmd_record(int argc, const char **argv, st= ruct perf_mem *mem) rec_argv[i++] =3D "--data-page-size"; =20 start =3D i; - ret =3D perf_mem_events__record_args(rec_argv, &i, rec_tmp, &tmp_nr); + ret =3D perf_mem_events__record_args(rec_argv, &i); if (ret) goto out; end =3D i; @@ -193,10 +183,6 @@ static int __cmd_record(int argc, const char **argv, s= truct perf_mem *mem) =20 ret =3D cmd_record(i, rec_argv); out: - for (i =3D 0; i < tmp_nr; i++) - free(rec_tmp[i]); - - free(rec_tmp); free(rec_argv); return ret; } diff --git a/tools/perf/util/mem-events.c b/tools/perf/util/mem-events.c index 7d7df3d0b2b9..a20611b4fb1b 100644 --- a/tools/perf/util/mem-events.c +++ b/tools/perf/util/mem-events.c @@ -218,14 +218,14 @@ void perf_pmu__mem_events_list(struct perf_pmu *pmu) } } =20 -int perf_mem_events__record_args(const char **rec_argv, int *argv_nr, - char **rec_tmp, int *tmp_nr) +int perf_mem_events__record_args(const char **rec_argv, int *argv_nr) { const char *mnt =3D sysfs__mount(); struct perf_pmu *pmu =3D NULL; - int i =3D *argv_nr, k =3D 0; struct perf_mem_event *e; - + int i =3D *argv_nr; + const char *s; + char *copy; =20 while ((pmu =3D perf_pmus__scan_mem(pmu)) !=3D NULL) { for (int j =3D 0; j < PERF_MEM_EVENTS__MAX; j++) { @@ -240,30 +240,20 @@ int perf_mem_events__record_args(const char **rec_arg= v, int *argv_nr, return -1; } =20 - if (perf_pmus__num_mem_pmus() =3D=3D 1) { - rec_argv[i++] =3D "-e"; - rec_argv[i++] =3D perf_pmu__mem_events_name(j, pmu); - } else { - const char *s =3D perf_pmu__mem_events_name(j, pmu); - - if (!perf_pmu__mem_events_supported(mnt, pmu, e)) - continue; + s =3D perf_pmu__mem_events_name(j, pmu); + if (!s || !perf_pmu__mem_events_supported(mnt, pmu, e)) + continue; =20 - rec_argv[i++] =3D "-e"; - if (s) { - char *copy =3D strdup(s); - if (!copy) - return -1; + copy =3D strdup(s); + if (!copy) + return -1; =20 - rec_argv[i++] =3D copy; - rec_tmp[k++] =3D copy; - } - } + rec_argv[i++] =3D "-e"; + rec_argv[i++] =3D copy; } } =20 *argv_nr =3D i; - *tmp_nr =3D k; return 0; } =20 diff --git a/tools/perf/util/mem-events.h b/tools/perf/util/mem-events.h index f817a507b106..c97cd3caa766 100644 --- a/tools/perf/util/mem-events.h +++ b/tools/perf/util/mem-events.h @@ -46,8 +46,7 @@ struct perf_pmu *perf_mem_events_find_pmu(void); bool is_mem_loads_aux_event(struct evsel *leader); =20 void perf_pmu__mem_events_list(struct perf_pmu *pmu); -int perf_mem_events__record_args(const char **rec_argv, int *argv_nr, - char **rec_tmp, int *tmp_nr); +int perf_mem_events__record_args(const char **rec_argv, int *argv_nr); =20 int perf_mem__tlb_scnprintf(char *out, size_t sz, struct mem_info *mem_inf= o); int perf_mem__lvl_scnprintf(char *out, size_t sz, struct mem_info *mem_inf= o); --=20 2.35.1 From nobody Sun Dec 28 00:57:32 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 19EA7C4332F for ; Wed, 13 Dec 2023 19:54:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1442557AbjLMTxv (ORCPT ); Wed, 13 Dec 2023 14:53:51 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34318 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235485AbjLMTxX (ORCPT ); Wed, 13 Dec 2023 14:53:23 -0500 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BC9E4D68; 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a="917772584" X-IronPort-AV: E=Sophos;i="6.04,273,1695711600"; d="scan'208";a="917772584" Received: from kanliang-dev.jf.intel.com ([10.165.154.102]) by fmsmga001.fm.intel.com with ESMTP; 13 Dec 2023 11:52:09 -0800 From: kan.liang@linux.intel.com To: acme@kernel.org, irogers@google.com, peterz@infradead.org, mingo@redhat.com, namhyung@kernel.org, jolsa@kernel.org, adrian.hunter@intel.com, john.g.garry@oracle.com, will@kernel.org, james.clark@arm.com, mike.leach@linaro.org, leo.yan@linaro.org, yuhaixin.yhx@linux.alibaba.com, renyu.zj@linux.alibaba.com, tmricht@linux.ibm.com, ravi.bangoria@amd.com, atrajeev@linux.vnet.ibm.com, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Kan Liang Subject: [PATCH V3 7/7] perf mem: Clean up perf_pmus__num_mem_pmus() Date: Wed, 13 Dec 2023 11:51:54 -0800 Message-Id: <20231213195154.1085945-8-kan.liang@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20231213195154.1085945-1-kan.liang@linux.intel.com> References: <20231213195154.1085945-1-kan.liang@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Kan Liang The number of mem PMUs can be calculated by searching the perf_pmus__scan_mem(). Remove the ARCH specific perf_pmus__num_mem_pmus() Signed-off-by: Kan Liang Reviewed-by: Leo Yan Tested-by: Leo Yan --- tools/perf/arch/x86/util/pmu.c | 10 ---------- tools/perf/builtin-c2c.c | 2 +- tools/perf/builtin-mem.c | 2 +- tools/perf/util/mem-events.c | 14 ++++++++++++++ tools/perf/util/mem-events.h | 1 + tools/perf/util/pmus.c | 6 ------ tools/perf/util/pmus.h | 1 - 7 files changed, 17 insertions(+), 19 deletions(-) diff --git a/tools/perf/arch/x86/util/pmu.c b/tools/perf/arch/x86/util/pmu.c index 0f49ff13cfe2..c3d89d6ba1bf 100644 --- a/tools/perf/arch/x86/util/pmu.c +++ b/tools/perf/arch/x86/util/pmu.c @@ -42,13 +42,3 @@ void perf_pmu__arch_init(struct perf_pmu *pmu __maybe_un= used) pmu->mem_events =3D perf_mem_events_intel; } } - -int perf_pmus__num_mem_pmus(void) -{ - /* AMD uses IBS OP pmu and not a core PMU for perf mem/c2c */ - if (x86__is_amd_cpu()) - return 1; - - /* Intel uses core pmus for perf mem/c2c */ - return perf_pmus__num_core_pmus(); -} diff --git a/tools/perf/builtin-c2c.c b/tools/perf/builtin-c2c.c index 3bcb903b6b38..16b40f5d43db 100644 --- a/tools/perf/builtin-c2c.c +++ b/tools/perf/builtin-c2c.c @@ -3278,7 +3278,7 @@ static int perf_c2c__record(int argc, const char **ar= gv) PARSE_OPT_KEEP_UNKNOWN); =20 /* Max number of arguments multiplied by number of PMUs that can support = them. */ - rec_argc =3D argc + 11 * perf_pmus__num_mem_pmus(); + rec_argc =3D argc + 11 * (perf_pmu__mem_events_num_mem_pmus(pmu) + 1); =20 rec_argv =3D calloc(rec_argc + 1, sizeof(char *)); if (!rec_argv) diff --git a/tools/perf/builtin-mem.c b/tools/perf/builtin-mem.c index 1d92e309c97c..5b851e64e4a1 100644 --- a/tools/perf/builtin-mem.c +++ b/tools/perf/builtin-mem.c @@ -106,7 +106,7 @@ static int __cmd_record(int argc, const char **argv, st= ruct perf_mem *mem) PARSE_OPT_KEEP_UNKNOWN); =20 /* Max number of arguments multiplied by number of PMUs that can support = them. */ - rec_argc =3D argc + 9 * perf_pmus__num_mem_pmus(); + rec_argc =3D argc + 9 * (perf_pmu__mem_events_num_mem_pmus(pmu) + 1); =20 if (mem->cpu_list) rec_argc +=3D 2; diff --git a/tools/perf/util/mem-events.c b/tools/perf/util/mem-events.c index a20611b4fb1b..637cbd4a7bfb 100644 --- a/tools/perf/util/mem-events.c +++ b/tools/perf/util/mem-events.c @@ -62,6 +62,20 @@ struct perf_pmu *perf_mem_events_find_pmu(void) return perf_pmus__scan_mem(NULL); } =20 +/** + * perf_pmu__mem_events_num_mem_pmus - Get the number of mem PMUs since th= e given pmu + * @pmu: Start pmu. If it's NULL, search the entire PMU list. + */ +int perf_pmu__mem_events_num_mem_pmus(struct perf_pmu *pmu) +{ + int num =3D 0; + + while ((pmu =3D perf_pmus__scan_mem(pmu)) !=3D NULL) + num++; + + return num; +} + static const char *perf_pmu__mem_events_name(int i, struct perf_pmu *pmu) { struct perf_mem_event *e; diff --git a/tools/perf/util/mem-events.h b/tools/perf/util/mem-events.h index c97cd3caa766..15d5f0320d27 100644 --- a/tools/perf/util/mem-events.h +++ b/tools/perf/util/mem-events.h @@ -43,6 +43,7 @@ int perf_pmu__mem_events_init(struct perf_pmu *pmu); =20 struct perf_mem_event *perf_pmu__mem_events_ptr(struct perf_pmu *pmu, int = i); struct perf_pmu *perf_mem_events_find_pmu(void); +int perf_pmu__mem_events_num_mem_pmus(struct perf_pmu *pmu); bool is_mem_loads_aux_event(struct evsel *leader); =20 void perf_pmu__mem_events_list(struct perf_pmu *pmu); diff --git a/tools/perf/util/pmus.c b/tools/perf/util/pmus.c index ce4931461741..16505071d362 100644 --- a/tools/perf/util/pmus.c +++ b/tools/perf/util/pmus.c @@ -345,12 +345,6 @@ const struct perf_pmu *perf_pmus__pmu_for_pmu_filter(c= onst char *str) return NULL; } =20 -int __weak perf_pmus__num_mem_pmus(void) -{ - /* All core PMUs are for mem events. */ - return perf_pmus__num_core_pmus(); -} - /** Struct for ordering events as output in perf list. */ struct sevent { /** PMU for event. */ diff --git a/tools/perf/util/pmus.h b/tools/perf/util/pmus.h index 4c67153ac257..94d2a08d894b 100644 --- a/tools/perf/util/pmus.h +++ b/tools/perf/util/pmus.h @@ -17,7 +17,6 @@ struct perf_pmu *perf_pmus__scan_core(struct perf_pmu *pm= u); =20 const struct perf_pmu *perf_pmus__pmu_for_pmu_filter(const char *str); =20 -int perf_pmus__num_mem_pmus(void); void perf_pmus__print_pmu_events(const struct print_callbacks *print_cb, v= oid *print_state); bool perf_pmus__have_event(const char *pname, const char *name); int perf_pmus__num_core_pmus(void); --=20 2.35.1