From nobody Fri Dec 19 04:18:12 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1D193C4332F for ; Wed, 13 Dec 2023 19:51:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233781AbjLMTvZ (ORCPT ); Wed, 13 Dec 2023 14:51:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54428 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233170AbjLMTvW (ORCPT ); Wed, 13 Dec 2023 14:51:22 -0500 Received: from mail-wm1-x334.google.com (mail-wm1-x334.google.com [IPv6:2a00:1450:4864:20::334]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 26D88D0; Wed, 13 Dec 2023 11:51:29 -0800 (PST) Received: by mail-wm1-x334.google.com with SMTP id 5b1f17b1804b1-40c580ba223so17946695e9.3; Wed, 13 Dec 2023 11:51:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1702497087; x=1703101887; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ERQju2Bh+K8GCwYjh7yY4rIstgFgSHVz3s7kTSLi67E=; b=PxZpM4VqAjX3hh3w7KfL7gHasGC60x2FIBV0oJfRcWeCf730qRvLCvHEv4cbtm4f9w H64G85TBhH4YvcQaScyCHw3FpcTADlrtONEAaXTVVMQu9TLJ19BbvRtZaZlokbjkc8hJ yWLvUthOomVkZM2wr7Bgbr8uvyRUHwJFW77Y5PIL1twF2TYLkUhxx3A+RspE82hdSMUf JbWUnMMpp8sfQkTpc/BKk86R1r8Xf5jKCAArMXJf+ARu2hMxw0mM7A9cxmkvNMs3Ma2m 0lG8WQY116WdWGTDkhZKuHuVwqfYGRdG5y4Ctjh1UovgRYySbtkVKETXxCI/babj0X7O wIzA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702497087; x=1703101887; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ERQju2Bh+K8GCwYjh7yY4rIstgFgSHVz3s7kTSLi67E=; b=blNblyK/bKxDkfKd4vmOx30ygSiKC9vU6brHtyV9JDFPEpjpl7nopnNmOmWYEShuZh EuRST/QEUaaOJARtktpcob5zDQHNSZ3xcAHLnxnVXmFT8FIBF/cTVY4Wb2Yun8bMVPsR zOrPOKRQH5HGIK4LA9bZbIhnieQU9k9nhO3ZmC9u4dieF0QA6OfkUHbke5F0/xdoZNnI HEMc5669MmrBtglMSOnPyslvcTh9ShokI9/yRX0RBay83NacixGayNuLEbYQd9iHJwFa +oVKfhMV8bO9ZwFL8Z0h6Q4GG4hNLQWJWPGww73zd8ePp752gMAJKAv0aZnHLkBUDmiy l8Og== X-Gm-Message-State: AOJu0YxU43Ff2dCXKCTEDVHJKPTEXe1b70xTznpIMsNIBdSLW5tfb8ij C7rE/mYvyQ1I82Lb2iSsUQ== X-Google-Smtp-Source: AGHT+IFubGXtBYJHwawt+OjhdiJA2OK0SDjjVKO0Bx22olt+rzUfmcB1mZ2doozRlrhYe+3xiI98xg== X-Received: by 2002:a05:600c:54f1:b0:40b:5e21:dd2a with SMTP id jb17-20020a05600c54f100b0040b5e21dd2amr4691135wmb.88.1702497087589; Wed, 13 Dec 2023 11:51:27 -0800 (PST) Received: from U4.lan ([2a02:810b:f40:4300:92dc:8b1c:e01c:b93c]) by smtp.gmail.com with ESMTPSA id fm14-20020a05600c0c0e00b00407b93d8085sm24050698wmb.27.2023.12.13.11.51.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Dec 2023 11:51:27 -0800 (PST) From: Alex Bee To: Sandy Huang , =?UTF-8?q?Heiko=20St=C3=BCbner?= , Andy Yan , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann Cc: David Airlie , Daniel Vetter , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Alex Bee Subject: [PATCH 01/11] dt-bindings: display: rockchip,inno-hdmi: Document RK3128 compatible Date: Wed, 13 Dec 2023 20:51:15 +0100 Message-ID: <20231213195125.212923-2-knaerzche@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231213195125.212923-1-knaerzche@gmail.com> References: <20231213195125.212923-1-knaerzche@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Document the compatible for RK3128's HDMI controller block. The integration for this SoC is somewhat different here: It needs the PHY's reference clock rate to calculate the ddc bus frequency correctly. This clock is part of a power-domain (PD_VIO), so this gets added as an optional property too. Signed-off-by: Alex Bee --- .../display/rockchip/rockchip,inno-hdmi.yaml | 30 +++++++++++++++++-- 1 file changed, 28 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,in= no-hdmi.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,= inno-hdmi.yaml index 96889c86849a..9f00abcbfb38 100644 --- a/Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi= .yaml +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,inno-hdmi= .yaml @@ -14,6 +14,7 @@ properties: compatible: enum: - rockchip,rk3036-inno-hdmi + - rockchip,rk3128-inno-hdmi =20 reg: maxItems: 1 @@ -22,10 +23,21 @@ properties: maxItems: 1 =20 clocks: - maxItems: 1 + minItems: 1 + items: + - description: The HDMI controller main clock + - description: The HDMI PHY reference clock =20 clock-names: - const: pclk + minItems: 1 + items: + - const: pclk + - enum: + - pclk + - ref + + power-domains: + maxItems: 1 =20 ports: $ref: /schemas/graph.yaml#/properties/ports @@ -55,6 +67,20 @@ required: - pinctrl-names - ports =20 +allOf: + - if: + properties: + compatible: + contains: + const: rockchip,rk3128-inno-hdmi + + then: + properties: + clocks: + minItems: 2 + clock-names: + minItems: 2 + additionalProperties: false =20 examples: --=20 2.43.0 From nobody Fri Dec 19 04:18:12 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C2732C4167D for ; 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Wed, 13 Dec 2023 11:51:28 -0800 (PST) Received: from U4.lan ([2a02:810b:f40:4300:92dc:8b1c:e01c:b93c]) by smtp.gmail.com with ESMTPSA id fm14-20020a05600c0c0e00b00407b93d8085sm24050698wmb.27.2023.12.13.11.51.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Dec 2023 11:51:27 -0800 (PST) From: Alex Bee To: Sandy Huang , =?UTF-8?q?Heiko=20St=C3=BCbner?= , Andy Yan , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann Cc: David Airlie , Daniel Vetter , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Alex Bee Subject: [PATCH 02/11] drm/rockchip: vop: Add output selection registers for RK312x Date: Wed, 13 Dec 2023 20:51:16 +0100 Message-ID: <20231213195125.212923-3-knaerzche@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231213195125.212923-1-knaerzche@gmail.com> References: <20231213195125.212923-1-knaerzche@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" In contrast to RK3036, RK312x SoCs have multiple output channels such as RGB (i.e. LVDS TTL), LVDS, DSI and HDMI. In order to support that, this adds a new vop_output struct for rk3126_vop with the registers required to enable the appropriate output and setup the correct polarity. Signed-off-by: Alex Bee --- drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 13 ++++++++++++- drivers/gpu/drm/rockchip/rockchip_vop_reg.h | 3 +++ 2 files changed, 15 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/= rockchip/rockchip_vop_reg.c index c51ca82320cb..b9ee02061d5b 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c @@ -227,11 +227,22 @@ static const struct vop_win_data rk3126_vop_win_data[= ] =3D { .type =3D DRM_PLANE_TYPE_CURSOR }, }; =20 +static const struct vop_output rk3126_output =3D { + .pin_pol =3D VOP_REG(RK3036_DSP_CTRL0, 0xf, 4), + .hdmi_pin_pol =3D VOP_REG(RK3126_INT_SCALER, 0x7, 4), + .hdmi_en =3D VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 22), + .hdmi_dclk_pol =3D VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 23), + .rgb_en =3D VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 24), + .rgb_dclk_pol =3D VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 25), + .mipi_en =3D VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 28), + .mipi_dclk_pol =3D VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 29), +}; + static const struct vop_data rk3126_vop =3D { .intr =3D &rk3036_intr, .common =3D &rk3036_common, .modeset =3D &rk3036_modeset, - .output =3D &rk3036_output, + .output =3D &rk3126_output, .win =3D rk3126_vop_win_data, .win_size =3D ARRAY_SIZE(rk3126_vop_win_data), .max_output =3D { 1920, 1080 }, diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.h b/drivers/gpu/drm/= rockchip/rockchip_vop_reg.h index 406e981c75bd..fbf1bcc68625 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.h +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.h @@ -872,6 +872,9 @@ /* rk3036 register definition end */ =20 /* rk3126 register definition */ +#define RK3126_INT_SCALER 0x0c + +/* win1 register */ #define RK3126_WIN1_MST 0x4c #define RK3126_WIN1_DSP_INFO 0x50 #define RK3126_WIN1_DSP_ST 0x54 --=20 2.43.0 From nobody Fri Dec 19 04:18:12 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8A450C4332F for ; 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Wed, 13 Dec 2023 11:51:28 -0800 (PST) Received: from U4.lan ([2a02:810b:f40:4300:92dc:8b1c:e01c:b93c]) by smtp.gmail.com with ESMTPSA id fm14-20020a05600c0c0e00b00407b93d8085sm24050698wmb.27.2023.12.13.11.51.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Dec 2023 11:51:28 -0800 (PST) From: Alex Bee To: Sandy Huang , =?UTF-8?q?Heiko=20St=C3=BCbner?= , Andy Yan , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann Cc: David Airlie , Daniel Vetter , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Alex Bee , Zheng Yang Subject: [PATCH 03/11] drm/rockchip: inno_hdmi: Fix video timing Date: Wed, 13 Dec 2023 20:51:17 +0100 Message-ID: <20231213195125.212923-4-knaerzche@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231213195125.212923-1-knaerzche@gmail.com> References: <20231213195125.212923-1-knaerzche@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The controller wants the difference between *total and *sync_start in the HDMI_VIDEO_EXT_*DELAY registers. Otherwise the signal is very unstable for certain non-VIC modes. See downstream commit [0] [0] https://github.com/rockchip-linux/kernel/commit/8eb559f2502c Fixes: 412d4ae6b7a5 ("drm/rockchip: hdmi: add Innosilicon HDMI support") Co-developed-by: Zheng Yang Signed-off-by: Zheng Yang Signed-off-by: Alex Bee --- drivers/gpu/drm/rockchip/inno_hdmi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/rockchip/inno_hdmi.c b/drivers/gpu/drm/rockchi= p/inno_hdmi.c index 6e5b922a121e..345253e033c5 100644 --- a/drivers/gpu/drm/rockchip/inno_hdmi.c +++ b/drivers/gpu/drm/rockchip/inno_hdmi.c @@ -412,7 +412,7 @@ static int inno_hdmi_config_video_timing(struct inno_hd= mi *hdmi, hdmi_writeb(hdmi, HDMI_VIDEO_EXT_HBLANK_L, value & 0xFF); hdmi_writeb(hdmi, HDMI_VIDEO_EXT_HBLANK_H, (value >> 8) & 0xFF); =20 - value =3D mode->hsync_start - mode->hdisplay; + value =3D mode->htotal - mode->hsync_start; hdmi_writeb(hdmi, HDMI_VIDEO_EXT_HDELAY_L, value & 0xFF); hdmi_writeb(hdmi, HDMI_VIDEO_EXT_HDELAY_H, (value >> 8) & 0xFF); =20 @@ -427,7 +427,7 @@ static int inno_hdmi_config_video_timing(struct inno_hd= mi *hdmi, value =3D mode->vtotal - mode->vdisplay; hdmi_writeb(hdmi, HDMI_VIDEO_EXT_VBLANK, value & 0xFF); =20 - value =3D mode->vsync_start - mode->vdisplay; + value =3D mode->vtotal - mode->vsync_start; hdmi_writeb(hdmi, HDMI_VIDEO_EXT_VDELAY, value & 0xFF); =20 value =3D mode->vsync_end - mode->vsync_start; --=20 2.43.0 From nobody Fri Dec 19 04:18:12 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 72E4CC4167D for ; Wed, 13 Dec 2023 19:51:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233797AbjLMTvh (ORCPT ); Wed, 13 Dec 2023 14:51:37 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54482 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1377931AbjLMTvY (ORCPT ); Wed, 13 Dec 2023 14:51:24 -0500 Received: from mail-wm1-x32f.google.com (mail-wm1-x32f.google.com [IPv6:2a00:1450:4864:20::32f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 224F2DC; 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Wed, 13 Dec 2023 11:51:29 -0800 (PST) From: Alex Bee To: Sandy Huang , =?UTF-8?q?Heiko=20St=C3=BCbner?= , Andy Yan , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann Cc: David Airlie , Daniel Vetter , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Alex Bee Subject: [PATCH 04/11] drm/rockchip: inno_hdmi: Correctly setup HDMI quantization range Date: Wed, 13 Dec 2023 20:51:18 +0100 Message-ID: <20231213195125.212923-5-knaerzche@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231213195125.212923-1-knaerzche@gmail.com> References: <20231213195125.212923-1-knaerzche@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The display controller will always give full range RGB regardless of the mode set, but HDMI requires certain modes to be transmitted in limited range RGB. This is especially required for HDMI sinks which do not support non-standard quantization ranges. This enables color space conversion for those modes and sets the quantization range accordingly in the AVI infoframe. Fixes: 412d4ae6b7a5 ("drm/rockchip: hdmi: add Innosilicon HDMI support") Signed-off-by: Alex Bee --- drivers/gpu/drm/rockchip/inno_hdmi.c | 40 ++++++++++++++++++++++------ 1 file changed, 32 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/rockchip/inno_hdmi.c b/drivers/gpu/drm/rockchi= p/inno_hdmi.c index 345253e033c5..32626a75723c 100644 --- a/drivers/gpu/drm/rockchip/inno_hdmi.c +++ b/drivers/gpu/drm/rockchip/inno_hdmi.c @@ -33,6 +33,7 @@ struct hdmi_data_info { unsigned int enc_in_format; unsigned int enc_out_format; unsigned int colorimetry; + bool rgb_limited_range; }; =20 struct inno_hdmi_i2c { @@ -308,6 +309,18 @@ static int inno_hdmi_config_video_avi(struct inno_hdmi= *hdmi, else frame.avi.colorspace =3D HDMI_COLORSPACE_RGB; =20 + if (hdmi->hdmi_data.enc_out_format =3D=3D HDMI_COLORSPACE_RGB) { + drm_hdmi_avi_infoframe_quant_range(&frame.avi, + &hdmi->connector, mode, + hdmi->hdmi_data.rgb_limited_range ? + HDMI_QUANTIZATION_RANGE_LIMITED : + HDMI_QUANTIZATION_RANGE_FULL); + } else { + frame.avi.quantization_range =3D HDMI_QUANTIZATION_RANGE_DEFAULT; + frame.avi.ycc_quantization_range =3D + HDMI_YCC_QUANTIZATION_RANGE_LIMITED; + } + return inno_hdmi_upload_frame(hdmi, rc, &frame, INFOFRAME_AVI, 0, 0, 0); } =20 @@ -334,14 +347,22 @@ static int inno_hdmi_config_video_csc(struct inno_hdm= i *hdmi) if (data->enc_in_format =3D=3D data->enc_out_format) { if ((data->enc_in_format =3D=3D HDMI_COLORSPACE_RGB) || (data->enc_in_format >=3D HDMI_COLORSPACE_YUV444)) { - value =3D v_SOF_DISABLE | v_COLOR_DEPTH_NOT_INDICATED(1); - hdmi_writeb(hdmi, HDMI_VIDEO_CONTRL3, value); - - hdmi_modb(hdmi, HDMI_VIDEO_CONTRL, - m_VIDEO_AUTO_CSC | m_VIDEO_C0_C2_SWAP, - v_VIDEO_AUTO_CSC(AUTO_CSC_DISABLE) | - v_VIDEO_C0_C2_SWAP(C0_C2_CHANGE_DISABLE)); - return 0; + if (data->enc_in_format =3D=3D HDMI_COLORSPACE_RGB && + data->enc_out_format =3D=3D HDMI_COLORSPACE_RGB && + hdmi->hdmi_data.rgb_limited_range) { + csc_mode =3D CSC_RGB_0_255_TO_RGB_16_235_8BIT; + auto_csc =3D AUTO_CSC_DISABLE; + c0_c2_change =3D C0_C2_CHANGE_DISABLE; + csc_enable =3D v_CSC_ENABLE; + } else { + value =3D v_SOF_DISABLE | v_COLOR_DEPTH_NOT_INDICATED(1); + hdmi_writeb(hdmi, HDMI_VIDEO_CONTRL3, value); + hdmi_modb(hdmi, HDMI_VIDEO_CONTRL, + m_VIDEO_AUTO_CSC | m_VIDEO_C0_C2_SWAP, + v_VIDEO_AUTO_CSC(AUTO_CSC_DISABLE) | + v_VIDEO_C0_C2_SWAP(C0_C2_CHANGE_DISABLE)); + return 0; + } } } =20 @@ -458,6 +479,9 @@ static int inno_hdmi_setup(struct inno_hdmi *hdmi, else hdmi->hdmi_data.colorimetry =3D HDMI_COLORIMETRY_ITU_709; =20 + hdmi->hdmi_data.rgb_limited_range =3D + drm_default_rgb_quant_range(mode) =3D=3D HDMI_QUANTIZATION_RANGE_LIMITED; + /* Mute video and audio output */ hdmi_modb(hdmi, HDMI_AV_MUTE, m_AUDIO_MUTE | m_VIDEO_BLACK, v_AUDIO_MUTE(1) | v_VIDEO_MUTE(1)); --=20 2.43.0 From nobody Fri Dec 19 04:18:12 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 41D6AC41535 for ; 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Wed, 13 Dec 2023 11:51:30 -0800 (PST) Received: from U4.lan ([2a02:810b:f40:4300:92dc:8b1c:e01c:b93c]) by smtp.gmail.com with ESMTPSA id fm14-20020a05600c0c0e00b00407b93d8085sm24050698wmb.27.2023.12.13.11.51.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Dec 2023 11:51:30 -0800 (PST) From: Alex Bee To: Sandy Huang , =?UTF-8?q?Heiko=20St=C3=BCbner?= , Andy Yan , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann Cc: David Airlie , Daniel Vetter , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Alex Bee Subject: [PATCH 05/11] drm/rockchip: inno_hdmi: Add variant support Date: Wed, 13 Dec 2023 20:51:19 +0100 Message-ID: <20231213195125.212923-6-knaerzche@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231213195125.212923-1-knaerzche@gmail.com> References: <20231213195125.212923-1-knaerzche@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" In preparation to support RK3128's integration of the controller, this patch adds a simple variant implementation. They mainly differ in the phy configuration required, so those are part of the match_data. The values have been taken from downstream. The pixelclocks in there are meant to be max-inclusive. Signed-off-by: Alex Bee --- drivers/gpu/drm/rockchip/inno_hdmi.c | 68 +++++++++++++++++++++++++++- 1 file changed, 66 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/rockchip/inno_hdmi.c b/drivers/gpu/drm/rockchi= p/inno_hdmi.c index 32626a75723c..593b184bd0ad 100644 --- a/drivers/gpu/drm/rockchip/inno_hdmi.c +++ b/drivers/gpu/drm/rockchip/inno_hdmi.c @@ -27,6 +27,17 @@ =20 #include "inno_hdmi.h" =20 +struct inno_hdmi_phy_config { + unsigned int pixelclock; + u8 pre_emphasis; + u8 voltage_level_control; +}; + +struct inno_hdmi_variant { + struct inno_hdmi_phy_config *phy_configs; + struct inno_hdmi_phy_config *default_phy_config; +}; + struct hdmi_data_info { int vic; bool sink_has_audio; @@ -64,6 +75,14 @@ struct inno_hdmi { =20 struct hdmi_data_info hdmi_data; struct drm_display_mode previous_mode; + + const struct inno_hdmi_variant *variant; +}; + +static struct inno_hdmi_phy_config rk3036_hdmi_phy_configs[] =3D { + { 74250000, 0x3f, 0xbb }, + { 165000000, 0x6f, 0xbb }, + { ~0UL, 0x00, 0x00 } }; =20 static struct inno_hdmi *encoder_to_inno_hdmi(struct drm_encoder *encoder) @@ -176,6 +195,24 @@ static inline void hdmi_modb(struct inno_hdmi *hdmi, u= 16 offset, hdmi_writeb(hdmi, offset, temp); } =20 +static int inno_hdmi_find_phy_config(struct inno_hdmi *hdmi, + unsigned int pixelclk) +{ + const struct inno_hdmi_phy_config *phy_configs =3D + hdmi->variant->phy_configs; + int i; + + for (i =3D 0; phy_configs[i].pixelclock !=3D ~0UL; i++) { + if (pixelclk <=3D phy_configs[i].pixelclock) + return i; + } + + DRM_DEV_DEBUG(hdmi->dev, "No phy configuration for pixelclock %u\n", + pixelclk); + + return -EINVAL; +} + static void inno_hdmi_i2c_init(struct inno_hdmi *hdmi) { int ddc_bus_freq; @@ -200,12 +237,25 @@ static void inno_hdmi_sys_power(struct inno_hdmi *hdm= i, bool enable) =20 static void inno_hdmi_set_pwr_mode(struct inno_hdmi *hdmi, int mode) { + int ret; + struct inno_hdmi_phy_config *phy_config; + switch (mode) { case NORMAL: inno_hdmi_sys_power(hdmi, false); =20 - hdmi_writeb(hdmi, HDMI_PHY_PRE_EMPHASIS, 0x6f); - hdmi_writeb(hdmi, HDMI_PHY_DRIVER, 0xbb); + ret =3D inno_hdmi_find_phy_config(hdmi, hdmi->tmds_rate); + if (ret < 0) { + phy_config =3D hdmi->variant->default_phy_config; + DRM_DEV_ERROR(hdmi->dev, + "Using default phy configuration for TMDS rate %u", + hdmi->tmds_rate); + } else { + phy_config =3D &hdmi->variant->phy_configs[ret]; + } + + hdmi_writeb(hdmi, HDMI_PHY_PRE_EMPHASIS, phy_config->pre_emphasis); + hdmi_writeb(hdmi, HDMI_PHY_DRIVER, phy_config->voltage_level_control); =20 hdmi_writeb(hdmi, HDMI_PHY_SYS_CTL, 0x15); hdmi_writeb(hdmi, HDMI_PHY_SYS_CTL, 0x14); @@ -845,6 +895,8 @@ static int inno_hdmi_bind(struct device *dev, struct de= vice *master, struct platform_device *pdev =3D to_platform_device(dev); struct drm_device *drm =3D data; struct inno_hdmi *hdmi; + const struct inno_hdmi_variant *variant; + int irq; int ret; =20 @@ -853,6 +905,12 @@ static int inno_hdmi_bind(struct device *dev, struct d= evice *master, return -ENOMEM; =20 hdmi->dev =3D dev; + + variant =3D of_device_get_match_data(hdmi->dev); + if (!variant) + return -EINVAL; + + hdmi->variant =3D variant; hdmi->drm_dev =3D drm; =20 hdmi->regs =3D devm_platform_ioremap_resource(pdev, 0); @@ -949,8 +1007,14 @@ static void inno_hdmi_remove(struct platform_device *= pdev) component_del(&pdev->dev, &inno_hdmi_ops); } =20 +static const struct inno_hdmi_variant rk3036_inno_hdmi_variant =3D { + .phy_configs =3D rk3036_hdmi_phy_configs, + .default_phy_config =3D &rk3036_hdmi_phy_configs[1], +}; + static const struct of_device_id inno_hdmi_dt_ids[] =3D { { .compatible =3D "rockchip,rk3036-inno-hdmi", + .data =3D &rk3036_inno_hdmi_variant, }, {}, }; --=20 2.43.0 From nobody Fri Dec 19 04:18:12 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2DA0AC4332F for ; Wed, 13 Dec 2023 19:51:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1379376AbjLMTvo (ORCPT ); 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Wed, 13 Dec 2023 11:51:30 -0800 (PST) From: Alex Bee To: Sandy Huang , =?UTF-8?q?Heiko=20St=C3=BCbner?= , Andy Yan , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann Cc: David Airlie , Daniel Vetter , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Alex Bee Subject: [PATCH 06/11] drm/rockchip: inno_hdmi: Add RK3128 support Date: Wed, 13 Dec 2023 20:51:20 +0100 Message-ID: <20231213195125.212923-7-knaerzche@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231213195125.212923-1-knaerzche@gmail.com> References: <20231213195125.212923-1-knaerzche@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This variant requires the phy reference clock to be enabled before the DDC block can work and the (initial) DDC bus frequency is calculated based on the rate of this clock. Besides the only difference is phy configuration which is required to make the driver working for this variant as well. Signed-off-by: Alex Bee --- drivers/gpu/drm/rockchip/inno_hdmi.c | 46 +++++++++++++++++++++++++--- 1 file changed, 41 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/rockchip/inno_hdmi.c b/drivers/gpu/drm/rockchi= p/inno_hdmi.c index 593b184bd0ad..f7f0bec725f9 100644 --- a/drivers/gpu/drm/rockchip/inno_hdmi.c +++ b/drivers/gpu/drm/rockchip/inno_hdmi.c @@ -63,6 +63,7 @@ struct inno_hdmi { =20 int irq; struct clk *pclk; + struct clk *refclk; void __iomem *regs; =20 struct drm_connector connector; @@ -85,6 +86,12 @@ static struct inno_hdmi_phy_config rk3036_hdmi_phy_confi= gs[] =3D { { ~0UL, 0x00, 0x00 } }; =20 +static struct inno_hdmi_phy_config rk3128_hdmi_phy_configs[] =3D { + { 74250000, 0x3f, 0xaa }, + { 165000000, 0x5f, 0xaa }, + { ~0UL, 0x00, 0x00 } +}; + static struct inno_hdmi *encoder_to_inno_hdmi(struct drm_encoder *encoder) { struct rockchip_encoder *rkencoder =3D to_rockchip_encoder(encoder); @@ -930,6 +937,20 @@ static int inno_hdmi_bind(struct device *dev, struct d= evice *master, return ret; } =20 + hdmi->refclk =3D devm_clk_get_optional(hdmi->dev, "ref"); + if (IS_ERR(hdmi->refclk)) { + DRM_DEV_ERROR(hdmi->dev, "Unable to get HDMI reference clock\n"); + ret =3D PTR_ERR(hdmi->refclk); + goto err_disable_pclk; + } + + ret =3D clk_prepare_enable(hdmi->refclk); + if (ret) { + DRM_DEV_ERROR(hdmi->dev, + "Cannot enable HDMI reference clock: %d\n", ret); + goto err_disable_pclk; + } + irq =3D platform_get_irq(pdev, 0); if (irq < 0) { ret =3D irq; @@ -946,12 +967,16 @@ static int inno_hdmi_bind(struct device *dev, struct = device *master, } =20 /* - * When IP controller haven't configured to an accurate video - * timing, then the TMDS clock source would be switched to - * PCLK_HDMI, so we need to init the TMDS rate to PCLK rate, - * and reconfigure the DDC clock. + * When IP controller isn't configured to an accurate + * video timing and there is no reference clock available, + * then the TMDS clock source would be switched to PCLK_HDMI, + * so we need to init the TMDS rate to PCLK rate, and + * reconfigure the DDC clock. */ - hdmi->tmds_rate =3D clk_get_rate(hdmi->pclk); + if (hdmi->refclk) + hdmi->tmds_rate =3D clk_get_rate(hdmi->refclk); + else + hdmi->tmds_rate =3D clk_get_rate(hdmi->pclk); inno_hdmi_i2c_init(hdmi); =20 ret =3D inno_hdmi_register(drm, hdmi); @@ -976,6 +1001,8 @@ static int inno_hdmi_bind(struct device *dev, struct d= evice *master, err_put_adapter: i2c_put_adapter(hdmi->ddc); err_disable_clk: + clk_disable_unprepare(hdmi->refclk); +err_disable_pclk: clk_disable_unprepare(hdmi->pclk); return ret; } @@ -989,6 +1016,7 @@ static void inno_hdmi_unbind(struct device *dev, struc= t device *master, hdmi->encoder.encoder.funcs->destroy(&hdmi->encoder.encoder); =20 i2c_put_adapter(hdmi->ddc); + clk_disable_unprepare(hdmi->refclk); clk_disable_unprepare(hdmi->pclk); } =20 @@ -1012,10 +1040,18 @@ static const struct inno_hdmi_variant rk3036_inno_h= dmi_variant =3D { .default_phy_config =3D &rk3036_hdmi_phy_configs[1], }; =20 +static const struct inno_hdmi_variant rk3128_inno_hdmi_variant =3D { + .phy_configs =3D rk3128_hdmi_phy_configs, + .default_phy_config =3D &rk3128_hdmi_phy_configs[1], +}; + static const struct of_device_id inno_hdmi_dt_ids[] =3D { { .compatible =3D "rockchip,rk3036-inno-hdmi", .data =3D &rk3036_inno_hdmi_variant, }, + { .compatible =3D "rockchip,rk3128-inno-hdmi", + .data =3D &rk3128_inno_hdmi_variant, + }, {}, }; MODULE_DEVICE_TABLE(of, inno_hdmi_dt_ids); --=20 2.43.0 From nobody Fri Dec 19 04:18:12 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 42AEDC4332F for ; Wed, 13 Dec 2023 19:52:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1442425AbjLMTvw (ORCPT ); Wed, 13 Dec 2023 14:51:52 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54554 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1379033AbjLMTv2 (ORCPT ); Wed, 13 Dec 2023 14:51:28 -0500 Received: from mail-wm1-x329.google.com (mail-wm1-x329.google.com [IPv6:2a00:1450:4864:20::329]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0AE62E0; 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Wed, 13 Dec 2023 11:51:31 -0800 (PST) From: Alex Bee To: Sandy Huang , =?UTF-8?q?Heiko=20St=C3=BCbner?= , Andy Yan , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann Cc: David Airlie , Daniel Vetter , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Alex Bee Subject: [PATCH 07/11] drm/rockchip: inno_hdmi: Add basic mode validation Date: Wed, 13 Dec 2023 20:51:21 +0100 Message-ID: <20231213195125.212923-8-knaerzche@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231213195125.212923-1-knaerzche@gmail.com> References: <20231213195125.212923-1-knaerzche@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" As per TRM this controller supports pixelclocks starting from 25 MHz. The maximum supported pixelclocks are defined by the phy configurations we have. Also it can't support modes that require doubled clocks. If there is a phy reference clock we can additionally validate against VESA DMT's recommendations. Those checks are added to the mode_valid hook of the connector and encoder's mode_fixup hook. Signed-off-by: Alex Bee --- drivers/gpu/drm/rockchip/inno_hdmi.c | 38 ++++++++++++++++++++++++++-- 1 file changed, 36 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/rockchip/inno_hdmi.c b/drivers/gpu/drm/rockchi= p/inno_hdmi.c index f7f0bec725f9..2f839ff31c1c 100644 --- a/drivers/gpu/drm/rockchip/inno_hdmi.c +++ b/drivers/gpu/drm/rockchip/inno_hdmi.c @@ -38,6 +38,8 @@ struct inno_hdmi_variant { struct inno_hdmi_phy_config *default_phy_config; }; =20 +#define INNO_HDMI_MIN_TMDS_CLOCK 25000000U + struct hdmi_data_info { int vic; bool sink_has_audio; @@ -572,6 +574,34 @@ static int inno_hdmi_setup(struct inno_hdmi *hdmi, return 0; } =20 +static enum drm_mode_status inno_hdmi_mode_valid(struct inno_hdmi *hdmi, + struct drm_display_mode *mode) +{ + /* No support for double-clock modes */ + if (mode->flags & DRM_MODE_FLAG_DBLCLK) + return MODE_BAD; + + unsigned int mpixelclk =3D mode->clock * 1000; + + if (mpixelclk < INNO_HDMI_MIN_TMDS_CLOCK) + return MODE_CLOCK_LOW; + + if (inno_hdmi_find_phy_config(hdmi, mpixelclk) < 0) + return MODE_CLOCK_HIGH; + + if (hdmi->refclk) { + long refclk =3D clk_round_rate(hdmi->refclk, mpixelclk); + unsigned int max_tolerance =3D mpixelclk / 5000; + + /* Vesa DMT standard mentions +/- 0.5% max tolerance */ + if (abs(refclk - mpixelclk) > max_tolerance || + mpixelclk - refclk > max_tolerance) + return MODE_NOCLOCK; + } + + return MODE_OK; +} + static void inno_hdmi_encoder_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode, struct drm_display_mode *adj_mode) @@ -602,7 +632,9 @@ static bool inno_hdmi_encoder_mode_fixup(struct drm_enc= oder *encoder, const struct drm_display_mode *mode, struct drm_display_mode *adj_mode) { - return true; + struct inno_hdmi *hdmi =3D encoder_to_inno_hdmi(encoder); + + return inno_hdmi_mode_valid(hdmi, adj_mode) =3D=3D MODE_OK; } =20 static int @@ -659,7 +691,9 @@ static enum drm_mode_status inno_hdmi_connector_mode_valid(struct drm_connector *connector, struct drm_display_mode *mode) { - return MODE_OK; + struct inno_hdmi *hdmi =3D connector_to_inno_hdmi(connector); + + return inno_hdmi_mode_valid(hdmi, mode); } =20 static int --=20 2.43.0 From nobody Fri Dec 19 04:18:12 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8AE5BC4332F for ; Wed, 13 Dec 2023 19:51:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233888AbjLMTvu (ORCPT ); Wed, 13 Dec 2023 14:51:50 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54526 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1379023AbjLMTv1 (ORCPT ); Wed, 13 Dec 2023 14:51:27 -0500 Received: from mail-wm1-x334.google.com (mail-wm1-x334.google.com [IPv6:2a00:1450:4864:20::334]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D4098CF; Wed, 13 Dec 2023 11:51:33 -0800 (PST) Received: by mail-wm1-x334.google.com with SMTP id 5b1f17b1804b1-40c48d7a7a7so32030335e9.3; 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charset="utf-8" Now that we have proper pixelclock-based validation we can drop the custom fill_modes hook. CRTC size validation for the display controller has been added with Commit 8e140cb60270 ("drm/rockchip: vop: limit maximum resolution to hardware capabilities") Signed-off-by: Alex Bee --- drivers/gpu/drm/rockchip/inno_hdmi.c | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-) diff --git a/drivers/gpu/drm/rockchip/inno_hdmi.c b/drivers/gpu/drm/rockchi= p/inno_hdmi.c index 2f839ff31c1c..84520da8c995 100644 --- a/drivers/gpu/drm/rockchip/inno_hdmi.c +++ b/drivers/gpu/drm/rockchip/inno_hdmi.c @@ -696,13 +696,6 @@ inno_hdmi_connector_mode_valid(struct drm_connector *c= onnector, return inno_hdmi_mode_valid(hdmi, mode); } =20 -static int -inno_hdmi_probe_single_connector_modes(struct drm_connector *connector, - uint32_t maxX, uint32_t maxY) -{ - return drm_helper_probe_single_connector_modes(connector, 1920, 1080); -} - static void inno_hdmi_connector_destroy(struct drm_connector *connector) { drm_connector_unregister(connector); @@ -710,7 +703,7 @@ static void inno_hdmi_connector_destroy(struct drm_conn= ector *connector) } =20 static const struct drm_connector_funcs inno_hdmi_connector_funcs =3D { - .fill_modes =3D inno_hdmi_probe_single_connector_modes, + .fill_modes =3D drm_helper_probe_single_connector_modes, .detect =3D inno_hdmi_connector_detect, .destroy =3D inno_hdmi_connector_destroy, .reset =3D drm_atomic_helper_connector_reset, --=20 2.43.0 From nobody Fri Dec 19 04:18:12 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B926EC4167B for ; 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charset="utf-8" Add vop and display-subsysem nodes to RK3128's device tree. Signed-off-by: Alex Bee --- arch/arm/boot/dts/rockchip/rk3128.dtsi | 27 ++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm/boot/dts/rockchip/rk3128.dtsi b/arch/arm/boot/dts/roc= kchip/rk3128.dtsi index e2264c40b924..1a3bc8b2bc6e 100644 --- a/arch/arm/boot/dts/rockchip/rk3128.dtsi +++ b/arch/arm/boot/dts/rockchip/rk3128.dtsi @@ -115,6 +115,12 @@ opp-1200000000 { }; }; =20 + display_subsystem: display-subsystem { + compatible =3D "rockchip,display-subsystem"; + ports =3D <&vop_out>; + status =3D "disabled"; + }; + gpu_opp_table: opp-table-1 { compatible =3D "operating-points-v2"; =20 @@ -246,6 +252,27 @@ power-domain@RK3128_PD_GPU { }; }; =20 + vop: vop@1010e000 { + compatible =3D "rockchip,rk3126-vop"; + reg =3D <0x1010e000 0x300>; + interrupts =3D ; + clocks =3D <&cru ACLK_LCDC0>, <&cru DCLK_VOP>, + <&cru HCLK_LCDC0>; + clock-names =3D "aclk_vop", "dclk_vop", + "hclk_vop"; + resets =3D <&cru SRST_VOP_A>, <&cru SRST_VOP_H>, + <&cru SRST_VOP_D>; + reset-names =3D "axi", "ahb", + "dclk"; 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Wed, 13 Dec 2023 11:51:33 -0800 (PST) From: Alex Bee To: Sandy Huang , =?UTF-8?q?Heiko=20St=C3=BCbner?= , Andy Yan , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann Cc: David Airlie , Daniel Vetter , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Alex Bee Subject: [PATCH 10/11] ARM: dts rockchip: Add HDMI node for RK3128 Date: Wed, 13 Dec 2023 20:51:24 +0100 Message-ID: <20231213195125.212923-11-knaerzche@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231213195125.212923-1-knaerzche@gmail.com> References: <20231213195125.212923-1-knaerzche@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" RK3128 has Innosilicon based HDMI TX controller similar to the one found in RK3036. Add it and the respective port nodes to the SoC device tree. Signed-off-by: Alex Bee --- arch/arm/boot/dts/rockchip/rk3128.dtsi | 33 ++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/arch/arm/boot/dts/rockchip/rk3128.dtsi b/arch/arm/boot/dts/roc= kchip/rk3128.dtsi index 1a3bc8b2bc6e..fb98873fd94e 100644 --- a/arch/arm/boot/dts/rockchip/rk3128.dtsi +++ b/arch/arm/boot/dts/rockchip/rk3128.dtsi @@ -270,6 +270,11 @@ vop: vop@1010e000 { vop_out: port { #address-cells =3D <1>; #size-cells =3D <0>; + + vop_out_hdmi: endpoint@0 { + reg =3D <0>; + remote-endpoint =3D <&hdmi_in_vop>; + }; }; }; =20 @@ -463,6 +468,34 @@ usb2phy_otg: otg-port { }; }; =20 + hdmi: hdmi@20034000 { + compatible =3D "rockchip,rk3128-inno-hdmi"; + reg =3D <0x20034000 0x4000>; + interrupts =3D ; + clocks =3D <&cru PCLK_HDMI>, <&cru DCLK_VOP>; + clock-names =3D "pclk", "ref"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&hdmii2c_xfer &hdmi_hpd &hdmi_cec>; + power-domains =3D <&power RK3128_PD_VIO>; + status =3D "disabled"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + hdmi_in: port@0 { + reg =3D <0>; + hdmi_in_vop: endpoint { + remote-endpoint =3D <&vop_out_hdmi>; + }; + }; + + hdmi_out: port@1 { + reg =3D <1>; + }; + }; + }; + timer0: timer@20044000 { compatible =3D "rockchip,rk3128-timer", "rockchip,rk3288-timer"; reg =3D <0x20044000 0x20>; --=20 2.43.0 From nobody Fri Dec 19 04:18:12 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6BBA2C4332F for ; Wed, 13 Dec 2023 19:52:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1442447AbjLMTwA (ORCPT ); Wed, 13 Dec 2023 14:52:00 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37016 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233826AbjLMTvi (ORCPT ); Wed, 13 Dec 2023 14:51:38 -0500 Received: from mail-wm1-x32b.google.com (mail-wm1-x32b.google.com [IPv6:2a00:1450:4864:20::32b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F30EDF7; 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Wed, 13 Dec 2023 11:51:33 -0800 (PST) From: Alex Bee To: Sandy Huang , =?UTF-8?q?Heiko=20St=C3=BCbner?= , Andy Yan , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann Cc: David Airlie , Daniel Vetter , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Alex Bee Subject: [PATCH 11/11] ARM: dts: rockchip: Enable HDMI output for XPI-3128 Date: Wed, 13 Dec 2023 20:51:25 +0100 Message-ID: <20231213195125.212923-12-knaerzche@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231213195125.212923-1-knaerzche@gmail.com> References: <20231213195125.212923-1-knaerzche@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add an hdmi-connector node and enable the hdmi, display-subsystem and vop nodes. Signed-off-by: Alex Bee --- .../arm/boot/dts/rockchip/rk3128-xpi-3128.dts | 29 +++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/arch/arm/boot/dts/rockchip/rk3128-xpi-3128.dts b/arch/arm/boot= /dts/rockchip/rk3128-xpi-3128.dts index 03a97881519a..21c1678f4e91 100644 --- a/arch/arm/boot/dts/rockchip/rk3128-xpi-3128.dts +++ b/arch/arm/boot/dts/rockchip/rk3128-xpi-3128.dts @@ -47,6 +47,17 @@ dc_5v: dc-5v-regulator { regulator-boot-on; }; =20 + hdmi-connnector { + compatible =3D "hdmi-connector"; + type =3D "a"; + + port { + hdmi_connector_in: endpoint { + remote-endpoint =3D <&hdmi_connector_out>; + }; + }; + }; + /* * This is a vbus-supply, which also supplies the GL852G usb hub, * thus has to be always-on @@ -239,6 +250,10 @@ &cpu0 { cpu-supply =3D <&vdd_arm>; }; =20 +&display_subsystem { + status =3D "okay"; +}; + &emmc { bus-width =3D <8>; vmmc-supply =3D <&vcc_io>; @@ -328,6 +343,16 @@ &gpu { status =3D "okay"; }; =20 +&hdmi { + status =3D "okay"; +}; + +&hdmi_out { + hdmi_connector_out: endpoint { + remote-endpoint =3D <&hdmi_connector_in>; + }; +}; + &mdio { phy0: ethernet-phy@1 { compatible =3D "ethernet-phy-ieee802.3-c22"; @@ -423,3 +448,7 @@ &usb2phy_host { &usb2phy_otg { status =3D "okay"; }; + +&vop { + status =3D "okay"; +}; --=20 2.43.0