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([178.197.218.27]) by smtp.gmail.com with ESMTPSA id br7-20020a056512400700b0050bfe37d28asm1641026lfb.34.2023.12.13.08.29.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Dec 2023 08:29:05 -0800 (PST) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH v2 2/4] arm64: dts: qcom: sm8450: drop unneeded assigned-clocks from codec macros Date: Wed, 13 Dec 2023 17:28:54 +0100 Message-Id: <20231213162856.188566-3-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231213162856.188566-1-krzysztof.kozlowski@linaro.org> References: <20231213162856.188566-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The MCLK clocks of codec macros have fixed 19.2 MHz frequency and assigning clock rates is redundant. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Neil Armstrong --- Not tested on HW. --- arch/arm64/boot/dts/qcom/sm8450.dtsi | 16 ---------------- 1 file changed, 16 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qco= m/sm8450.dtsi index 3b6ea9653d2a..52390220d909 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -2154,9 +2154,6 @@ wsa2macro: codec@31e0000 { <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, <&vamacro>; clock-names =3D "mclk", "npl", "macro", "dcodec", "fsgen"; - assigned-clocks =3D <&q6prmcc LPASS_CLK_ID_WSA2_CORE_TX_MCLK LPASS_CLK_= ATTRIBUTE_COUPLE_NO>, - <&q6prmcc LPASS_CLK_ID_WSA2_CORE_TX_2X_MCLK LPASS_CLK_ATTRIBUTE_COU= PLE_NO>; - assigned-clock-rates =3D <19200000>, <19200000>; =20 #clock-cells =3D <0>; clock-output-names =3D "wsa2-mclk"; @@ -2203,10 +2200,6 @@ rxmacro: codec@3200000 { <&vamacro>; clock-names =3D "mclk", "npl", "macro", "dcodec", "fsgen"; =20 - assigned-clocks =3D <&q6prmcc LPASS_CLK_ID_RX_CORE_TX_MCLK LPASS_CLK_AT= TRIBUTE_COUPLE_NO>, - <&q6prmcc LPASS_CLK_ID_RX_CORE_MCLK2_2X_MCLK LPASS_CLK_ATTRIBUTE_CO= UPLE_NO>; - assigned-clock-rates =3D <19200000>, <19200000>; - #clock-cells =3D <0>; clock-output-names =3D "mclk"; #sound-dai-cells =3D <1>; @@ -2250,9 +2243,6 @@ txmacro: codec@3220000 { <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, <&vamacro>; clock-names =3D "mclk", "npl", "macro", "dcodec", "fsgen"; - assigned-clocks =3D <&q6prmcc LPASS_CLK_ID_RX_CORE_TX_MCLK LPASS_CLK_AT= TRIBUTE_COUPLE_NO>, - <&q6prmcc LPASS_CLK_ID_RX_CORE_MCLK2_2X_MCLK LPASS_CLK_ATTRIBUTE_CO= UPLE_NO>; - assigned-clock-rates =3D <19200000>, <19200000>; =20 #clock-cells =3D <0>; clock-output-names =3D "mclk"; @@ -2269,10 +2259,6 @@ wsamacro: codec@3240000 { <&vamacro>; clock-names =3D "mclk", "npl", "macro", "dcodec", "fsgen"; =20 - assigned-clocks =3D <&q6prmcc LPASS_CLK_ID_WSA_CORE_TX_MCLK LPASS_CLK_A= TTRIBUTE_COUPLE_NO>, - <&q6prmcc LPASS_CLK_ID_WSA_CORE_TX_2X_MCLK LPASS_CLK_ATTRIBUTE_COUP= LE_NO>; - assigned-clock-rates =3D <19200000>, <19200000>; - #clock-cells =3D <0>; clock-output-names =3D "mclk"; #sound-dai-cells =3D <1>; @@ -2348,8 +2334,6 @@ vamacro: codec@33f0000 { <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, <&q6prmcc LPASS_CLK_ID_RX_CORE_MCLK2_2X_MCLK LPASS_CLK_ATTRIBUTE_COUP= LE_NO>; clock-names =3D "mclk", "macro", "dcodec", "npl"; - assigned-clocks =3D <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRI= BUTE_COUPLE_NO>; - assigned-clock-rates =3D <19200000>; =20 #clock-cells =3D <0>; clock-output-names =3D "fsgen"; --=20 2.34.1