From nobody Thu Dec 18 14:50:17 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 84482C4167B for ; Wed, 13 Dec 2023 14:05:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1441871AbjLMOFV (ORCPT ); Wed, 13 Dec 2023 09:05:21 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35100 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1379436AbjLMOE6 (ORCPT ); Wed, 13 Dec 2023 09:04:58 -0500 Received: from mail-ej1-x636.google.com (mail-ej1-x636.google.com [IPv6:2a00:1450:4864:20::636]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1E31012D for ; Wed, 13 Dec 2023 06:04:50 -0800 (PST) Received: by mail-ej1-x636.google.com with SMTP id a640c23a62f3a-a1db99cd1b2so881466066b.2 for ; Wed, 13 Dec 2023 06:04:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1702476288; x=1703081088; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=3CX2gA6r/dtvGkH0YEYWwI6mzbAd5lMyIJziHnyg55Q=; b=rMuvyEAQf/UsTPnIKeSzHClhFGjiVsmTL732aETTNeFNrcDiJZnla+7Ec5rSpVNvGB fLj18cm8NZcjCEcVTUQ84dki8MeittW2StdKW6dOqOOrw+vbLrTQLQsAftFFAhkDTu0s OXhTnzPjNr0uE/nJe5gZv8ovacykUUh3mi844= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702476288; x=1703081088; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3CX2gA6r/dtvGkH0YEYWwI6mzbAd5lMyIJziHnyg55Q=; b=Enxdles8v6/8huSYzA3J9DMQHf4wEZmLa77triA22KCO4tMCP81OjKEbwmpusFHjVf EaWRN9d5CLtLhRiKTQ+oqLXmE3HrLvxZxXcLEpv02BIeDtJ+fhmwmdRJ1syqFJ1uZXSv Hel8cwtzIHtbqlP4TDAo+QqySRS2ITCBhlExKaHdxITbumJWDS+VGzdWB5Kh6Azq+OdF UcVpI8t3dsUp0ZeXRScUczIJ+tfcb34QqmuPVYq0x5OPkExJQtpYTx9/gl6kmixF0Ebj zFfNO7iPjmr3ilrr+VdkXNy45F9MzbCciINBPra4TMi5yZcl/mS0d1IeiCgRBB56E2b9 rkwQ== X-Gm-Message-State: AOJu0YxEcKXA4e7DYERh/eY9rbnimlPREnHjPxyhVuYQStlpuhSHDwMT oP6VQXYL75Lc8y9uJ8lCKrD0RE/U2rSJgCkv+d66HQ== X-Google-Smtp-Source: AGHT+IHY9vyAQM0i9B4v0CsAJzXy1VuwvFzX0zNU/IUjbxAitVM1TlUoSTNWSxtGasBG54Rp16TwYg== X-Received: by 2002:a17:906:c141:b0:a18:abad:195a with SMTP id dp1-20020a170906c14100b00a18abad195amr3293903ejc.47.1702476288274; Wed, 13 Dec 2023 06:04:48 -0800 (PST) Received: from dario-ThinkPad-T14s-Gen-2i.homenet.telecomitalia.it (host-80-182-13-188.pool80182.interbusiness.it. [80.182.13.188]) by smtp.gmail.com with ESMTPSA id sf22-20020a1709078a9600b00a1ca020cdfasm7797635ejc.161.2023.12.13.06.04.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Dec 2023 06:04:47 -0800 (PST) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: michael@amarulasolutions.com, Amarula patchwork , Dario Binacchi , Andrzej Hajda , Daniel Vetter , David Airlie , Inki Dae , Jagan Teki , Jernej Skrabec , Jonas Karlman , Laurent Pinchart , Maarten Lankhorst , Marek Szyprowski , Maxime Ripard , Neil Armstrong , Robert Foss , Thomas Zimmermann , dri-devel@lists.freedesktop.org Subject: [PATCH v6 1/4] drm: bridge: samsung-dsim: enter display mode in the enable() callback Date: Wed, 13 Dec 2023 15:03:42 +0100 Message-ID: <20231213140437.2769508-2-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231213140437.2769508-1-dario.binacchi@amarulasolutions.com> References: <20231213140437.2769508-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The synaptics-r63353 (panel-bridge) can only be configured in command mode. So, samsung-dsim (bridge) must not be in display mode during the prepare()/unprepare() of the panel-bridge. Setting the "pre_enable_prev_first" flag to true allows the prepare() of the panel-bridge to be called between the pre_enabled() and enabled() of the bridge. So, the bridge can enter display mode only in the enabled(). The unprepare() of the panel-bridge is instead called between the disable() and post_disable() of the bridge. So, the disable() must exit the display mode (i .e. enter command mode) to allow the panel-bridge to receive DSI commands. samsung_dsim_atomic_pre_enable -> command mode r63353_panel_prepare -> send DSI commands samsung_dsim_atomic_enable -> enter display mode samsung_dsim_atomic_disable -> exit display mode (command mode) r63353_panel_unprepare -> send DSI commands samsung_dsim_atomic_post_disable Co-developed-by: Michael Trimarchi Signed-off-by: Michael Trimarchi Signed-off-by: Dario Binacchi --- (no changes since v1) drivers/gpu/drm/bridge/samsung-dsim.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge= /samsung-dsim.c index be5914caa17d..15bf05b2bbe4 100644 --- a/drivers/gpu/drm/bridge/samsung-dsim.c +++ b/drivers/gpu/drm/bridge/samsung-dsim.c @@ -1494,7 +1494,6 @@ static void samsung_dsim_atomic_pre_enable(struct drm= _bridge *bridge, return; =20 samsung_dsim_set_display_mode(dsi); - samsung_dsim_set_display_enable(dsi, true); } } =20 @@ -1507,6 +1506,7 @@ static void samsung_dsim_atomic_enable(struct drm_bri= dge *bridge, samsung_dsim_set_display_mode(dsi); samsung_dsim_set_display_enable(dsi, true); } else { + samsung_dsim_set_display_enable(dsi, true); samsung_dsim_set_stop_state(dsi, false); } =20 @@ -1524,6 +1524,8 @@ static void samsung_dsim_atomic_disable(struct drm_br= idge *bridge, if (!samsung_dsim_hw_is_exynos(dsi->plat_data->hw_type)) samsung_dsim_set_stop_state(dsi, true); =20 + samsung_dsim_set_display_enable(dsi, false); + dsi->state &=3D ~DSIM_STATE_VIDOUT_AVAILABLE; } =20 @@ -1532,7 +1534,8 @@ static void samsung_dsim_atomic_post_disable(struct d= rm_bridge *bridge, { struct samsung_dsim *dsi =3D bridge_to_dsi(bridge); =20 - samsung_dsim_set_display_enable(dsi, false); + if (!samsung_dsim_hw_is_exynos(dsi->plat_data->hw_type)) + samsung_dsim_set_stop_state(dsi, true); =20 dsi->state &=3D ~DSIM_STATE_ENABLED; pm_runtime_put_sync(dsi->dev); --=20 2.43.0 From nobody Thu Dec 18 14:50:17 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3AF02C4332F for ; Wed, 13 Dec 2023 14:05:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1441892AbjLMOFX (ORCPT ); Wed, 13 Dec 2023 09:05:23 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51800 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1379443AbjLMOE6 (ORCPT ); Wed, 13 Dec 2023 09:04:58 -0500 Received: from mail-ej1-x631.google.com (mail-ej1-x631.google.com [IPv6:2a00:1450:4864:20::631]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DF4EF11B for ; Wed, 13 Dec 2023 06:04:51 -0800 (PST) Received: by mail-ej1-x631.google.com with SMTP id a640c23a62f3a-a1fae88e66eso356234966b.3 for ; Wed, 13 Dec 2023 06:04:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1702476290; x=1703081090; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=LRuU/Yf3+WOs2/s3BqHchrpBnPmBNhkaR5Vfu/UBGmU=; b=FNNo03N4r8yvuc/pCl1KqXjBYa842UOZQe3wgiSxEV8MK8sDeBJgWtNKXxVlV6GsvH jKqRsebjME4RYkA75CcvgeFSvD4vLVV+UWG890dGXMhk4hvNdHS4OmcY62RG0lFXxtvc R3hb4/oBD9KBLXNssJLVDy065MdntHe7GhFOg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702476290; x=1703081090; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LRuU/Yf3+WOs2/s3BqHchrpBnPmBNhkaR5Vfu/UBGmU=; b=awyiUVSjrtD2r1SVtMBN5F02MSEqNtPSdAWxHV1c+2C8360XopBPhWYsd+2v51TXr/ AZjF1HF0OgYfwQzrw5NUBukZW6jKrQRpBc1CpKv8tp8C6BHiwgb4fasPYlvLeHzmgPAS ysihbY6CI45jnWQs8jcVTTZj8xvDT86DasQZbRzTkgu5JaS+Tz/nZnzShNg5NiAGZMbI AAsEVpmiQO+cH0aOfgszKYXdJ8EMMy/7B4nklB6ehxKQF+CMOa6juXGJDVx0hbLemee0 /RBGAkIJKPC1FVTguF0mwANPmqm/TR9UtnpIQqd+r4mXXnr4COKSi1OhGmhfG2SkgENs U0Xw== X-Gm-Message-State: AOJu0Yw+lARlrNvWDVBwiYdUpCuxuKUnfOsS/Id7C1K9JgFOqiGYZliP BgmS2tyFDH7FcHaDiQTA/eC5a8Lt6GQrRqFz9rbfww== X-Google-Smtp-Source: AGHT+IH/DyKWXFFFShYbC0zIs86T8HHYGnLc0RMfq72z84+U64jUAOx/Wgh/+p7dSDv3JtasURZwyw== X-Received: by 2002:a17:907:720a:b0:a1d:e889:5276 with SMTP id dr10-20020a170907720a00b00a1de8895276mr5208788ejc.61.1702476290034; Wed, 13 Dec 2023 06:04:50 -0800 (PST) Received: from dario-ThinkPad-T14s-Gen-2i.homenet.telecomitalia.it (host-80-182-13-188.pool80182.interbusiness.it. [80.182.13.188]) by smtp.gmail.com with ESMTPSA id sf22-20020a1709078a9600b00a1ca020cdfasm7797635ejc.161.2023.12.13.06.04.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Dec 2023 06:04:49 -0800 (PST) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: michael@amarulasolutions.com, Amarula patchwork , Dario Binacchi , Andrzej Hajda , Daniel Vetter , David Airlie , Inki Dae , Jagan Teki , Jernej Skrabec , Jonas Karlman , Laurent Pinchart , Maarten Lankhorst , Marek Szyprowski , Maxime Ripard , Neil Armstrong , Robert Foss , Thomas Zimmermann , dri-devel@lists.freedesktop.org Subject: [PATCH v6 2/4] drm: bridge: samsung-dsim: complete the CLKLANE_STOP setting Date: Wed, 13 Dec 2023 15:03:43 +0100 Message-ID: <20231213140437.2769508-3-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231213140437.2769508-1-dario.binacchi@amarulasolutions.com> References: <20231213140437.2769508-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The patch completes the setting of CLKLANE_STOP for the imx8mn and imx8mp platforms (i. e. not exynos). Co-developed-by: Michael Trimarchi Signed-off-by: Michael Trimarchi Signed-off-by: Dario Binacchi --- (no changes since v1) drivers/gpu/drm/bridge/samsung-dsim.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge= /samsung-dsim.c index 15bf05b2bbe4..13f181c99d7e 100644 --- a/drivers/gpu/drm/bridge/samsung-dsim.c +++ b/drivers/gpu/drm/bridge/samsung-dsim.c @@ -96,6 +96,7 @@ #define DSIM_MFLUSH_VS BIT(29) /* This flag is valid only for exynos3250/3472/5260/5430 */ #define DSIM_CLKLANE_STOP BIT(30) +#define DSIM_NON_CONTINUOUS_CLKLANE BIT(31) =20 /* DSIM_ESCMODE */ #define DSIM_TX_TRIGGER_RST BIT(4) @@ -945,8 +946,12 @@ static int samsung_dsim_init_link(struct samsung_dsim = *dsi) * power consumption. */ if (driver_data->has_clklane_stop && - dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) + dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) { + if (!samsung_dsim_hw_is_exynos(dsi->plat_data->hw_type)) + reg |=3D DSIM_NON_CONTINUOUS_CLKLANE; + reg |=3D DSIM_CLKLANE_STOP; + } samsung_dsim_write(dsi, DSIM_CONFIG_REG, reg); =20 lanes_mask =3D BIT(dsi->lanes) - 1; --=20 2.43.0 From nobody Thu Dec 18 14:50:17 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 26436C4167B for ; Wed, 13 Dec 2023 14:05:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1441901AbjLMOFZ (ORCPT ); Wed, 13 Dec 2023 09:05:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51880 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1379461AbjLMOFB (ORCPT ); Wed, 13 Dec 2023 09:05:01 -0500 Received: from mail-lf1-x133.google.com (mail-lf1-x133.google.com [IPv6:2a00:1450:4864:20::133]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3928F1AA for ; Wed, 13 Dec 2023 06:04:54 -0800 (PST) Received: by mail-lf1-x133.google.com with SMTP id 2adb3069b0e04-50bf69afa99so8920389e87.3 for ; Wed, 13 Dec 2023 06:04:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1702476291; x=1703081091; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=9dqXlBbcQt0R29oSjxr4jyi0yptqDX27ArBU37Ndav8=; b=kxbvaXSF/MEAbg8xDALt/cWGtZO8PfqajBEdyKv4Gi1A/U8WV12E4U3Tvb+LJdnoKF DxHgjIka9Chmehg1/WDlnX/yJ52UJ5gPBPPqWWJDVzWCQ+sURjphhgbD7RqcFOHZtBi+ 2hSTEfXe/E+vttFd7vciVkQn+KTPoj+H15R7M= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702476291; x=1703081091; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=9dqXlBbcQt0R29oSjxr4jyi0yptqDX27ArBU37Ndav8=; b=hek2qc1suRThIUbjHW9FilsU+kKYbmvMc1sENJl+/Q2dqsyK3E3fFTfprwk3S6me5S aciPYRYB6I4uJdYNkYqEswVskb+pafdDim8x/eRYEZySrH2T01pKE4cFGdpdm/zDHp1E dFm/k1NSGeZSpdp864RYMPkpN3sq9UO6qtoaHT1xuOfosSWu1rdxC/w417DtLRD/q3xY DptRxoMTRFtevM5WUmS7xg3IjpilLdIIvuUCrUKdQjiJsqqBd4QbU51KIMUrbRke3XgI 6Ixnt2UqYTm1/KwuKa3khTg0iXvaWh7BrECuNOIncuRt94//eYui0WdXxDKMp1ZKynWH YXBA== X-Gm-Message-State: AOJu0Yw/GeiBX8Pfa686e5lXx4dSpcIYa86FWR9OvAqrLjkokZ7hdWJA OXQ0bXQMUWMM5zuE8WgK/DVHACfGL5U7U4dx3y2R0Q== X-Google-Smtp-Source: AGHT+IHfw1WlP9inuYGIENHnhTTUJtDuxBwuDowubx41cZfFvg/ZN3KRTyRxbBmkckspL7A9vZiN8g== X-Received: by 2002:a05:6512:5c3:b0:50b:f9b2:ced with SMTP id o3-20020a05651205c300b0050bf9b20cedmr3452370lfo.22.1702476291575; Wed, 13 Dec 2023 06:04:51 -0800 (PST) Received: from dario-ThinkPad-T14s-Gen-2i.homenet.telecomitalia.it (host-80-182-13-188.pool80182.interbusiness.it. [80.182.13.188]) by smtp.gmail.com with ESMTPSA id sf22-20020a1709078a9600b00a1ca020cdfasm7797635ejc.161.2023.12.13.06.04.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Dec 2023 06:04:51 -0800 (PST) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: michael@amarulasolutions.com, Amarula patchwork , Dario Binacchi , Krzysztof Kozlowski , Conor Dooley , Daniel Vetter , David Airlie , Jessica Zhang , Krzysztof Kozlowski , Maarten Lankhorst , Maxime Ripard , Neil Armstrong , Rob Herring , Sam Ravnborg , Thomas Zimmermann , devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org Subject: [PATCH v6 3/4] dt-bindings: display: panel: Add synaptics r63353 panel controller Date: Wed, 13 Dec 2023 15:03:44 +0100 Message-ID: <20231213140437.2769508-4-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231213140437.2769508-1-dario.binacchi@amarulasolutions.com> References: <20231213140437.2769508-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Michael Trimarchi Add documentation for "synaptics,r63353" panel. Signed-off-by: Michael Trimarchi Signed-off-by: Dario Binacchi Reviewed-by: Krzysztof Kozlowski --- (no changes since v3) Changes in v3: - Add 'Reviewed-by' tag of Krzysztof Kozlowski. - Replace "synaptics,r63353" compatible with "syna,r63353", as required by vendor-prefixes.yaml. Changes in v2: - Add $ref to panel-common.yaml - Drop port, reset-gpios, and backlight - Set port and backlight ad required - Replace additionalProperties with unevaluatedProperties .../display/panel/synaptics,r63353.yaml | 61 +++++++++++++++++++ 1 file changed, 61 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/panel/synapti= cs,r63353.yaml diff --git a/Documentation/devicetree/bindings/display/panel/synaptics,r633= 53.yaml b/Documentation/devicetree/bindings/display/panel/synaptics,r63353.= yaml new file mode 100644 index 000000000000..e5617d125567 --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/synaptics,r63353.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/synaptics,r63353.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Synaptics R63353 based MIPI-DSI panels + +maintainers: + - Michael Trimarchi + +allOf: + - $ref: panel-common.yaml# + +properties: + compatible: + items: + - enum: + - sharp,ls068b3sx02 + - const: syna,r63353 + + avdd-supply: true + dvdd-supply: true + reg: true + +required: + - compatible + - avdd-supply + - dvdd-supply + - reg + - reset-gpios + - port + - backlight + +unevaluatedProperties: false + +examples: + - | + #include + + dsi { + #address-cells =3D <1>; + #size-cells =3D <0>; + + panel@0 { + compatible =3D "sharp,ls068b3sx02", "syna,r63353"; + reg =3D <0>; + avdd-supply =3D <&avdd_display>; + dvdd-supply =3D <&dvdd_display>; + reset-gpios =3D <&r_pio 0 5 GPIO_ACTIVE_LOW>; /* PL05 */ + backlight =3D <&backlight>; + + port { + panel_in: endpoint { + remote-endpoint =3D <&mipi_dsi_out>; + }; + }; + }; + }; + +... --=20 2.43.0 From nobody Thu Dec 18 14:50:17 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6237DC4332F for ; Wed, 13 Dec 2023 14:05:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1441912AbjLMOF2 (ORCPT ); Wed, 13 Dec 2023 09:05:28 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35074 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1379462AbjLMOFB (ORCPT ); Wed, 13 Dec 2023 09:05:01 -0500 Received: from mail-ej1-x629.google.com (mail-ej1-x629.google.com [IPv6:2a00:1450:4864:20::629]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 354191B4 for ; Wed, 13 Dec 2023 06:04:55 -0800 (PST) Received: by mail-ej1-x629.google.com with SMTP id a640c23a62f3a-a1f8510883aso577787766b.3 for ; Wed, 13 Dec 2023 06:04:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1702476293; x=1703081093; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=w4evxSLAkrt3VKfUuFZWoKuJqVeQx/fB/WXunMR3Gwk=; b=oL5slk7SZtD05tVuTjpTOqk9eKiIvnrCKyv+xF8HTtkmUv1Z73gJlD/jkEEiRyIdiS 19e5qGsyD6iZLvNUQDYQehmMGpKZJim+EJe7nAL5CCTSEyFksWs4ekKOI5WaL1vWD7Dk j4YHNk8bs9MDdtfJP3nrKGN0n5HBBqRd0ooVc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702476293; x=1703081093; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=w4evxSLAkrt3VKfUuFZWoKuJqVeQx/fB/WXunMR3Gwk=; b=GOKFBJyOsZK4xK69qT3p3Akx1WbB2ntS2iB5iLN/EcdOSV1qaZqoCB2FkJ1TJTOfbx Z/e8G/KAFVM9lhFQeglvq9H3gnH2jFgQXUNyuYLr0IsoPXJ1vZk/UEKOtrQej7ljhqzi TTevf/Rxxpk0gjweHN9IIlJsghMwPImBl9dXGSrym+prsb9H3zbqopyBguOUibWKa0z/ SD9IGmrDXIa8pVXFCydAsdO5xV8nUrqs3cVLXZ2E6GdO579DKAXtljvReFCzflyjLR0M R8LgbXfu1HsVmQAUXteu8lKDElaAWKxelwRNgCkWfdf1V+Q5YCex9GcrScPyDcHbUDsx GZ8A== X-Gm-Message-State: AOJu0YxwJFJpxeIDqLEY1VwaNrg8AwD8i1CrhwbEQ2hJfvt0DucTzhlB 9MhuJUzcbY41/IxUC/0sSxpmyz+msBgFg4CbmPKhVg== X-Google-Smtp-Source: AGHT+IGhQ5djdxfJ2uYN3I+r42VAAtO9FPIEfEDBhoa0i6x96cmVrrKX0g2BFPcNnSWByv0eTda+KQ== X-Received: by 2002:a17:907:6d11:b0:a19:d40a:d1fb with SMTP id sa17-20020a1709076d1100b00a19d40ad1fbmr2497883ejc.199.1702476293116; Wed, 13 Dec 2023 06:04:53 -0800 (PST) Received: from dario-ThinkPad-T14s-Gen-2i.homenet.telecomitalia.it (host-80-182-13-188.pool80182.interbusiness.it. [80.182.13.188]) by smtp.gmail.com with ESMTPSA id sf22-20020a1709078a9600b00a1ca020cdfasm7797635ejc.161.2023.12.13.06.04.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Dec 2023 06:04:52 -0800 (PST) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: michael@amarulasolutions.com, Amarula patchwork , Dario Binacchi , Conor Dooley , Fabio Estevam , Krzysztof Kozlowski , NXP Linux Team , Peng Fan , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v6 4/4] arm64: dts: imx8mn-bsh-smm-s2/pro: add display setup Date: Wed, 13 Dec 2023 15:03:45 +0100 Message-ID: <20231213140437.2769508-5-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231213140437.2769508-1-dario.binacchi@amarulasolutions.com> References: <20231213140437.2769508-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Michael Trimarchi Add the display and nodes required for its operation. Signed-off-by: Michael Trimarchi Signed-off-by: Dario Binacchi --- Changes in v6: - Drop patches: - [06/10] drm/panel: Add Synaptics R63353 panel driver - [07/10] dt-bindings: display: panel: Add Ilitek ili9805 panel controller - [08/10] drm/panel: Add Ilitek ILI9805 panel driver - [09/10] drm/panel: ilitek-ili9805: add support for Tianma TM041XDHG01 p= anel Because applied to https://anongit.freedesktop.org/git/drm/drm-misc.git (= drm-misc-next) Drop patches: - [01/10] drm/bridge: Fix bridge disable logic - [02/10] drm/bridge: Fix a use case in the bridge disable logic Because they are wrong Changes in v3: - Replace "synaptics,r63353" compatible with "syna,r63353", as required by vendor-prefixes.yaml. - Squash patch [09/11] dt-bindings: ili9805: add compatible string for Tian= ma TM041XDHG01 into [07/11] dt-bindings: display: panel: Add Ilitek ili9805 panel contro= ller. Changes in v2: - Adjust the mipi_dsi node based on the latest patches merged into the mainline in the dtsi files it includes. - Added to the series the following patches: - 0001 drm/bridge: Fix bridge disable logic - 0002 drm/bridge: Fix a use case in the bridge disable logic - 0003 samsung-dsim: enter display mode in the enable() callback - 0004 drm: bridge: samsung-dsim: complete the CLKLANE_STOP setting .../freescale/imx8mn-bsh-smm-s2-common.dtsi | 1 + .../freescale/imx8mn-bsh-smm-s2-display.dtsi | 121 ++++++++++++++++++ 2 files changed, 122 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-display= .dtsi diff --git a/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi b/= arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi index 22a754d438f1..bbb07c650da9 100644 --- a/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi @@ -7,6 +7,7 @@ /dts-v1/; =20 #include "imx8mn.dtsi" +#include "imx8mn-bsh-smm-s2-display.dtsi" =20 / { chosen { diff --git a/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-display.dtsi b= /arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-display.dtsi new file mode 100644 index 000000000000..f0a924cbe548 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-display.dtsi @@ -0,0 +1,121 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2021 BSH + */ + +/ { + backlight: backlight { + compatible =3D "pwm-backlight"; + pwms =3D <&pwm1 0 700000 0>; /* 700000 ns =3D 1337Hz */ + brightness-levels =3D <0 100>; + num-interpolated-steps =3D <100>; + default-brightness-level =3D <50>; + status =3D "okay"; + }; + + reg_3v3_dvdd: regulator-3v3-O3 { + compatible =3D "regulator-fixed"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_dvdd>; + regulator-name =3D "3v3-dvdd-supply"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + gpio =3D <&gpio1 7 GPIO_ACTIVE_LOW>; + }; + + reg_v3v3_avdd: regulator-3v3-O2 { + compatible =3D "regulator-fixed"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_avdd>; + regulator-name =3D "3v3-avdd-supply"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + gpio =3D <&gpio1 5 GPIO_ACTIVE_LOW>; + }; +}; + +&pwm1 { + status =3D "okay"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_bl>; +}; + +&lcdif { + status =3D "okay"; + assigned-clocks =3D <&clk IMX8MN_VIDEO_PLL1>; + assigned-clock-rates =3D <594000000>; +}; + +&pgc_dispmix { + assigned-clocks =3D <&clk IMX8MN_CLK_DISP_AXI>, <&clk IMX8MN_CLK_DISP_APB= >; + assigned-clock-parents =3D <&clk IMX8MN_SYS_PLL2_1000M>, <&clk IMX8MN_SYS= _PLL1_800M>; + assigned-clock-rates =3D <500000000>, <200000000>; +}; + +&mipi_dsi { + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "okay"; + samsung,esc-clock-frequency =3D <20000000>; + samsung,pll-clock-frequency =3D <12000000>; + + panel@0 { + compatible =3D "sharp,ls068b3sx02", "syna,r63353"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_panel>; + reg =3D <0>; + + backlight =3D <&backlight>; + dvdd-supply =3D <®_3v3_dvdd>; + avdd-supply =3D <®_v3v3_avdd>; + reset-gpios =3D <&gpio4 29 GPIO_ACTIVE_HIGH>; + + port { + panel_in: endpoint { + remote-endpoint =3D <&mipi_dsi_out>; + }; + }; + + }; + + ports { + port@1 { + reg =3D <1>; + mipi_dsi_out: endpoint { + remote-endpoint =3D <&panel_in>; + }; + }; + }; +}; + +&gpu { + status =3D "okay"; +}; + +&iomuxc { + + /* This is for both PWM and voltage regulators for display */ + pinctrl_bl: pwm1grp { + fsl,pins =3D < + MX8MN_IOMUXC_GPIO1_IO01_PWM1_OUT 0x16 + >; + }; + + pinctrl_panel: panelgrp { + fsl,pins =3D < + MX8MN_IOMUXC_SAI3_RXC_GPIO4_IO29 0x16 /* panel reset */ + >; + }; + + pinctrl_dvdd: dvddgrp { + fsl,pins =3D < + MX8MN_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x16 /* VDD 3V3_VO3 */ + >; + }; + + pinctrl_avdd: avddgrp { + fsl,pins =3D < + MX8MN_IOMUXC_GPIO1_IO05_GPIO1_IO5 0x16 /* VDD 3V3_VO2 */ + >; + }; +}; --=20 2.43.0