From nobody Thu Dec 18 14:46:29 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9F810C41535 for ; Wed, 13 Dec 2023 14:04:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1441795AbjLMOEm (ORCPT ); Wed, 13 Dec 2023 09:04:42 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35024 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1379239AbjLMOEh (ORCPT ); Wed, 13 Dec 2023 09:04:37 -0500 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 017CE2718; Wed, 13 Dec 2023 05:51:57 -0800 (PST) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 3BDDpll3026773; Wed, 13 Dec 2023 07:51:47 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1702475507; bh=ALW9zThfv5LSEPU4i6e67keaT9XMRbgcY0oV0r49IkI=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=S2UHxNxxabIPEzZkLNVhFA2xuqSL5egl968xqxCuOFvGHF6zUT/BjhH4mfh8vMhkt e7SCTLy39nBjFwxC15UpdGKRsHAOSGLHtuI3KzLegY/8ZVoEhlR2R5BX7oVcPXNdUL k5jA6H0D/uZk8nlFfPYS9BimZcr2RC+APPM3Tb08= Received: from DFLE109.ent.ti.com (dfle109.ent.ti.com [10.64.6.30]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 3BDDplHu120614 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 13 Dec 2023 07:51:47 -0600 Received: from DFLE103.ent.ti.com (10.64.6.24) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 13 Dec 2023 07:51:47 -0600 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 13 Dec 2023 07:51:47 -0600 Received: from uda0132425.dhcp.ti.com (uda0132425.dhcp.ti.com [172.24.227.94]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 3BDDpeLC101220; Wed, 13 Dec 2023 07:51:44 -0600 From: Vignesh Raghavendra To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: , , , Subject: [PATCH v2 1/3] arm64: dts: ti: k3-am65: Add additional regs for DMA components Date: Wed, 13 Dec 2023 19:21:36 +0530 Message-ID: <20231213135138.929517-2-vigneshr@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231213135138.929517-1-vigneshr@ti.com> References: <20231213135138.929517-1-vigneshr@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Manorit Chawdhry Add additional reg properties for UDMA and RingAcc nodes which are mostly used by bootloader components before Device Manager firmware services are available, in order to setup DMA transfers. Signed-off-by: Manorit Chawdhry Signed-off-by: Vignesh Raghavendra Reviewed-by: Jai Luthra --- arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 8 ++++++-- arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi | 8 ++++++-- 2 files changed, 12 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts= /ti/k3-am65-main.dtsi index cc59fc648b56..fcea54465636 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi @@ -792,8 +792,12 @@ main_udmap: dma-controller@31150000 { compatible =3D "ti,am654-navss-main-udmap"; reg =3D <0x0 0x31150000 0x0 0x100>, <0x0 0x34000000 0x0 0x100000>, - <0x0 0x35000000 0x0 0x100000>; - reg-names =3D "gcfg", "rchanrt", "tchanrt"; + <0x0 0x35000000 0x0 0x100000>, + <0x0 0x30b00000 0x0 0x10000>, + <0x0 0x30c00000 0x0 0x10000>, + <0x0 0x30d00000 0x0 0x8000>; + reg-names =3D "gcfg", "rchanrt", "tchanrt", + "tchan", "rchan", "rflow"; msi-parent =3D <&inta_main_udmass>; #dma-cells =3D <1>; =20 diff --git a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi b/arch/arm64/boot/dts/= ti/k3-am65-mcu.dtsi index edd5cfbec40e..ecd7356f3315 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi @@ -214,8 +214,12 @@ mcu_udmap: dma-controller@285c0000 { compatible =3D "ti,am654-navss-mcu-udmap"; reg =3D <0x0 0x285c0000 0x0 0x100>, <0x0 0x2a800000 0x0 0x40000>, - <0x0 0x2aa00000 0x0 0x40000>; - reg-names =3D "gcfg", "rchanrt", "tchanrt"; + <0x0 0x2aa00000 0x0 0x40000>, + <0x0 0x284a0000 0x0 0x4000>, + <0x0 0x284c0000 0x0 0x4000>, + <0x0 0x28400000 0x0 0x2000>; + reg-names =3D "gcfg", "rchanrt", "tchanrt", + "tchan", "rchan", "rflow"; msi-parent =3D <&inta_main_udmass>; #dma-cells =3D <1>; =20 --=20 2.43.0 From nobody Thu Dec 18 14:46:29 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7D0F4C4332F for ; Wed, 13 Dec 2023 14:04:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1379275AbjLMOEk (ORCPT ); Wed, 13 Dec 2023 09:04:40 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35018 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1379234AbjLMOEh (ORCPT ); Wed, 13 Dec 2023 09:04:37 -0500 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0E5CA272B; Wed, 13 Dec 2023 05:51:59 -0800 (PST) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 3BDDpo1r082168; Wed, 13 Dec 2023 07:51:50 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1702475510; bh=0qQebMJ7bQkjmnZJr+klT2pzAR9oH/HwmktifuqGtBE=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=HpeKOBdYWig182j+7eH8naiY3vh6+T+9CDeuERmOezu56IY369FZnJiviU9PxiEtN 0qWC8aWIu5/wkCTHe8cBKcKPnovvwff2ONXdXg20L2kHk44+gXVXxUwISRI4qkva9S vn03XjffrB/eGEW2PQSeWuBcaa7ftiNmqpCHNfLM= Received: from DLEE106.ent.ti.com (dlee106.ent.ti.com [157.170.170.36]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 3BDDpolk041274 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 13 Dec 2023 07:51:50 -0600 Received: from DLEE106.ent.ti.com (157.170.170.36) by DLEE106.ent.ti.com (157.170.170.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 13 Dec 2023 07:51:50 -0600 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DLEE106.ent.ti.com (157.170.170.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 13 Dec 2023 07:51:50 -0600 Received: from uda0132425.dhcp.ti.com (uda0132425.dhcp.ti.com [172.24.227.94]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 3BDDpeLD101220; Wed, 13 Dec 2023 07:51:47 -0600 From: Vignesh Raghavendra To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: , , , Subject: [PATCH v2 2/3] arm64: dts: ti: k3-j7*: Add additional regs for DMA components Date: Wed, 13 Dec 2023 19:21:37 +0530 Message-ID: <20231213135138.929517-3-vigneshr@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231213135138.929517-1-vigneshr@ti.com> References: <20231213135138.929517-1-vigneshr@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Manorit Chawdhry Add additional reg properties for UDMA and RingAcc nodes which are mostly used by bootloader components before Device Manager firmware services are available, in order to setup DMA transfers. Signed-off-by: Manorit Chawdhry Signed-off-by: Vignesh Raghavendra Reviewed-by: Jai Luthra --- arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 8 ++++++-- arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 8 ++++++-- arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 8 ++++++-- arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 8 ++++++-- arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 8 ++++++-- arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 8 ++++++-- arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 8 ++++++-- arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 8 ++++++-- 8 files changed, 48 insertions(+), 16 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dt= s/ti/k3-j7200-main.dtsi index 264913f83287..b8424994ac5f 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi @@ -281,8 +281,12 @@ main_udmap: dma-controller@31150000 { compatible =3D "ti,j721e-navss-main-udmap"; reg =3D <0x00 0x31150000 0x00 0x100>, <0x00 0x34000000 0x00 0x100000>, - <0x00 0x35000000 0x00 0x100000>; - reg-names =3D "gcfg", "rchanrt", "tchanrt"; + <0x00 0x35000000 0x00 0x100000>, + <0x00 0x30b00000 0x00 0x4000>, + <0x00 0x30c00000 0x00 0x4000>, + <0x00 0x30d00000 0x00 0x4000>; + reg-names =3D "gcfg", "rchanrt", "tchanrt", + "tchan", "rchan", "rflow"; msi-parent =3D <&main_udmass_inta>; #dma-cells =3D <1>; =20 diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/b= oot/dts/ti/k3-j7200-mcu-wakeup.dtsi index 672cb2acc1be..60b26374ae0c 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi @@ -353,8 +353,12 @@ mcu_udmap: dma-controller@285c0000 { compatible =3D "ti,j721e-navss-mcu-udmap"; reg =3D <0x00 0x285c0000 0x00 0x100>, <0x00 0x2a800000 0x00 0x40000>, - <0x00 0x2aa00000 0x00 0x40000>; - reg-names =3D "gcfg", "rchanrt", "tchanrt"; + <0x00 0x2aa00000 0x00 0x40000>, + <0x00 0x284a0000 0x00 0x4000>, + <0x00 0x284c0000 0x00 0x4000>, + <0x00 0x28400000 0x00 0x2000>; + reg-names =3D "gcfg", "rchanrt", "tchanrt", + "tchan", "rchan", "rflow"; msi-parent =3D <&main_udmass_inta>; #dma-cells =3D <1>; =20 diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dt= s/ti/k3-j721e-main.dtsi index 746b9f8b1c64..2569b4c08ffb 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi @@ -382,8 +382,12 @@ main_udmap: dma-controller@31150000 { compatible =3D "ti,j721e-navss-main-udmap"; reg =3D <0x0 0x31150000 0x0 0x100>, <0x0 0x34000000 0x0 0x100000>, - <0x0 0x35000000 0x0 0x100000>; - reg-names =3D "gcfg", "rchanrt", "tchanrt"; + <0x0 0x35000000 0x0 0x100000>, + <0x0 0x30b00000 0x0 0x20000>, + <0x0 0x30c00000 0x0 0x10000>, + <0x0 0x30d00000 0x0 0x8000>; + reg-names =3D "gcfg", "rchanrt", "tchanrt", + "tchan", "rchan", "rflow"; msi-parent =3D <&main_udmass_inta>; #dma-cells =3D <1>; =20 diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/b= oot/dts/ti/k3-j721e-mcu-wakeup.dtsi index 8f259efe3af9..a74912d9e4da 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi @@ -475,8 +475,12 @@ mcu_udmap: dma-controller@285c0000 { compatible =3D "ti,j721e-navss-mcu-udmap"; reg =3D <0x0 0x285c0000 0x0 0x100>, <0x0 0x2a800000 0x0 0x40000>, - <0x0 0x2aa00000 0x0 0x40000>; - reg-names =3D "gcfg", "rchanrt", "tchanrt"; + <0x0 0x2aa00000 0x0 0x40000>, + <0x0 0x284a0000 0x0 0x4000>, + <0x0 0x284c0000 0x0 0x4000>, + <0x0 0x28400000 0x0 0x2000>; + reg-names =3D "gcfg", "rchanrt", "tchanrt", + "tchan", "rchan", "rflow"; msi-parent =3D <&main_udmass_inta>; #dma-cells =3D <1>; =20 diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/d= ts/ti/k3-j721s2-main.dtsi index b03731b53a26..bf959312fad0 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi @@ -1086,8 +1086,12 @@ main_udmap: dma-controller@31150000 { compatible =3D "ti,j721e-navss-main-udmap"; reg =3D <0x0 0x31150000 0x0 0x100>, <0x0 0x34000000 0x0 0x80000>, - <0x0 0x35000000 0x0 0x200000>; - reg-names =3D "gcfg", "rchanrt", "tchanrt"; + <0x0 0x35000000 0x0 0x200000>, + <0x0 0x30b00000 0x0 0x20000>, + <0x0 0x30c00000 0x0 0x8000>, + <0x0 0x30d00000 0x0 0x4000>; + reg-names =3D "gcfg", "rchanrt", "tchanrt", + "tchan", "rchan", "rflow"; msi-parent =3D <&main_udmass_inta>; #dma-cells =3D <1>; =20 diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/= boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi index d9e2cab8a8c5..80aa33c58a45 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi @@ -478,8 +478,12 @@ mcu_udmap: dma-controller@285c0000 { compatible =3D "ti,j721e-navss-mcu-udmap"; reg =3D <0x0 0x285c0000 0x0 0x100>, <0x0 0x2a800000 0x0 0x40000>, - <0x0 0x2aa00000 0x0 0x40000>; - reg-names =3D "gcfg", "rchanrt", "tchanrt"; + <0x0 0x2aa00000 0x0 0x40000>, + <0x0 0x284a0000 0x0 0x4000>, + <0x0 0x284c0000 0x0 0x4000>, + <0x0 0x28400000 0x0 0x2000>; + reg-names =3D "gcfg", "rchanrt", "tchanrt", + "tchan", "rchan", "rflow"; msi-parent =3D <&main_udmass_inta>; #dma-cells =3D <1>; =20 diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/d= ts/ti/k3-j784s4-main.dtsi index d89bcddcfe3d..827328450f96 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi @@ -1188,8 +1188,12 @@ main_udmap: dma-controller@31150000 { compatible =3D "ti,j721e-navss-main-udmap"; reg =3D <0x00 0x31150000 0x00 0x100>, <0x00 0x34000000 0x00 0x80000>, - <0x00 0x35000000 0x00 0x200000>; - reg-names =3D "gcfg", "rchanrt", "tchanrt"; + <0x00 0x35000000 0x00 0x200000>, + <0x00 0x30b00000 0x00 0x20000>, + <0x00 0x30c00000 0x00 0x8000>, + <0x00 0x30d00000 0x00 0x4000>; + reg-names =3D "gcfg", "rchanrt", "tchanrt", + "tchan", "rchan", "rflow"; msi-parent =3D <&main_udmass_inta>; #dma-cells =3D <1>; =20 diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi b/arch/arm64/= boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi index 119f4e2cc0d1..3902a921d7e5 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi @@ -486,8 +486,12 @@ mcu_udmap: dma-controller@285c0000 { compatible =3D "ti,j721e-navss-mcu-udmap"; reg =3D <0x00 0x285c0000 0x00 0x100>, <0x00 0x2a800000 0x00 0x40000>, - <0x00 0x2aa00000 0x00 0x40000>; - reg-names =3D "gcfg", "rchanrt", "tchanrt"; + <0x00 0x2aa00000 0x00 0x40000>, + <0x00 0x284a0000 0x00 0x4000>, + <0x00 0x284c0000 0x00 0x4000>, + <0x00 0x28400000 0x00 0x2000>; + reg-names =3D "gcfg", "rchanrt", "tchanrt", + "tchan", "rchan", "rflow"; msi-parent =3D <&main_udmass_inta>; #dma-cells =3D <1>; =20 --=20 2.43.0 From nobody Thu Dec 18 14:46:29 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7D86CC4167B for ; Wed, 13 Dec 2023 13:54:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1379318AbjLMNyZ (ORCPT ); Wed, 13 Dec 2023 08:54:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35044 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1379375AbjLMNyG (ORCPT ); Wed, 13 Dec 2023 08:54:06 -0500 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0D9392D63; Wed, 13 Dec 2023 05:52:03 -0800 (PST) Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 3BDDprYx026786; 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Wed, 13 Dec 2023 07:51:53 -0600 Received: from uda0132425.dhcp.ti.com (uda0132425.dhcp.ti.com [172.24.227.94]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 3BDDpeLE101220; Wed, 13 Dec 2023 07:51:50 -0600 From: Vignesh Raghavendra To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: , , , Subject: [PATCH v2 3/3] arm64: dts: ti: k3-am6*: Add additional regs for DMA components Date: Wed, 13 Dec 2023 19:21:38 +0530 Message-ID: <20231213135138.929517-4-vigneshr@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231213135138.929517-1-vigneshr@ti.com> References: <20231213135138.929517-1-vigneshr@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add additional reg properties for BCDMA and PKTDMA nodes which are mostly used by bootloader components before Device Manager firmware services are available, in order to setup DMA transfers. Signed-off-by: Vignesh Raghavendra Reviewed-by: Jai Luthra --- arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 18 ++++++++++++++---- arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 18 ++++++++++++++---- arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 18 ++++++++++++++---- arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 18 ++++++++++++++---- 4 files changed, 56 insertions(+), 16 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts= /ti/k3-am62-main.dtsi index 49000a97c153..357970f1134f 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi @@ -121,8 +121,13 @@ main_bcdma: dma-controller@485c0100 { <0x00 0x4c000000 0x00 0x20000>, <0x00 0x4a820000 0x00 0x20000>, <0x00 0x4aa40000 0x00 0x20000>, - <0x00 0x4bc00000 0x00 0x100000>; - reg-names =3D "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt"; + <0x00 0x4bc00000 0x00 0x100000>, + <0x00 0x48600000 0x00 0x8000>, + <0x00 0x484a4000 0x00 0x2000>, + <0x00 0x484c2000 0x00 0x2000>, + <0x00 0x48420000 0x00 0x2000>; + reg-names =3D "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt", + "ring", "tchan", "rchan", "bchan"; msi-parent =3D <&inta_main_dmss>; #dma-cells =3D <3>; =20 @@ -138,8 +143,13 @@ main_pktdma: dma-controller@485c0000 { reg =3D <0x00 0x485c0000 0x00 0x100>, <0x00 0x4a800000 0x00 0x20000>, <0x00 0x4aa00000 0x00 0x40000>, - <0x00 0x4b800000 0x00 0x400000>; - reg-names =3D "gcfg", "rchanrt", "tchanrt", "ringrt"; + <0x00 0x4b800000 0x00 0x400000>, + <0x00 0x485e0000 0x00 0x10000>, + <0x00 0x484a0000 0x00 0x2000>, + <0x00 0x484c0000 0x00 0x2000>, + <0x00 0x48430000 0x00 0x1000>; + reg-names =3D "gcfg", "rchanrt", "tchanrt", "ringrt", + "ring", "tchan", "rchan", "rflow"; msi-parent =3D <&inta_main_dmss>; #dma-cells =3D <2>; =20 diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dt= s/ti/k3-am62a-main.dtsi index 2338a92a4c9f..f0b8c9ab1459 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi @@ -101,8 +101,13 @@ main_bcdma: dma-controller@485c0100 { <0x00 0x4c000000 0x00 0x20000>, <0x00 0x4a820000 0x00 0x20000>, <0x00 0x4aa40000 0x00 0x20000>, - <0x00 0x4bc00000 0x00 0x100000>; - reg-names =3D "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt"; + <0x00 0x4bc00000 0x00 0x100000>, + <0x00 0x48600000 0x00 0x8000>, + <0x00 0x484a4000 0x00 0x2000>, + <0x00 0x484c2000 0x00 0x2000>, + <0x00 0x48420000 0x00 0x2000>; + reg-names =3D "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt", + "ring", "tchan", "rchan", "bchan"; msi-parent =3D <&inta_main_dmss>; #dma-cells =3D <3>; ti,sci =3D <&dmsc>; @@ -117,8 +122,13 @@ main_pktdma: dma-controller@485c0000 { reg =3D <0x00 0x485c0000 0x00 0x100>, <0x00 0x4a800000 0x00 0x20000>, <0x00 0x4aa00000 0x00 0x40000>, - <0x00 0x4b800000 0x00 0x400000>; - reg-names =3D "gcfg", "rchanrt", "tchanrt", "ringrt"; + <0x00 0x4b800000 0x00 0x400000>, + <0x00 0x485e0000 0x00 0x10000>, + <0x00 0x484a0000 0x00 0x2000>, + <0x00 0x484c0000 0x00 0x2000>, + <0x00 0x48430000 0x00 0x1000>; + reg-names =3D "gcfg", "rchanrt", "tchanrt", "ringrt", + "ring", "tchan", "rchan", "rflow"; msi-parent =3D <&inta_main_dmss>; #dma-cells =3D <2>; ti,sci =3D <&dmsc>; diff --git a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi b/arch/arm64/boot/dt= s/ti/k3-am62p-main.dtsi index 963758c7d377..4c51bae06b57 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi @@ -101,8 +101,13 @@ main_bcdma: dma-controller@485c0100 { <0x00 0x4c000000 0x00 0x20000>, <0x00 0x4a820000 0x00 0x20000>, <0x00 0x4aa40000 0x00 0x20000>, - <0x00 0x4bc00000 0x00 0x100000>; - reg-names =3D "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt"; + <0x00 0x4bc00000 0x00 0x100000>, + <0x00 0x48600000 0x00 0x8000>, + <0x00 0x484a4000 0x00 0x2000>, + <0x00 0x484c2000 0x00 0x2000>, + <0x00 0x48420000 0x00 0x2000>; + reg-names =3D "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt", + "ring", "tchan", "rchan", "bchan"; msi-parent =3D <&inta_main_dmss>; #dma-cells =3D <3>; =20 @@ -119,8 +124,13 @@ main_pktdma: dma-controller@485c0000 { reg =3D <0x00 0x485c0000 0x00 0x100>, <0x00 0x4a800000 0x00 0x20000>, <0x00 0x4aa00000 0x00 0x40000>, - <0x00 0x4b800000 0x00 0x400000>; - reg-names =3D "gcfg", "rchanrt", "tchanrt", "ringrt"; + <0x00 0x4b800000 0x00 0x400000>, + <0x00 0x485e0000 0x00 0x10000>, + <0x00 0x484a0000 0x00 0x2000>, + <0x00 0x484c0000 0x00 0x2000>, + <0x00 0x48430000 0x00 0x1000>; + reg-names =3D "gcfg", "rchanrt", "tchanrt", "ringrt", + "ring", "tchan", "rchan", "rflow"; msi-parent =3D <&inta_main_dmss>; #dma-cells =3D <2>; bootph-all; diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts= /ti/k3-am64-main.dtsi index c7be378492e2..e348114f42e0 100644 --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi @@ -138,8 +138,13 @@ main_bcdma: dma-controller@485c0100 { <0x00 0x4c000000 0x00 0x20000>, <0x00 0x4a820000 0x00 0x20000>, <0x00 0x4aa40000 0x00 0x20000>, - <0x00 0x4bc00000 0x00 0x100000>; - reg-names =3D "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt"; + <0x00 0x4bc00000 0x00 0x100000>, + <0x00 0x48600000 0x00 0x8000>, + <0x00 0x484a4000 0x00 0x2000>, + <0x00 0x484c2000 0x00 0x2000>, + <0x00 0x48420000 0x00 0x2000>; + reg-names =3D "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt", + "ring", "tchan", "rchan", "bchan"; msi-parent =3D <&inta_main_dmss>; #dma-cells =3D <3>; =20 @@ -155,8 +160,13 @@ main_pktdma: dma-controller@485c0000 { reg =3D <0x00 0x485c0000 0x00 0x100>, <0x00 0x4a800000 0x00 0x20000>, <0x00 0x4aa00000 0x00 0x40000>, - <0x00 0x4b800000 0x00 0x400000>; - reg-names =3D "gcfg", "rchanrt", "tchanrt", "ringrt"; + <0x00 0x4b800000 0x00 0x400000>, + <0x00 0x485e0000 0x00 0x20000>, + <0x00 0x484a0000 0x00 0x4000>, + <0x00 0x484c0000 0x00 0x2000>, + <0x00 0x48430000 0x00 0x4000>; + reg-names =3D "gcfg", "rchanrt", "tchanrt", "ringrt", + "ring", "tchan", "rchan", "rflow"; msi-parent =3D <&inta_main_dmss>; #dma-cells =3D <2>; =20 --=20 2.43.0