From nobody Sun Dec 28 02:44:46 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E9D7EC4332F for ; Thu, 14 Dec 2023 01:20:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1443010AbjLNBUQ (ORCPT ); Wed, 13 Dec 2023 20:20:16 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33282 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1442951AbjLNBUH (ORCPT ); Wed, 13 Dec 2023 20:20:07 -0500 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9B4AAE8; Wed, 13 Dec 2023 17:20:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1702516813; x=1734052813; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=CQVvcyQLdkOIdRdgv540U0ksDCxgf70OdG+UdTGF5MA=; b=mOJzgvCmx/jRL5LYH1hYIA43vGg07Kx80UTyk7wec6a0jZyocy0/bDSN 9kjEWBH27j+c9hIFMjRLQb/XJb2Y1b0GyYKm/UjwpLLg7umZCUOc8AnNW V6MDBV19eXMVph3kdl9hl45H87snIKBIcAmZapoWMfAA1vQFfQmlzVNL/ QnsFCktQgpScwhXhJDjsqlDW4IrCiqeZ6rgkU6vY9L9Ynbn+GW/EINdi7 6niB4IChoWs9X5/z1jNyB7gbREasPNEhLlphQRDkXJQ5hI7GWFHuZD8X/ aNomxqRjzaSg+/WJpHj9GsXsrZdNUHe8XhOdRrKu814u/vfwXbMbRspD0 Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10923"; a="13747626" X-IronPort-AV: E=Sophos;i="6.04,274,1695711600"; d="scan'208";a="13747626" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Dec 2023 17:20:13 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10923"; a="767436330" X-IronPort-AV: E=Sophos;i="6.04,274,1695711600"; d="scan'208";a="767436330" Received: from iweiny-desk3.amr.corp.intel.com (HELO localhost) ([10.212.117.241]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Dec 2023 17:20:12 -0800 From: Ira Weiny Date: Wed, 13 Dec 2023 17:19:57 -0800 Subject: [PATCH v3 4/7] cxl/events: Separate UUID from event structures MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20231213-cxl-cper-v3-4-7fd863dd0d25@intel.com> References: <20231213-cxl-cper-v3-0-7fd863dd0d25@intel.com> In-Reply-To: <20231213-cxl-cper-v3-0-7fd863dd0d25@intel.com> To: Dan Williams , Jonathan Cameron , Smita Koralahalli , Shiju Jose Cc: Yazen Ghannam , Davidlohr Bueso , Dave Jiang , Alison Schofield , Vishal Verma , Ard Biesheuvel , linux-efi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-cxl@vger.kernel.org, Ira Weiny X-Mailer: b4 0.13-dev-2539e X-Developer-Signature: v=1; a=ed25519-sha256; t=1702516806; l=7763; i=ira.weiny@intel.com; s=20221222; h=from:subject:message-id; bh=CQVvcyQLdkOIdRdgv540U0ksDCxgf70OdG+UdTGF5MA=; b=VHTc+g2I1Ve1Zqbg+86GKZtHIe44UiNPu8YCNoI7lLgakhz0Ur6gdEzDSY6b5l5JEg0i2t92s wZYx9V1q9FrAZXqQF8mvMpodZIXJNIs6YQsrKTeJQf49Arn0/gLYDSa X-Developer-Key: i=ira.weiny@intel.com; a=ed25519; pk=brwqReAJklzu/xZ9FpSsMPSQ/qkSalbg6scP3w809Ec= Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The UEFI CXL CPER structure does not include the UUID. Now that the UUID is passed separately to the trace event there is no need to have the UUID in those structures. Move UUID from the event record header to the raw structures. Adjust cxl-test to Create dummy structures for creating test records. Signed-off-by: Ira Weiny --- drivers/cxl/core/mbox.c | 2 +- include/linux/cxl-event.h | 10 ++-- tools/testing/cxl/test/mem.c | 129 +++++++++++++++++++++++++--------------= ---- 3 files changed, 81 insertions(+), 60 deletions(-) diff --git a/drivers/cxl/core/mbox.c b/drivers/cxl/core/mbox.c index be2ad3b6f431..5c4e4a692dea 100644 --- a/drivers/cxl/core/mbox.c +++ b/drivers/cxl/core/mbox.c @@ -844,7 +844,7 @@ static void cxl_event_trace_record(const struct cxl_mem= dev *cxlmd, enum cxl_event_log_type type, struct cxl_event_record_raw *record) { - uuid_t *id =3D &record->hdr.id; + uuid_t *id =3D &record->id; =20 if (uuid_equal(id, &gen_media_event_uuid)) { struct cxl_event_gen_media *rec =3D diff --git a/include/linux/cxl-event.h b/include/linux/cxl-event.h index 1c94e8fdd227..ebb00ead1496 100644 --- a/include/linux/cxl-event.h +++ b/include/linux/cxl-event.h @@ -8,12 +8,7 @@ * Copyright(c) 2023 Intel Corporation. */ =20 -/* - * Common Event Record Format - * CXL rev 3.0 section 8.2.9.2.1; Table 8-42 - */ struct cxl_event_record_hdr { - uuid_t id; u8 length; u8 flags[3]; __le16 handle; @@ -23,8 +18,13 @@ struct cxl_event_record_hdr { u8 reserved[15]; } __packed; =20 +/* + * Common Event Record Format + * CXL rev 3.0 section 8.2.9.2.1; Table 8-42 + */ #define CXL_EVENT_RECORD_DATA_LENGTH 0x50 struct cxl_event_record_raw { + uuid_t id; struct cxl_event_record_hdr hdr; u8 data[CXL_EVENT_RECORD_DATA_LENGTH]; } __packed; diff --git a/tools/testing/cxl/test/mem.c b/tools/testing/cxl/test/mem.c index 5a95b04b329a..9cc2b8ce1efd 100644 --- a/tools/testing/cxl/test/mem.c +++ b/tools/testing/cxl/test/mem.c @@ -337,9 +337,9 @@ static void cxl_mock_event_trigger(struct device *dev) } =20 struct cxl_event_record_raw maint_needed =3D { + .id =3D UUID_INIT(0xBA5EBA11, 0xABCD, 0xEFEB, + 0xa5, 0x5a, 0xa5, 0x5a, 0xa5, 0xa5, 0x5a, 0xa5), .hdr =3D { - .id =3D UUID_INIT(0xBA5EBA11, 0xABCD, 0xEFEB, - 0xa5, 0x5a, 0xa5, 0x5a, 0xa5, 0xa5, 0x5a, 0xa5), .length =3D sizeof(struct cxl_event_record_raw), .flags[0] =3D CXL_EVENT_RECORD_FLAG_MAINT_NEEDED, /* .handle =3D Set dynamically */ @@ -349,9 +349,9 @@ struct cxl_event_record_raw maint_needed =3D { }; =20 struct cxl_event_record_raw hardware_replace =3D { + .id =3D UUID_INIT(0xABCDEFEB, 0xBA11, 0xBA5E, + 0xa5, 0x5a, 0xa5, 0x5a, 0xa5, 0xa5, 0x5a, 0xa5), .hdr =3D { - .id =3D UUID_INIT(0xABCDEFEB, 0xBA11, 0xBA5E, - 0xa5, 0x5a, 0xa5, 0x5a, 0xa5, 0xa5, 0x5a, 0xa5), .length =3D sizeof(struct cxl_event_record_raw), .flags[0] =3D CXL_EVENT_RECORD_FLAG_HW_REPLACE, /* .handle =3D Set dynamically */ @@ -360,61 +360,82 @@ struct cxl_event_record_raw hardware_replace =3D { .data =3D { 0xDE, 0xAD, 0xBE, 0xEF }, }; =20 -struct cxl_event_gen_media gen_media =3D { - .hdr =3D { - .id =3D CXL_EVENT_GEN_MEDIA_UUID, - .length =3D sizeof(struct cxl_event_gen_media), - .flags[0] =3D CXL_EVENT_RECORD_FLAG_PERMANENT, - /* .handle =3D Set dynamically */ - .related_handle =3D cpu_to_le16(0), +struct cxl_test_gen_media { + uuid_t id; + struct cxl_event_gen_media rec; +} __packed; + +struct cxl_test_gen_media gen_media =3D { + .id =3D CXL_EVENT_GEN_MEDIA_UUID, + .rec =3D { + .hdr =3D { + .length =3D sizeof(struct cxl_test_gen_media), + .flags[0] =3D CXL_EVENT_RECORD_FLAG_PERMANENT, + /* .handle =3D Set dynamically */ + .related_handle =3D cpu_to_le16(0), + }, + .phys_addr =3D cpu_to_le64(0x2000), + .descriptor =3D CXL_GMER_EVT_DESC_UNCORECTABLE_EVENT, + .type =3D CXL_GMER_MEM_EVT_TYPE_DATA_PATH_ERROR, + .transaction_type =3D CXL_GMER_TRANS_HOST_WRITE, + /* .validity_flags =3D */ + .channel =3D 1, + .rank =3D 30 }, - .phys_addr =3D cpu_to_le64(0x2000), - .descriptor =3D CXL_GMER_EVT_DESC_UNCORECTABLE_EVENT, - .type =3D CXL_GMER_MEM_EVT_TYPE_DATA_PATH_ERROR, - .transaction_type =3D CXL_GMER_TRANS_HOST_WRITE, - /* .validity_flags =3D */ - .channel =3D 1, - .rank =3D 30 }; =20 -struct cxl_event_dram dram =3D { - .hdr =3D { - .id =3D CXL_EVENT_DRAM_UUID, - .length =3D sizeof(struct cxl_event_dram), - .flags[0] =3D CXL_EVENT_RECORD_FLAG_PERF_DEGRADED, - /* .handle =3D Set dynamically */ - .related_handle =3D cpu_to_le16(0), +struct cxl_test_dram { + uuid_t id; + struct cxl_event_dram rec; +} __packed; + +struct cxl_test_dram dram =3D { + .id =3D CXL_EVENT_DRAM_UUID, + .rec =3D { + .hdr =3D { + .length =3D sizeof(struct cxl_test_dram), + .flags[0] =3D CXL_EVENT_RECORD_FLAG_PERF_DEGRADED, + /* .handle =3D Set dynamically */ + .related_handle =3D cpu_to_le16(0), + }, + .phys_addr =3D cpu_to_le64(0x8000), + .descriptor =3D CXL_GMER_EVT_DESC_THRESHOLD_EVENT, + .type =3D CXL_GMER_MEM_EVT_TYPE_INV_ADDR, + .transaction_type =3D CXL_GMER_TRANS_INTERNAL_MEDIA_SCRUB, + /* .validity_flags =3D */ + .channel =3D 1, + .bank_group =3D 5, + .bank =3D 2, + .column =3D {0xDE, 0xAD}, }, - .phys_addr =3D cpu_to_le64(0x8000), - .descriptor =3D CXL_GMER_EVT_DESC_THRESHOLD_EVENT, - .type =3D CXL_GMER_MEM_EVT_TYPE_INV_ADDR, - .transaction_type =3D CXL_GMER_TRANS_INTERNAL_MEDIA_SCRUB, - /* .validity_flags =3D */ - .channel =3D 1, - .bank_group =3D 5, - .bank =3D 2, - .column =3D {0xDE, 0xAD}, }; =20 -struct cxl_event_mem_module mem_module =3D { - .hdr =3D { - .id =3D CXL_EVENT_MEM_MODULE_UUID, - .length =3D sizeof(struct cxl_event_mem_module), - /* .handle =3D Set dynamically */ - .related_handle =3D cpu_to_le16(0), +struct cxl_test_mem_module { + uuid_t id; + struct cxl_event_mem_module rec; +} __packed; + +struct cxl_test_mem_module mem_module =3D { + .id =3D CXL_EVENT_MEM_MODULE_UUID, + .rec =3D { + .hdr =3D { + .length =3D sizeof(struct cxl_test_mem_module), + /* .handle =3D Set dynamically */ + .related_handle =3D cpu_to_le16(0), + }, + .event_type =3D CXL_MMER_TEMP_CHANGE, + .info =3D { + .health_status =3D CXL_DHI_HS_PERFORMANCE_DEGRADED, + .media_status =3D CXL_DHI_MS_ALL_DATA_LOST, + .add_status =3D (CXL_DHI_AS_CRITICAL << 2) | + (CXL_DHI_AS_WARNING << 4) | + (CXL_DHI_AS_WARNING << 5), + .device_temp =3D { 0xDE, 0xAD}, + .dirty_shutdown_cnt =3D { 0xde, 0xad, 0xbe, 0xef }, + .cor_vol_err_cnt =3D { 0xde, 0xad, 0xbe, 0xef }, + .cor_per_err_cnt =3D { 0xde, 0xad, 0xbe, 0xef }, + } }, - .event_type =3D CXL_MMER_TEMP_CHANGE, - .info =3D { - .health_status =3D CXL_DHI_HS_PERFORMANCE_DEGRADED, - .media_status =3D CXL_DHI_MS_ALL_DATA_LOST, - .add_status =3D (CXL_DHI_AS_CRITICAL << 2) | - (CXL_DHI_AS_WARNING << 4) | - (CXL_DHI_AS_WARNING << 5), - .device_temp =3D { 0xDE, 0xAD}, - .dirty_shutdown_cnt =3D { 0xde, 0xad, 0xbe, 0xef }, - .cor_vol_err_cnt =3D { 0xde, 0xad, 0xbe, 0xef }, - .cor_per_err_cnt =3D { 0xde, 0xad, 0xbe, 0xef }, - } }; =20 static int mock_set_timestamp(struct cxl_dev_state *cxlds, @@ -436,11 +457,11 @@ static int mock_set_timestamp(struct cxl_dev_state *c= xlds, static void cxl_mock_add_event_logs(struct mock_event_store *mes) { put_unaligned_le16(CXL_GMER_VALID_CHANNEL | CXL_GMER_VALID_RANK, - &gen_media.validity_flags); + &gen_media.rec.validity_flags); =20 put_unaligned_le16(CXL_DER_VALID_CHANNEL | CXL_DER_VALID_BANK_GROUP | CXL_DER_VALID_BANK | CXL_DER_VALID_COLUMN, - &dram.validity_flags); + &dram.rec.validity_flags); =20 mes_add_event(mes, CXL_EVENT_TYPE_INFO, &maint_needed); mes_add_event(mes, CXL_EVENT_TYPE_INFO, --=20 2.43.0