From nobody Sun Dec 28 04:57:19 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BB698C4167B for ; Tue, 12 Dec 2023 23:04:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1377993AbjLLXEP (ORCPT ); Tue, 12 Dec 2023 18:04:15 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40784 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1377958AbjLLXDo (ORCPT ); Tue, 12 Dec 2023 18:03:44 -0500 Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3752D101; Tue, 12 Dec 2023 15:03:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1702422213; x=1733958213; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=qnCrj0BETPuHi8W8gnPanU69Q8x6K39Z1fpI00xOF3g=; b=HnWGJ+eLjBl8B9j2kU0+hIeTqpEybKIlMrhta1gLTv427Lb6Pu7EHE9m SZ17o1jlzL9wfrDNrZaGOrgqn172xEtkBKTil13ZBmhvc+5LkViZzRsJ0 FTyPHDVXPI6Godj/MHrvpLu6GY5I7a94M8I9cd4v8ph3plPydLh1N6aT0 iK5Sm+nYZW286d44j1elYcNVeB/cBfHNy0j57zOlEk76Fxir1zqrYCGZj Xq+KCp4iR8+LyDaJIynmHSPaln1ijpAQLdY3Q9Can4F5kb72eVzdmVNdU /z3CLkkySOYHFc8C/FtLAChYELeV/Qnua01xN0OWrTImeBlHLWqvdbLP+ w==; X-IronPort-AV: E=McAfee;i="6600,9927,10922"; a="392055993" X-IronPort-AV: E=Sophos;i="6.04,271,1695711600"; d="scan'208";a="392055993" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Dec 2023 15:02:55 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10922"; a="864392020" X-IronPort-AV: E=Sophos;i="6.04,271,1695711600"; d="scan'208";a="864392020" Received: from node-10329.jf.intel.com ([10.54.34.22]) by FMSMGA003.fm.intel.com with ESMTP; 12 Dec 2023 15:02:54 -0800 From: weilin.wang@intel.com To: weilin.wang@intel.com, Ian Rogers , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Adrian Hunter , Kan Liang Cc: linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, Perry Taylor , Samantha Alt , Caleb Biggers , Mark Rutland , Yang Jihong Subject: [RFC PATCH v3 11/18] perf stat: Add function to handle special events in hardware-grouping Date: Tue, 12 Dec 2023 15:02:17 -0800 Message-Id: <20231212230224.1473300-13-weilin.wang@intel.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20231212230224.1473300-1-weilin.wang@intel.com> References: <20231212230224.1473300-1-weilin.wang@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Weilin Wang There are some special events like topdown events and TSC that are not decribed in pmu-event JSON files. Add support to handle this type of events. This should be considered as a temporary solution because including these events in JSON files would be a better solution. Signed-off-by: Weilin Wang --- tools/perf/util/metricgroup.c | 25 +++++++++++++++++++++++-- tools/perf/util/metricgroup.h | 15 +++++++++++++++ 2 files changed, 38 insertions(+), 2 deletions(-) diff --git a/tools/perf/util/metricgroup.c b/tools/perf/util/metricgroup.c index 5d9ed22963be..03383f820e06 100644 --- a/tools/perf/util/metricgroup.c +++ b/tools/perf/util/metricgroup.c @@ -2023,6 +2023,15 @@ static int create_grouping(struct list_head *pmu_inf= o_list, return ret; }; =20 +static bool is_special_event(const char *id) +{ + for (int i =3D 0; i < SPECIAL_EVENT_MAX; i++) { + if (!strncmp(id, special_event_names[i], strlen(special_event_names[i]))) + return true; + } + return false; +} + /** * hw_aware_build_grouping - Build event groupings by reading counter * requirement of the events and counter available on the system from @@ -2047,7 +2056,17 @@ static int hw_aware_build_grouping(struct expr_parse= _ctx *ctx __maybe_unused, hashmap__for_each_entry(ctx->ids, cur, bkt) { const char *id =3D cur->pkey; =20 - pr_debug("found event %s\n", id); + if (is_special_event(id)) { + struct metricgroup__event_info *event; + + event =3D event_info__new(id, "default_core", "0", + /*free_counter=3D*/true); + if (!event) + goto err_out; + + list_add(&event->nd, &event_info_list); + continue; + } ret =3D get_metricgroup_events(id, etable, &event_info_list); if (ret) goto err_out; @@ -2519,8 +2538,10 @@ int metricgroup__parse_groups(struct evlist *perf_ev= list, ret =3D hw_aware_parse_groups(perf_evlist, pmu, str, metric_no_threshold, user_requested_cpu_list, system_wide, /*fake_pmu=3D*/NULL, metric_events, table); - if (!ret) + if (!ret) { + pr_info("Hardware aware grouping completed\n"); return 0; + } } =20 return parse_groups(perf_evlist, pmu, str, metric_no_group, metric_no_mer= ge, diff --git a/tools/perf/util/metricgroup.h b/tools/perf/util/metricgroup.h index 51596e4b4341..37fdf8c5ba77 100644 --- a/tools/perf/util/metricgroup.h +++ b/tools/perf/util/metricgroup.h @@ -79,6 +79,21 @@ struct metric_expr { #define TRANSFER_FIRST_BYTE(pos) (7 - pos) #define TRANSFER_SEC_BYTE(pos) (23 - pos) =20 +/* Special events that are not described in pmu-event JSON files. + * topdown-* and TSC use dedicated registers, set as free + * counter for grouping purpose + */ +enum special_events { + TOPDOWN =3D 0, + TSC =3D 1, + SPECIAL_EVENT_MAX, +}; + +static const char *const special_event_names[SPECIAL_EVENT_MAX] =3D { + "topdown-", + "TSC", +}; + /** * An event used in a metric. This info is for metric grouping. */ --=20 2.39.3