From nobody Wed Dec 17 02:44:58 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 54B1AC4167B for ; Sun, 10 Dec 2023 06:57:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231604AbjLJG4w (ORCPT ); Sun, 10 Dec 2023 01:56:52 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50928 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231596AbjLJG4v (ORCPT ); Sun, 10 Dec 2023 01:56:51 -0500 Received: from out-173.mta1.migadu.com (out-173.mta1.migadu.com [95.215.58.173]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BA2C611C for ; Sat, 9 Dec 2023 22:56:56 -0800 (PST) X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=jookia.org; s=key1; t=1702191415; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=LKeocmb910W+MflyKsO/aX9nOqpcVtW8TrdWpRGtl3w=; b=arN5QEEAmunfx2Kwth8M/y9Sm0gVl3bXcOcy0paX28p5ZbPMhIjmBusOf83sv1pjiAvZdj 471XE4AZkXeqlin0obo7ZnSxIp/EF/2ge7IdhTuamELRyIJjyhifv+skKILt3pI/Yd/3YY WUjphVz6Gojk1gVC4kd0T6mtn+brZx5aDHW8wTZEGYIlK0e3O37w1KTTAE2XwstHyvJAlQ o9I0x5R5BxP1gk4O8Z1bfvGhCIxQRQAMg+QM29J7XEXeapIBtuR79vc1cgU6ADxYWrGItp A5/Nblv1s01262OQ0VrWiD9/7BOlwUt00vi+bkdi5mztHi21IFu5BMs/xbCQmQ== From: John Watts Date: Sun, 10 Dec 2023 17:55:51 +1100 Subject: [PATCH RFC v5 3/7] drm/panel: nv3052c: Allow specifying registers per panel MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20231210-fs035vg158-v5-3-d75adc75571f@jookia.org> References: <20231210-fs035vg158-v5-0-d75adc75571f@jookia.org> In-Reply-To: <20231210-fs035vg158-v5-0-d75adc75571f@jookia.org> To: dri-devel@lists.freedesktop.org Cc: Neil Armstrong , Jessica Zhang , Sam Ravnborg , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Cercueil , Christophe Branchereau , John Watts , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Rob Herring X-Migadu-Flow: FLOW_OUT Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Panel initialization registers are per-display and not tied to the controller itself. Different panels will specify their own registers. Attach the sequences to the panel info struct so future panels can specify their own sequences. Signed-off-by: John Watts Reviewed-by: Jessica Zhang --- drivers/gpu/drm/panel/panel-newvision-nv3052c.c | 24 +++++++++++++++------= --- 1 file changed, 15 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-newvision-nv3052c.c b/drivers/gpu/= drm/panel/panel-newvision-nv3052c.c index 90dea21f9856..b0114b5e8554 100644 --- a/drivers/gpu/drm/panel/panel-newvision-nv3052c.c +++ b/drivers/gpu/drm/panel/panel-newvision-nv3052c.c @@ -20,11 +20,18 @@ #include #include =20 +struct nv3052c_reg { + u8 cmd; + u8 val; +}; + struct nv3052c_panel_info { const struct drm_display_mode *display_modes; unsigned int num_modes; u16 width_mm, height_mm; u32 bus_format, bus_flags; + const struct nv3052c_reg *panel_regs; + unsigned int panel_regs_len; }; =20 struct nv3052c { @@ -36,12 +43,7 @@ struct nv3052c { struct gpio_desc *reset_gpio; }; =20 -struct nv3052c_reg { - u8 cmd; - u8 val; -}; - -static const struct nv3052c_reg nv3052c_panel_regs[] =3D { +static const struct nv3052c_reg ltk035c5444t_panel_regs[] =3D { // EXTC Command set enable, select page 1 { 0xff, 0x30 }, { 0xff, 0x52 }, { 0xff, 0x01 }, // Mostly unknown registers @@ -244,6 +246,8 @@ static inline struct nv3052c *to_nv3052c(struct drm_pan= el *panel) static int nv3052c_prepare(struct drm_panel *panel) { struct nv3052c *priv =3D to_nv3052c(panel); + const struct nv3052c_reg *panel_regs =3D priv->panel_info->panel_regs; + unsigned int panel_regs_len =3D priv->panel_info->panel_regs_len; struct mipi_dbi *dbi =3D &priv->dbi; unsigned int i; int err; @@ -260,9 +264,9 @@ static int nv3052c_prepare(struct drm_panel *panel) gpiod_set_value_cansleep(priv->reset_gpio, 0); usleep_range(5000, 20000); =20 - for (i =3D 0; i < ARRAY_SIZE(nv3052c_panel_regs); i++) { - err =3D mipi_dbi_command(dbi, nv3052c_panel_regs[i].cmd, - nv3052c_panel_regs[i].val); + for (i =3D 0; i < panel_regs_len; i++) { + err =3D mipi_dbi_command(dbi, panel_regs[i].cmd, + panel_regs[i].val); =20 if (err) { dev_err(priv->dev, "Unable to set register: %d\n", err); @@ -463,6 +467,8 @@ static const struct nv3052c_panel_info ltk035c5444t_pan= el_info =3D { .height_mm =3D 64, .bus_format =3D MEDIA_BUS_FMT_RGB888_1X24, .bus_flags =3D DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE, + .panel_regs =3D ltk035c5444t_panel_regs, + .panel_regs_len =3D ARRAY_SIZE(ltk035c5444t_panel_regs), }; =20 static const struct spi_device_id nv3052c_ids[] =3D { --=20 2.43.0