From nobody Wed Dec 17 00:05:00 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9C0C1C4167B for ; Fri, 8 Dec 2023 14:38:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1574004AbjLHOiS (ORCPT ); Fri, 8 Dec 2023 09:38:18 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43240 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1573986AbjLHOiR (ORCPT ); Fri, 8 Dec 2023 09:38:17 -0500 Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [185.132.182.106]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8119419AC; Fri, 8 Dec 2023 06:38:18 -0800 (PST) Received: from pps.filterd (m0288072.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.22/8.17.1.22) with ESMTP id 3B886V1g015617; Fri, 8 Dec 2023 15:38:06 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= selector1; bh=e5JQ/h42L5uhpTPt24TWXUIHpp+cXePsoRZw+56u2lo=; b=6+ Y6/zBLLTDeb9FPZ/PaNDhiubCn23NbV8apdhatVKfplUkMoE/ZdZV8LD79os9s2F 8Fwv3xHu56WtoifEEW7nOK7qz+mbr/B5n86YeCi3NhaPyCJ2N48snCr+CtadSdAl YuUgfiJPTfLdaOytI7fG4O2/6jrbZTG+FQuqjDqfzlRkVy3lWgn79mREB2d3YraU 80g0IAMvgkjjkUd4L0x2ZA4ZApmHxWhkIQj8hldnh0xDwy9ZygI2qsuYuAfhJOCn q8GTTHlV1V6dAWFzFhg+NVrNQzoxJXn3GoYsA0E7/+ev1XGMxVZ/6AKV85Qz3DVf pUqMQw2YtNHt+44cEliw== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3utd2gn3a6-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 08 Dec 2023 15:38:06 +0100 (CET) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 6F722100058; Fri, 8 Dec 2023 15:38:06 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 67466229A79; Fri, 8 Dec 2023 15:38:06 +0100 (CET) Received: from localhost (10.252.31.8) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Fri, 8 Dec 2023 15:38:06 +0100 From: To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Philipp Zabel , Gabriel Fernandez CC: , , , , Subject: [PATCH v6 5/5] arm64: dts: st: add rcc support in stm32mp251 Date: Fri, 8 Dec 2023 15:37:00 +0100 Message-ID: <20231208143700.354785-6-gabriel.fernandez@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231208143700.354785-1-gabriel.fernandez@foss.st.com> References: <20231208143700.354785-1-gabriel.fernandez@foss.st.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.252.31.8] X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-12-08_09,2023-12-07_01,2023-05-22_02 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Gabriel Fernandez Add RCC support to manage clocks and resets on the STM32MP251. Signed-off-by: Gabriel Fernandez --- arch/arm64/boot/dts/st/stm32mp251.dtsi | 59 ++++++++++++++------------ 1 file changed, 31 insertions(+), 28 deletions(-) diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/s= t/stm32mp251.dtsi index 124403f5f1f4..dfbdb3a773e4 100644 --- a/arch/arm64/boot/dts/st/stm32mp251.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi @@ -3,7 +3,9 @@ * Copyright (C) STMicroelectronics 2023 - All Rights Reserved * Author: Alexandre Torgue for STMicroelec= tronics. */ +#include #include +#include =20 / { #address-cells =3D <2>; @@ -35,22 +37,10 @@ arm_wdt: watchdog { }; =20 clocks { - ck_flexgen_08: ck-flexgen-08 { + clk_rcbsec: clk-rcbsec { #clock-cells =3D <0>; compatible =3D "fixed-clock"; - clock-frequency =3D <100000000>; - }; - - ck_flexgen_51: ck-flexgen-51 { - #clock-cells =3D <0>; - compatible =3D "fixed-clock"; - clock-frequency =3D <200000000>; - }; - - ck_icn_ls_mcu: ck-icn-ls-mcu { - #clock-cells =3D <0>; - compatible =3D "fixed-clock"; - clock-frequency =3D <200000000>; + clock-frequency =3D <64000000>; }; }; =20 @@ -122,7 +112,7 @@ usart2: serial@400e0000 { compatible =3D "st,stm32h7-uart"; reg =3D <0x400e0000 0x400>; interrupts =3D ; - clocks =3D <&ck_flexgen_08>; + clocks =3D <&rcc CK_KER_USART2>; status =3D "disabled"; }; =20 @@ -131,7 +121,7 @@ sdmmc1: mmc@48220000 { arm,primecell-periphid =3D <0x00353180>; reg =3D <0x48220000 0x400>, <0x44230400 0x8>; interrupts =3D ; - clocks =3D <&ck_flexgen_51>; + clocks =3D <&rcc CK_KER_SDMMC1 >; clock-names =3D "apb_pclk"; cap-sd-highspeed; cap-mmc-highspeed; @@ -140,6 +130,19 @@ sdmmc1: mmc@48220000 { }; }; =20 + rcc: clock-controller@44200000 { + compatible =3D "st,stm32mp25-rcc"; + reg =3D <0x44200000 0x10000>; + #clock-cells =3D <1>; + #reset-cells =3D <1>; + clock-names =3D "hse", "hsi", "msi", "lse", "lsi"; + clocks =3D <&scmi_clk CK_SCMI_HSE>, + <&scmi_clk CK_SCMI_HSI>, + <&scmi_clk CK_SCMI_MSI>, + <&scmi_clk CK_SCMI_LSE>, + <&scmi_clk CK_SCMI_LSI>; + }; + syscfg: syscon@44230000 { compatible =3D "st,stm32mp25-syscfg", "syscon"; reg =3D <0x44230000 0x10000>; @@ -158,7 +161,7 @@ gpioa: gpio@44240000 { interrupt-controller; #interrupt-cells =3D <2>; reg =3D <0x0 0x400>; - clocks =3D <&ck_icn_ls_mcu>; + clocks =3D <&scmi_clk CK_SCMI_GPIOA>; st,bank-name =3D "GPIOA"; status =3D "disabled"; }; @@ -169,7 +172,7 @@ gpiob: gpio@44250000 { interrupt-controller; #interrupt-cells =3D <2>; reg =3D <0x10000 0x400>; - clocks =3D <&ck_icn_ls_mcu>; + clocks =3D <&scmi_clk CK_SCMI_GPIOB>; st,bank-name =3D "GPIOB"; status =3D "disabled"; }; @@ -180,7 +183,7 @@ gpioc: gpio@44260000 { interrupt-controller; #interrupt-cells =3D <2>; reg =3D <0x20000 0x400>; - clocks =3D <&ck_icn_ls_mcu>; + clocks =3D <&scmi_clk CK_SCMI_GPIOC>; st,bank-name =3D "GPIOC"; status =3D "disabled"; }; @@ -191,7 +194,7 @@ gpiod: gpio@44270000 { interrupt-controller; #interrupt-cells =3D <2>; reg =3D <0x30000 0x400>; - clocks =3D <&ck_icn_ls_mcu>; + clocks =3D <&scmi_clk CK_SCMI_GPIOD>; st,bank-name =3D "GPIOD"; status =3D "disabled"; }; @@ -202,7 +205,7 @@ gpioe: gpio@44280000 { interrupt-controller; #interrupt-cells =3D <2>; reg =3D <0x40000 0x400>; - clocks =3D <&ck_icn_ls_mcu>; + clocks =3D <&scmi_clk CK_SCMI_GPIOE>; st,bank-name =3D "GPIOE"; status =3D "disabled"; }; @@ -213,7 +216,7 @@ gpiof: gpio@44290000 { interrupt-controller; #interrupt-cells =3D <2>; reg =3D <0x50000 0x400>; - clocks =3D <&ck_icn_ls_mcu>; + clocks =3D <&scmi_clk CK_SCMI_GPIOF>; st,bank-name =3D "GPIOF"; status =3D "disabled"; }; @@ -224,7 +227,7 @@ gpiog: gpio@442a0000 { interrupt-controller; #interrupt-cells =3D <2>; reg =3D <0x60000 0x400>; - clocks =3D <&ck_icn_ls_mcu>; + clocks =3D <&scmi_clk CK_SCMI_GPIOG>; st,bank-name =3D "GPIOG"; status =3D "disabled"; }; @@ -235,7 +238,7 @@ gpioh: gpio@442b0000 { interrupt-controller; #interrupt-cells =3D <2>; reg =3D <0x70000 0x400>; - clocks =3D <&ck_icn_ls_mcu>; + clocks =3D <&scmi_clk CK_SCMI_GPIOH>; st,bank-name =3D "GPIOH"; status =3D "disabled"; }; @@ -246,7 +249,7 @@ gpioi: gpio@442c0000 { interrupt-controller; #interrupt-cells =3D <2>; reg =3D <0x80000 0x400>; - clocks =3D <&ck_icn_ls_mcu>; + clocks =3D <&scmi_clk CK_SCMI_GPIOI>; st,bank-name =3D "GPIOI"; status =3D "disabled"; }; @@ -257,7 +260,7 @@ gpioj: gpio@442d0000 { interrupt-controller; #interrupt-cells =3D <2>; reg =3D <0x90000 0x400>; - clocks =3D <&ck_icn_ls_mcu>; + clocks =3D <&scmi_clk CK_SCMI_GPIOJ>; st,bank-name =3D "GPIOJ"; status =3D "disabled"; }; @@ -268,7 +271,7 @@ gpiok: gpio@442e0000 { interrupt-controller; #interrupt-cells =3D <2>; reg =3D <0xa0000 0x400>; - clocks =3D <&ck_icn_ls_mcu>; + clocks =3D <&scmi_clk CK_SCMI_GPIOK>; st,bank-name =3D "GPIOK"; status =3D "disabled"; }; @@ -287,7 +290,7 @@ gpioz: gpio@46200000 { interrupt-controller; #interrupt-cells =3D <2>; reg =3D <0 0x400>; - clocks =3D <&ck_icn_ls_mcu>; + clocks =3D <&scmi_clk CK_SCMI_GPIOZ>; st,bank-name =3D "GPIOZ"; st,bank-ioport =3D <11>; status =3D "disabled"; --=20 2.25.1