From nobody Tue Dec 16 12:22:40 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 78FF2C10DC1 for ; Fri, 8 Dec 2023 13:50:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1573847AbjLHNt6 (ORCPT ); Fri, 8 Dec 2023 08:49:58 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36650 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1573812AbjLHNtz (ORCPT ); Fri, 8 Dec 2023 08:49:55 -0500 Received: from helios.alatek.com.pl (helios.alatek.com.pl [85.14.123.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F0BED1986; Fri, 8 Dec 2023 05:50:01 -0800 (PST) Received: from localhost (localhost [127.0.0.1]) by helios.alatek.com.pl (Postfix) with ESMTP id BE3052D00F54; Fri, 8 Dec 2023 14:49:59 +0100 (CET) Received: from helios.alatek.com.pl ([127.0.0.1]) by localhost (helios.alatek.com.pl [127.0.0.1]) (amavis, port 10032) with ESMTP id eCCVI8fAe3PD; Fri, 8 Dec 2023 14:49:59 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by helios.alatek.com.pl (Postfix) with ESMTP id 935302D00F52; Fri, 8 Dec 2023 14:49:57 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.10.3 helios.alatek.com.pl 935302D00F52 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alatek.krakow.pl; s=99EE5E86-D06A-11EC-BE24-DBCCD0A148D3; t=1702043397; bh=2J1S9Zi1hgGr9QnLjCXNZLKTR1OT7hgWrVoPzTgU3fo=; h=From:To:Date:Message-Id:MIME-Version; b=meqXbC49L2+LNgY7RDyOCE0x73UEbUFwYtZQm609vfFpXnHWTSG+in4MDHZ793YZq 3nvhgD5BOMIksZO8vyABq8v00iLeXGBzKlrYtOgKtsDQ/YoWx5Roe8JUFO06uVo5i5 gWoLauyo5OsJIfDqFRGdru1jbbITqnjUwryu3RAS9TQ7U/f0tQaNkd5/1HdpcBlwfn eLe9ZkSyei37nzpc0fXGv7PUfI2hrRLI2V8MdvxJYSqtEFzd9XTIVbK49zCHLzkpG1 8LLCPoywu3VK2gP0gKdBpNk4Ai7EqRcauCEO+nyeDNq3s2x+8Zk0QXp3+YrJUym/op 8ZUZytOO6iJ8A== X-Virus-Scanned: amavis at alatek.com.pl Received: from helios.alatek.com.pl ([127.0.0.1]) by localhost (helios.alatek.com.pl [127.0.0.1]) (amavis, port 10026) with ESMTP id FWkyfP5pdvJN; Fri, 8 Dec 2023 14:49:57 +0100 (CET) Received: from localhost.localdomain (unknown [10.125.125.6]) by helios.alatek.com.pl (Postfix) with ESMTPSA id 0E75D2D00F51; Fri, 8 Dec 2023 14:49:57 +0100 (CET) From: Jan Kuliga To: lizhi.hou@amd.com, brian.xu@amd.com, raj.kumar.rampelli@amd.com, vkoul@kernel.org, michal.simek@amd.com, dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org, miquel.raynal@bootlin.com Cc: jankul@alatek.krakow.pl Subject: [PATCH v4 1/8] dmaengine: xilinx: xdma: Get rid of unused code Date: Fri, 8 Dec 2023 14:49:22 +0100 Message-Id: <20231208134929.49523-2-jankul@alatek.krakow.pl> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231208134838.49500-1-jankul@alatek.krakow.pl> References: <20231208134838.49500-1-jankul@alatek.krakow.pl> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Get rid of duplicated macro definitions, as these macros are defined earlier in the file. Also, get rid of unused member of 'struct xdma_desc'. Signed-off-by: Jan Kuliga --- drivers/dma/xilinx/xdma-regs.h | 12 ------------ drivers/dma/xilinx/xdma.c | 2 -- 2 files changed, 14 deletions(-) diff --git a/drivers/dma/xilinx/xdma-regs.h b/drivers/dma/xilinx/xdma-regs.h index e641a5083e14..0b17a931f583 100644 --- a/drivers/dma/xilinx/xdma-regs.h +++ b/drivers/dma/xilinx/xdma-regs.h @@ -134,18 +134,6 @@ struct xdma_hw_desc { #define XDMA_SGDMA_DESC_ADJ 0x4088 #define XDMA_SGDMA_DESC_CREDIT 0x408c -/* bits of the SG DMA control register */ -#define XDMA_CTRL_RUN_STOP BIT(0) -#define XDMA_CTRL_IE_DESC_STOPPED BIT(1) -#define XDMA_CTRL_IE_DESC_COMPLETED BIT(2) -#define XDMA_CTRL_IE_DESC_ALIGN_MISMATCH BIT(3) -#define XDMA_CTRL_IE_MAGIC_STOPPED BIT(4) -#define XDMA_CTRL_IE_IDLE_STOPPED BIT(6) -#define XDMA_CTRL_IE_READ_ERROR GENMASK(13, 9) -#define XDMA_CTRL_IE_DESC_ERROR GENMASK(23, 19) -#define XDMA_CTRL_NON_INCR_ADDR BIT(25) -#define XDMA_CTRL_POLL_MODE_WB BIT(26) - /* * interrupt registers */ diff --git a/drivers/dma/xilinx/xdma.c b/drivers/dma/xilinx/xdma.c index 290bb5d2d1e2..ddb9e7d07461 100644 --- a/drivers/dma/xilinx/xdma.c +++ b/drivers/dma/xilinx/xdma.c @@ -78,7 +78,6 @@ struct xdma_chan { * @vdesc: Virtual DMA descriptor * @chan: DMA channel pointer * @dir: Transferring direction of the request - * @dev_addr: Physical address on DMA device side * @desc_blocks: Hardware descriptor blocks * @dblk_num: Number of hardware descriptor blocks * @desc_num: Number of hardware descriptors @@ -91,7 +90,6 @@ struct xdma_desc { struct virt_dma_desc vdesc; struct xdma_chan *chan; enum dma_transfer_direction dir; - u64 dev_addr; struct xdma_desc_block *desc_blocks; u32 dblk_num; u32 desc_num; -- 2.34.1 From nobody Tue Dec 16 12:22:40 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DC5E4C4167B for ; Fri, 8 Dec 2023 13:50:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1573851AbjLHNuJ (ORCPT ); Fri, 8 Dec 2023 08:50:09 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37238 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1573812AbjLHNuI (ORCPT ); Fri, 8 Dec 2023 08:50:08 -0500 Received: from helios.alatek.com.pl (helios.alatek.com.pl [85.14.123.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A74881706; Fri, 8 Dec 2023 05:50:14 -0800 (PST) Received: from localhost (localhost [127.0.0.1]) by helios.alatek.com.pl (Postfix) with ESMTP id A8CD42D00F54; Fri, 8 Dec 2023 14:50:12 +0100 (CET) Received: from helios.alatek.com.pl ([127.0.0.1]) by localhost (helios.alatek.com.pl [127.0.0.1]) (amavis, port 10032) with ESMTP id JBQzyMXMEnKr; Fri, 8 Dec 2023 14:50:08 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by helios.alatek.com.pl (Postfix) with ESMTP id 442862D00F53; Fri, 8 Dec 2023 14:50:08 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.10.3 helios.alatek.com.pl 442862D00F53 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alatek.krakow.pl; s=99EE5E86-D06A-11EC-BE24-DBCCD0A148D3; t=1702043408; bh=rjl10Q6vv79c/VjetazpETH5QmjolDY1PkqfCQ5TdI0=; h=From:To:Date:Message-Id:MIME-Version; b=qIfwW8Zq2rMbJovcgbhAbqJJlDriJFOLpZQktxxCg6SlU33Y4GEFA6lZ6nzPS1eCJ ojqsFF8dfRF4O5R0WBzJVP9CO84ZTrOjM+fEHX7v0re+vxN08gmb5OcSOP6HgLqn14 86C0TKpsML47mxm2jQo5YKWx3g1ZMMN9+AoxsYWMM0gHxozJzoqK7OfZD4of/UdY6A rKr0OyxP+aBeFwbyXIqxwMv5OujoUeQ392cXxb6EPd1OfTXbC3HwmBb8dCNxPGANAw ealn4irlEid8mEJPnuz7qQvMVh/PY96hO50I9YgA0x5DNs83xXCVvhHOdX6IHlMedA PR8n5QKqRIYbA== X-Virus-Scanned: amavis at alatek.com.pl Received: from helios.alatek.com.pl ([127.0.0.1]) by localhost (helios.alatek.com.pl [127.0.0.1]) (amavis, port 10026) with ESMTP id ITpTl4yrV2e8; Fri, 8 Dec 2023 14:50:08 +0100 (CET) Received: from localhost.localdomain (unknown [10.125.125.6]) by helios.alatek.com.pl (Postfix) with ESMTPSA id 9C6F42D00F4D; Fri, 8 Dec 2023 14:50:07 +0100 (CET) From: Jan Kuliga To: lizhi.hou@amd.com, brian.xu@amd.com, raj.kumar.rampelli@amd.com, vkoul@kernel.org, michal.simek@amd.com, dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org, miquel.raynal@bootlin.com Cc: jankul@alatek.krakow.pl Subject: [PATCH v4 2/8] dmaengine: xilinx: xdma: Add necessary macro definitions Date: Fri, 8 Dec 2023 14:49:23 +0100 Message-Id: <20231208134929.49523-3-jankul@alatek.krakow.pl> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231208134838.49500-1-jankul@alatek.krakow.pl> References: <20231208134838.49500-1-jankul@alatek.krakow.pl> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Complete lacking bits describing the status/control register values. Add macros describing the status/control registers. Signed-off-by: Jan Kuliga --- drivers/dma/xilinx/xdma-regs.h | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/dma/xilinx/xdma-regs.h b/drivers/dma/xilinx/xdma-regs.h index 0b17a931f583..b12dd60629f6 100644 --- a/drivers/dma/xilinx/xdma-regs.h +++ b/drivers/dma/xilinx/xdma-regs.h @@ -76,6 +76,7 @@ struct xdma_hw_desc { #define XDMA_CHAN_CONTROL_W1S 0x8 #define XDMA_CHAN_CONTROL_W1C 0xc #define XDMA_CHAN_STATUS 0x40 +#define XDMA_CHAN_STATUS_RC 0x44 #define XDMA_CHAN_COMPLETED_DESC 0x48 #define XDMA_CHAN_ALIGNMENTS 0x4c #define XDMA_CHAN_INTR_ENABLE 0x90 @@ -101,6 +102,7 @@ struct xdma_hw_desc { #define CHAN_CTRL_IE_MAGIC_STOPPED BIT(4) #define CHAN_CTRL_IE_IDLE_STOPPED BIT(6) #define CHAN_CTRL_IE_READ_ERROR GENMASK(13, 9) +#define CHAN_CTRL_IE_WRITE_ERROR GENMASK(18, 14) #define CHAN_CTRL_IE_DESC_ERROR GENMASK(23, 19) #define CHAN_CTRL_NON_INCR_ADDR BIT(25) #define CHAN_CTRL_POLL_MODE_WB BIT(26) @@ -111,8 +113,17 @@ struct xdma_hw_desc { CHAN_CTRL_IE_DESC_ALIGN_MISMATCH | \ CHAN_CTRL_IE_MAGIC_STOPPED | \ CHAN_CTRL_IE_READ_ERROR | \ + CHAN_CTRL_IE_WRITE_ERROR | \ CHAN_CTRL_IE_DESC_ERROR) +#define XDMA_CHAN_STATUS_MASK CHAN_CTRL_START + +#define XDMA_CHAN_ERROR_MASK (CHAN_CTRL_IE_DESC_ALIGN_MISMATCH | \ + CHAN_CTRL_IE_MAGIC_STOPPED | \ + CHAN_CTRL_IE_READ_ERROR | \ + CHAN_CTRL_IE_WRITE_ERROR | \ + CHAN_CTRL_IE_DESC_ERROR) + /* bits of the channel interrupt enable mask */ #define CHAN_IM_DESC_ERROR BIT(19) #define CHAN_IM_READ_ERROR BIT(9) -- 2.34.1 From nobody Tue Dec 16 12:22:40 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C1D21C4167B for ; Fri, 8 Dec 2023 13:50:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1573855AbjLHNuO (ORCPT ); Fri, 8 Dec 2023 08:50:14 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50470 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1573848AbjLHNuM (ORCPT ); Fri, 8 Dec 2023 08:50:12 -0500 Received: from helios.alatek.com.pl (helios.alatek.com.pl [85.14.123.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 34CF31732; Fri, 8 Dec 2023 05:50:18 -0800 (PST) Received: from localhost (localhost [127.0.0.1]) by helios.alatek.com.pl (Postfix) with ESMTP id F3B862D00F54; Fri, 8 Dec 2023 14:50:16 +0100 (CET) Received: from helios.alatek.com.pl ([127.0.0.1]) by localhost (helios.alatek.com.pl [127.0.0.1]) (amavis, port 10032) with ESMTP id DLBFkRLwkpfS; Fri, 8 Dec 2023 14:50:15 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by helios.alatek.com.pl (Postfix) with ESMTP id DC8352D00F53; Fri, 8 Dec 2023 14:50:15 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.10.3 helios.alatek.com.pl DC8352D00F53 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alatek.krakow.pl; s=99EE5E86-D06A-11EC-BE24-DBCCD0A148D3; t=1702043415; bh=mcPb4bswnj/lXIxkXo1POfN4/aAJkVGhbaTTroE83nI=; h=From:To:Date:Message-Id:MIME-Version; b=e+rz5+fJm44bC6IIucyl2Jc1VHz3ORzQW/Qlzlx+yNKm3fPoKGFwj7c/0+921syCG 0jP15pzOSMwQZqIlAS2i+up80FpTEwgKjDpBEnZMEJLRgsvmxTjklB2BkoxtH8VDpx qRLKkGpFWx+LM8tEIb4E5ze61IeoH8N/bmNRz81gQz8MbVZ+LryjXpmOTpbToZ6Zqu ym/r6GAON7TXnzV/Usd66a06eMr2IQ86ZBYMEJgSB75N3QPTGyqf7bWqlOVpANgloB DYSmUzyYEPUbjSNTozYZxuur6NHXtASh5yv66A+LdJOor48cIrOiAbb1aFUg019o0P XtknNVaiiHKkw== X-Virus-Scanned: amavis at alatek.com.pl Received: from helios.alatek.com.pl ([127.0.0.1]) by localhost (helios.alatek.com.pl [127.0.0.1]) (amavis, port 10026) with ESMTP id pcZGCCya3Src; Fri, 8 Dec 2023 14:50:15 +0100 (CET) Received: from localhost.localdomain (unknown [10.125.125.6]) by helios.alatek.com.pl (Postfix) with ESMTPSA id 3CCF92D00F4D; Fri, 8 Dec 2023 14:50:15 +0100 (CET) From: Jan Kuliga To: lizhi.hou@amd.com, brian.xu@amd.com, raj.kumar.rampelli@amd.com, vkoul@kernel.org, michal.simek@amd.com, dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org, miquel.raynal@bootlin.com Cc: jankul@alatek.krakow.pl Subject: [PATCH v4 3/8] dmaengine: xilinx: xdma: Ease dma_pool alignment requirements Date: Fri, 8 Dec 2023 14:49:24 +0100 Message-Id: <20231208134929.49523-4-jankul@alatek.krakow.pl> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231208134838.49500-1-jankul@alatek.krakow.pl> References: <20231208134838.49500-1-jankul@alatek.krakow.pl> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" According to the XDMA datasheet (PG195), the address of any descriptor must be 32 byte aligned. The datasheet also states that a contiguous block of descriptors must not cross a 4k address boundary. Therefore, it is possible to ease the pressure put on the dma_pool allocator just by requiring sufficient alignment and boundary values. Add proper macro definition and change the values passed into the dma_pool_create(). Signed-off-by: Jan Kuliga --- drivers/dma/xilinx/xdma-regs.h | 7 ++++--- drivers/dma/xilinx/xdma.c | 6 +++--- 2 files changed, 7 insertions(+), 6 deletions(-) diff --git a/drivers/dma/xilinx/xdma-regs.h b/drivers/dma/xilinx/xdma-regs.h index b12dd60629f6..2a224e3da672 100644 --- a/drivers/dma/xilinx/xdma-regs.h +++ b/drivers/dma/xilinx/xdma-regs.h @@ -64,9 +64,10 @@ struct xdma_hw_desc { __le64 next_desc; }; -#define XDMA_DESC_SIZE sizeof(struct xdma_hw_desc) -#define XDMA_DESC_BLOCK_SIZE (XDMA_DESC_SIZE * XDMA_DESC_ADJACENT) -#define XDMA_DESC_BLOCK_ALIGN 4096 +#define XDMA_DESC_SIZE sizeof(struct xdma_hw_desc) +#define XDMA_DESC_BLOCK_SIZE (XDMA_DESC_SIZE * XDMA_DESC_ADJACENT) +#define XDMA_DESC_BLOCK_ALIGN 32 +#define XDMA_DESC_BLOCK_BOUNDARY 4096 /* * Channel registers diff --git a/drivers/dma/xilinx/xdma.c b/drivers/dma/xilinx/xdma.c index ddb9e7d07461..1bce48e5d86c 100644 --- a/drivers/dma/xilinx/xdma.c +++ b/drivers/dma/xilinx/xdma.c @@ -741,9 +741,9 @@ static int xdma_alloc_chan_resources(struct dma_chan *c= han) return -EINVAL; } - xdma_chan->desc_pool =3D dma_pool_create(dma_chan_name(chan), - dev, XDMA_DESC_BLOCK_SIZE, - XDMA_DESC_BLOCK_ALIGN, 0); + xdma_chan->desc_pool =3D dma_pool_create(dma_chan_name(chan), dev, + XDMA_DESC_BLOCK_SIZE, XDMA_DESC_BLOCK_ALIGN, + XDMA_DESC_BLOCK_BOUNDARY); if (!xdma_chan->desc_pool) { xdma_err(xdev, "unable to allocate descriptor pool"); return -ENOMEM; -- 2.34.1 From nobody Tue Dec 16 12:22:40 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 38643C4167B for ; Fri, 8 Dec 2023 13:50:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1573861AbjLHNuU (ORCPT ); Fri, 8 Dec 2023 08:50:20 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50514 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1573849AbjLHNuS (ORCPT ); Fri, 8 Dec 2023 08:50:18 -0500 Received: from helios.alatek.com.pl (helios.alatek.com.pl [85.14.123.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E86C0198D; Fri, 8 Dec 2023 05:50:24 -0800 (PST) Received: from localhost (localhost [127.0.0.1]) by helios.alatek.com.pl (Postfix) with ESMTP id 062FF2D00F54; Fri, 8 Dec 2023 14:50:23 +0100 (CET) Received: from helios.alatek.com.pl ([127.0.0.1]) by localhost (helios.alatek.com.pl [127.0.0.1]) (amavis, port 10032) with ESMTP id k_HF2D6S06dv; Fri, 8 Dec 2023 14:50:22 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by helios.alatek.com.pl (Postfix) with ESMTP id A8B3E2D00F53; Fri, 8 Dec 2023 14:50:22 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.10.3 helios.alatek.com.pl A8B3E2D00F53 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alatek.krakow.pl; s=99EE5E86-D06A-11EC-BE24-DBCCD0A148D3; t=1702043422; bh=TFnmjLQd7yXXz0FUvRgSBTsyp1BXgYpSk1S5kee4UxI=; h=From:To:Date:Message-Id:MIME-Version; b=atzC66+l8DJ2VM7fkAEiMMz09K3Rvni+JoCCnsWiZAan2akwW7A8dFiI6uqR0iGP5 gJ3mwl5weEHyTTTRNCt6F42dAsZrpvdGdlGRejwk/JO99ywhxZ33hgx847A7327YI9 7PTd7BfbtognPxwuKIVhc29MW4wiFD+Ee+AVt04HHkafbtfcuB+coMV8npHRzIi3sY SHdJoWV2m4o7i+J7MjpFNtP6nQusRsdwISaHcVTt40m2vnHmVb43VRbyHsDiUNXT9R 9uO9jT1QvCvrSTbrmZj7pw7xyaYKA4kh5uxiyS9LFSbZEYT78Ch0cB5lMMta7F90dl Rk2heYUiY8E8g== X-Virus-Scanned: amavis at alatek.com.pl Received: from helios.alatek.com.pl ([127.0.0.1]) by localhost (helios.alatek.com.pl [127.0.0.1]) (amavis, port 10026) with ESMTP id gTBO7jEdy2Ip; Fri, 8 Dec 2023 14:50:22 +0100 (CET) Received: from localhost.localdomain (unknown [10.125.125.6]) by helios.alatek.com.pl (Postfix) with ESMTPSA id 27C512D00F4D; Fri, 8 Dec 2023 14:50:22 +0100 (CET) From: Jan Kuliga To: lizhi.hou@amd.com, brian.xu@amd.com, raj.kumar.rampelli@amd.com, vkoul@kernel.org, michal.simek@amd.com, dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org, miquel.raynal@bootlin.com Cc: jankul@alatek.krakow.pl Subject: [PATCH v4 4/8] dmaengine: xilinx: xdma: Rework xdma_terminate_all() Date: Fri, 8 Dec 2023 14:49:25 +0100 Message-Id: <20231208134929.49523-5-jankul@alatek.krakow.pl> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231208134838.49500-1-jankul@alatek.krakow.pl> References: <20231208134838.49500-1-jankul@alatek.krakow.pl> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Simplify xdma_xfer_stop(). Stop the dma engine and clear its status register unconditionally - just do what its name states. This change also allows to call it without grabbing a lock, which minimizes the total time spent with a spinlock held. Delete the currently processed vd.node from the vc.desc_issued list prior to passing it to vchan_terminate_vdesc(). In case there's more than one descriptor pending on vc.desc_issued list, calling vchan_terminate_desc() results in losing the link between vc.desc_issued list head and the second descriptor on the list. Doing so results in resources leakege, as vchan_dma_desc_free_list() won't be able to properly free memory resources attached to descriptors, resulting in dma_pool_destroy() failure. Don't call vchan_dma_desc_free_list() from within xdma_terminate_all(). Move all terminated descriptors to the vc.desc_terminated list instead. This allows to postpone freeing memory resources associated with descriptors until the call to vchan_synchronize(), which is called from xdma_synchronize() callback. This is the right way to do it - xdma_terminate_all() should return as soon as possible, while freeing resources (that may be time consuming in case of large number of descriptors) can be done safely later. Fixes: 290bb5d2d1e2 ("dmaengine: xilinx: xdma: Add terminate_all/synchronize callbacks") Signed-off-by: Jan Kuliga --- drivers/dma/xilinx/xdma.c | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/drivers/dma/xilinx/xdma.c b/drivers/dma/xilinx/xdma.c index 1bce48e5d86c..521ba2a653b6 100644 --- a/drivers/dma/xilinx/xdma.c +++ b/drivers/dma/xilinx/xdma.c @@ -379,20 +379,20 @@ static int xdma_xfer_start(struct xdma_chan *xchan) */ static int xdma_xfer_stop(struct xdma_chan *xchan) { - struct virt_dma_desc *vd =3D vchan_next_desc(&xchan->vchan); - struct xdma_device *xdev =3D xchan->xdev_hdl; int ret; - - if (!vd || !xchan->busy) - return -EINVAL; + u32 val; + struct xdma_device *xdev =3D xchan->xdev_hdl; /* clear run stop bit to prevent any further auto-triggering */ ret =3D regmap_write(xdev->rmap, xchan->base + XDMA_CHAN_CONTROL_W1C, - CHAN_CTRL_RUN_STOP); + CHAN_CTRL_RUN_STOP); if (ret) return ret; - xchan->busy =3D false; + /* Clear the channel status register */ + ret =3D regmap_read(xdev->rmap, xchan->base + XDMA_CHAN_STATUS_RC, &val); + if (ret) + return ret; return 0; } @@ -505,25 +505,25 @@ static void xdma_issue_pending(struct dma_chan *chan) static int xdma_terminate_all(struct dma_chan *chan) { struct xdma_chan *xdma_chan =3D to_xdma_chan(chan); - struct xdma_desc *desc =3D NULL; struct virt_dma_desc *vd; unsigned long flags; LIST_HEAD(head); - spin_lock_irqsave(&xdma_chan->vchan.lock, flags); xdma_xfer_stop(xdma_chan); + spin_lock_irqsave(&xdma_chan->vchan.lock, flags); + + xdma_chan->busy =3D false; vd =3D vchan_next_desc(&xdma_chan->vchan); - if (vd) - desc =3D to_xdma_desc(vd); - if (desc) { - dma_cookie_complete(&desc->vdesc.tx); - vchan_terminate_vdesc(&desc->vdesc); + if (vd) { + list_del(&vd->node); + dma_cookie_complete(&vd->tx); + vchan_terminate_vdesc(vd); } - vchan_get_all_descriptors(&xdma_chan->vchan, &head); + list_splice_tail(&head, &xdma_chan->vchan.desc_terminated); + spin_unlock_irqrestore(&xdma_chan->vchan.lock, flags); - vchan_dma_desc_free_list(&xdma_chan->vchan, &head); return 0; } -- 2.34.1 From nobody Tue Dec 16 12:22:40 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5D61BC4167B for ; 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Fri, 8 Dec 2023 14:50:29 +0100 (CET) From: Jan Kuliga To: lizhi.hou@amd.com, brian.xu@amd.com, raj.kumar.rampelli@amd.com, vkoul@kernel.org, michal.simek@amd.com, dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org, miquel.raynal@bootlin.com Cc: jankul@alatek.krakow.pl Subject: [PATCH v4 5/8] dmaengine: xilinx: xdma: Add error checking in xdma_channel_isr() Date: Fri, 8 Dec 2023 14:49:26 +0100 Message-Id: <20231208134929.49523-6-jankul@alatek.krakow.pl> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231208134838.49500-1-jankul@alatek.krakow.pl> References: <20231208134838.49500-1-jankul@alatek.krakow.pl> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Check and clear the status register value before proceeding any further in xdma_channel_isr(). It is necessary to do it since the interrupt may occur on any error condition enabled at the start of a transfer. Signed-off-by: Jan Kuliga --- drivers/dma/xilinx/xdma.c | 22 +++++++++++++--------- 1 file changed, 13 insertions(+), 9 deletions(-) diff --git a/drivers/dma/xilinx/xdma.c b/drivers/dma/xilinx/xdma.c index 521ba2a653b6..d1bc36133a45 100644 --- a/drivers/dma/xilinx/xdma.c +++ b/drivers/dma/xilinx/xdma.c @@ -812,21 +812,25 @@ static irqreturn_t xdma_channel_isr(int irq, void *de= v_id) desc =3D to_xdma_desc(vd); xdev =3D xchan->xdev_hdl; + /* Clear-on-read the status register */ + ret =3D regmap_read(xdev->rmap, xchan->base + XDMA_CHAN_STATUS_RC, &st); + if (ret) + goto out; + + st &=3D XDMA_CHAN_STATUS_MASK; + if ((st & XDMA_CHAN_ERROR_MASK) || + !(st & (CHAN_CTRL_IE_DESC_COMPLETED | CHAN_CTRL_IE_DESC_STOPPED))) { + xdma_err(xdev, "channel error, status register value: 0x%x", st); + goto out; + } + ret =3D regmap_read(xdev->rmap, xchan->base + XDMA_CHAN_COMPLETED_DESC, - &complete_desc_num); + &complete_desc_num); if (ret) goto out; if (desc->cyclic) { desc->completed_desc_num =3D complete_desc_num; - - ret =3D regmap_read(xdev->rmap, xchan->base + XDMA_CHAN_STATUS, - &st); - if (ret) - goto out; - - regmap_write(xdev->rmap, xchan->base + XDMA_CHAN_STATUS, st); - vchan_cyclic_callback(vd); } else { xchan->busy =3D false; -- 2.34.1 From nobody Tue Dec 16 12:22:40 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4A6F0C4167B for ; Fri, 8 Dec 2023 13:50:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1573853AbjLHNuf (ORCPT ); Fri, 8 Dec 2023 08:50:35 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38758 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1573849AbjLHNuc (ORCPT ); Fri, 8 Dec 2023 08:50:32 -0500 Received: from helios.alatek.com.pl (helios.alatek.com.pl [85.14.123.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B971A1999; Fri, 8 Dec 2023 05:50:38 -0800 (PST) Received: from localhost (localhost [127.0.0.1]) by helios.alatek.com.pl (Postfix) with ESMTP id C433B2D00F5A; Fri, 8 Dec 2023 14:50:36 +0100 (CET) Received: from helios.alatek.com.pl ([127.0.0.1]) by localhost (helios.alatek.com.pl [127.0.0.1]) (amavis, port 10032) with ESMTP id hqSVR8pG3cOr; Fri, 8 Dec 2023 14:50:36 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by helios.alatek.com.pl (Postfix) with ESMTP id 19D592D00F59; Fri, 8 Dec 2023 14:50:36 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.10.3 helios.alatek.com.pl 19D592D00F59 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alatek.krakow.pl; s=99EE5E86-D06A-11EC-BE24-DBCCD0A148D3; t=1702043436; bh=TMsFFW9LzdDRNPZFkyLMJwFepjeLKvLoxofQXIKnXR8=; h=From:To:Date:Message-Id:MIME-Version; b=SMP6CR80fV67YC8RPgEkPpmIdHULiZBfL5bObh8es1TpK7E34SUBsV/vEjKGE+6e6 /CSHWrUl/XPEGhLkPlxLwtybtSwMEQ3bPo2A8X1Cd8qGPl+1pcz4lN0XbLfM1P48qk vZ3Ok12BW+qUPgirrmnPxHJSKwUhF1IDRRIQM+iLHIqyH6KW1ZrB/QcJsrPc3Z3tFD N5tH1ANpUilSw9vzeim6hDbYHmJPY0cksa7qKJqAj/Fw9l+uSzgl+feSx0CdFY84Fp Kxqf9Itwp1fG6OjC5M7le/WZI49oTSQ6GI5/0DBlmJfmMHH1IGFEkqleK88cyt2g3b olrcsbgJ3SvUw== X-Virus-Scanned: amavis at alatek.com.pl Received: from helios.alatek.com.pl ([127.0.0.1]) by localhost (helios.alatek.com.pl [127.0.0.1]) (amavis, port 10026) with ESMTP id 6O4CwPUEph3Z; Fri, 8 Dec 2023 14:50:36 +0100 (CET) Received: from localhost.localdomain (unknown [10.125.125.6]) by helios.alatek.com.pl (Postfix) with ESMTPSA id 809032D00F4D; Fri, 8 Dec 2023 14:50:35 +0100 (CET) From: Jan Kuliga To: lizhi.hou@amd.com, brian.xu@amd.com, raj.kumar.rampelli@amd.com, vkoul@kernel.org, michal.simek@amd.com, dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org, miquel.raynal@bootlin.com Cc: jankul@alatek.krakow.pl Subject: [PATCH v4 6/8] dmaengine: xilinx: xdma: Add transfer error reporting Date: Fri, 8 Dec 2023 14:49:27 +0100 Message-Id: <20231208134929.49523-7-jankul@alatek.krakow.pl> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231208134838.49500-1-jankul@alatek.krakow.pl> References: <20231208134838.49500-1-jankul@alatek.krakow.pl> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Extend the capability of transfer status reporting. Introduce error flag, which allows to report error in case of a interrupt-reported error condition. Signed-off-by: Jan Kuliga --- drivers/dma/xilinx/xdma.c | 27 ++++++++++++++++----------- 1 file changed, 16 insertions(+), 11 deletions(-) diff --git a/drivers/dma/xilinx/xdma.c b/drivers/dma/xilinx/xdma.c index d1bc36133a45..dbde6905acc7 100644 --- a/drivers/dma/xilinx/xdma.c +++ b/drivers/dma/xilinx/xdma.c @@ -85,6 +85,7 @@ struct xdma_chan { * @cyclic: Cyclic transfer vs. scatter-gather * @periods: Number of periods in the cyclic transfer * @period_size: Size of a period in bytes in cyclic transfers + * @error: tx error flag */ struct xdma_desc { struct virt_dma_desc vdesc; @@ -97,6 +98,7 @@ struct xdma_desc { bool cyclic; u32 periods; u32 period_size; + bool error; }; #define XDMA_DEV_STATUS_REG_DMA BIT(0) @@ -274,6 +276,7 @@ xdma_alloc_desc(struct xdma_chan *chan, u32 desc_num, b= ool cyclic) sw_desc->chan =3D chan; sw_desc->desc_num =3D desc_num; sw_desc->cyclic =3D cyclic; + sw_desc->error =3D false; dblk_num =3D DIV_ROUND_UP(desc_num, XDMA_DESC_ADJACENT); sw_desc->desc_blocks =3D kcalloc(dblk_num, sizeof(*sw_desc->desc_blocks), GFP_NOWAIT); @@ -770,20 +773,20 @@ static enum dma_status xdma_tx_status(struct dma_chan= *chan, dma_cookie_t cookie spin_lock_irqsave(&xdma_chan->vchan.lock, flags); vd =3D vchan_find_desc(&xdma_chan->vchan, cookie); - if (vd) - desc =3D to_xdma_desc(vd); - if (!desc || !desc->cyclic) { - spin_unlock_irqrestore(&xdma_chan->vchan.lock, flags); - return ret; - } - - period_idx =3D desc->completed_desc_num % desc->periods; - residue =3D (desc->periods - period_idx) * desc->period_size; + if (!vd) + goto out; + desc =3D to_xdma_desc(vd); + if (desc->error) { + ret =3D DMA_ERROR; + } else if (desc->cyclic) { + period_idx =3D desc->completed_desc_num % desc->periods; + residue =3D (desc->periods - period_idx) * desc->period_size; + dma_set_residue(state, residue); + } +out: spin_unlock_irqrestore(&xdma_chan->vchan.lock, flags); - dma_set_residue(state, residue); - return ret; } @@ -808,6 +811,7 @@ static irqreturn_t xdma_channel_isr(int irq, void *dev_= id) vd =3D vchan_next_desc(&xchan->vchan); if (!vd) goto out; + desc =3D to_xdma_desc(vd); desc =3D to_xdma_desc(vd); xdev =3D xchan->xdev_hdl; @@ -820,6 +824,7 @@ static irqreturn_t xdma_channel_isr(int irq, void *dev_= id) st &=3D XDMA_CHAN_STATUS_MASK; if ((st & XDMA_CHAN_ERROR_MASK) || !(st & (CHAN_CTRL_IE_DESC_COMPLETED | CHAN_CTRL_IE_DESC_STOPPED))) { + desc->error =3D true; xdma_err(xdev, "channel error, status register value: 0x%x", st); goto out; } -- 2.34.1 From nobody Tue Dec 16 12:22:40 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 19DBCC4167B for ; Fri, 8 Dec 2023 13:50:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1573884AbjLHNuk (ORCPT ); Fri, 8 Dec 2023 08:50:40 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38834 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1573876AbjLHNui (ORCPT ); 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Fri, 8 Dec 2023 14:50:41 +0100 (CET) Received: from localhost.localdomain (unknown [10.125.125.6]) by helios.alatek.com.pl (Postfix) with ESMTPSA id ACD152D00F4D; Fri, 8 Dec 2023 14:50:40 +0100 (CET) From: Jan Kuliga To: lizhi.hou@amd.com, brian.xu@amd.com, raj.kumar.rampelli@amd.com, vkoul@kernel.org, michal.simek@amd.com, dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org, miquel.raynal@bootlin.com Cc: jankul@alatek.krakow.pl Subject: [PATCH v4 7/8] dmaengine: xilinx: xdma: Prepare the introduction of interleaved DMA transfers Date: Fri, 8 Dec 2023 14:49:28 +0100 Message-Id: <20231208134929.49523-8-jankul@alatek.krakow.pl> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231208134838.49500-1-jankul@alatek.krakow.pl> References: <20231208134838.49500-1-jankul@alatek.krakow.pl> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Make generic code generic. As descriptor-filling logic stays the same regardless of a dmaengine's type of transfer, it is possible to write the descriptor-filling function in a generic way, so that it can be used for every single type of transfer preparation callback. Signed-off-by: Jan Kuliga --- drivers/dma/xilinx/xdma.c | 101 +++++++++++++++++++++----------------- 1 file changed, 57 insertions(+), 44 deletions(-) diff --git a/drivers/dma/xilinx/xdma.c b/drivers/dma/xilinx/xdma.c index dbde6905acc7..c8ac047249bc 100644 --- a/drivers/dma/xilinx/xdma.c +++ b/drivers/dma/xilinx/xdma.c @@ -542,6 +542,43 @@ static void xdma_synchronize(struct dma_chan *chan) vchan_synchronize(&xdma_chan->vchan); } +/** + * xdma_fill_descs - Fill hardware descriptors with contiguous memory bloc= k addresses + * @sw_desc - tx descriptor state container + * @src_addr - Value for a ->src_addr field of a first descriptor + * @dst_addr - Value for a ->dst_addr field of a first descriptor + * @size - Total size of a contiguous memory block + * @filled_descs_num - Number of filled hardware descriptors for correspon= ding sw_desc + */ +static inline u32 xdma_fill_descs(struct xdma_desc *sw_desc, u64 src_addr, + u64 dst_addr, u32 size, u32 filled_descs_num) +{ + u32 left =3D size, len, desc_num =3D filled_descs_num; + struct xdma_desc_block *dblk; + struct xdma_hw_desc *desc; + + dblk =3D sw_desc->desc_blocks + (desc_num / XDMA_DESC_ADJACENT); + desc =3D dblk->virt_addr; + desc +=3D desc_num & XDMA_DESC_ADJACENT_MASK; + do { + len =3D min_t(u32, left, XDMA_DESC_BLEN_MAX); + /* set hardware descriptor */ + desc->bytes =3D cpu_to_le32(len); + desc->src_addr =3D cpu_to_le64(src_addr); + desc->dst_addr =3D cpu_to_le64(dst_addr); + if (!(++desc_num & XDMA_DESC_ADJACENT_MASK)) + desc =3D (++dblk)->virt_addr; + else + desc++; + + src_addr +=3D len; + dst_addr +=3D len; + left -=3D len; + } while (left); + + return desc_num - filled_descs_num; +} + /** * xdma_prep_device_sg - prepare a descriptor for a DMA transaction * @chan: DMA channel pointer @@ -558,13 +595,10 @@ xdma_prep_device_sg(struct dma_chan *chan, struct sca= tterlist *sgl, { struct xdma_chan *xdma_chan =3D to_xdma_chan(chan); struct dma_async_tx_descriptor *tx_desc; - u32 desc_num =3D 0, i, len, rest; - struct xdma_desc_block *dblk; - struct xdma_hw_desc *desc; struct xdma_desc *sw_desc; - u64 dev_addr, *src, *dst; + u32 desc_num =3D 0, i; + u64 addr, dev_addr, *src, *dst; struct scatterlist *sg; - u64 addr; for_each_sg(sgl, sg, sg_len, i) desc_num +=3D DIV_ROUND_UP(sg_dma_len(sg), XDMA_DESC_BLEN_MAX); @@ -584,32 +618,11 @@ xdma_prep_device_sg(struct dma_chan *chan, struct sca= tterlist *sgl, dst =3D &addr; } - dblk =3D sw_desc->desc_blocks; - desc =3D dblk->virt_addr; - desc_num =3D 1; + desc_num =3D 0; for_each_sg(sgl, sg, sg_len, i) { addr =3D sg_dma_address(sg); - rest =3D sg_dma_len(sg); - - do { - len =3D min_t(u32, rest, XDMA_DESC_BLEN_MAX); - /* set hardware descriptor */ - desc->bytes =3D cpu_to_le32(len); - desc->src_addr =3D cpu_to_le64(*src); - desc->dst_addr =3D cpu_to_le64(*dst); - - if (!(desc_num & XDMA_DESC_ADJACENT_MASK)) { - dblk++; - desc =3D dblk->virt_addr; - } else { - desc++; - } - - desc_num++; - dev_addr +=3D len; - addr +=3D len; - rest -=3D len; - } while (rest); + desc_num +=3D xdma_fill_descs(sw_desc, *src, *dst, sg_dma_len(sg), desc_= num); + dev_addr +=3D sg_dma_len(sg); } tx_desc =3D vchan_tx_prep(&xdma_chan->vchan, &sw_desc->vdesc, flags); @@ -643,9 +656,9 @@ xdma_prep_dma_cyclic(struct dma_chan *chan, dma_addr_t = address, struct xdma_device *xdev =3D xdma_chan->xdev_hdl; unsigned int periods =3D size / period_size; struct dma_async_tx_descriptor *tx_desc; - struct xdma_desc_block *dblk; - struct xdma_hw_desc *desc; struct xdma_desc *sw_desc; + u64 addr, dev_addr, *src, *dst; + u32 desc_num; unsigned int i; /* @@ -670,21 +683,21 @@ xdma_prep_dma_cyclic(struct dma_chan *chan, dma_addr_= t address, sw_desc->period_size =3D period_size; sw_desc->dir =3D dir; - dblk =3D sw_desc->desc_blocks; - desc =3D dblk->virt_addr; + addr =3D address; + if (dir =3D=3D DMA_MEM_TO_DEV) { + dev_addr =3D xdma_chan->cfg.dst_addr; + src =3D &addr; + dst =3D &dev_addr; + } else { + dev_addr =3D xdma_chan->cfg.src_addr; + src =3D &dev_addr; + dst =3D &addr; + } - /* fill hardware descriptor */ + desc_num =3D 0; for (i =3D 0; i < periods; i++) { - desc->bytes =3D cpu_to_le32(period_size); - if (dir =3D=3D DMA_MEM_TO_DEV) { - desc->src_addr =3D cpu_to_le64(address + i * period_size); - desc->dst_addr =3D cpu_to_le64(xdma_chan->cfg.dst_addr); - } else { - desc->src_addr =3D cpu_to_le64(xdma_chan->cfg.src_addr); - desc->dst_addr =3D cpu_to_le64(address + i * period_size); - } - - desc++; + desc_num +=3D xdma_fill_descs(sw_desc, *src, *dst, period_size, desc_num= ); + addr +=3D i * period_size; } tx_desc =3D vchan_tx_prep(&xdma_chan->vchan, &sw_desc->vdesc, flags); -- 2.34.1 From nobody Tue Dec 16 12:22:40 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9C065C4167B for ; Fri, 8 Dec 2023 13:50:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1573908AbjLHNuu (ORCPT ); Fri, 8 Dec 2023 08:50:50 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54136 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1573903AbjLHNuo (ORCPT ); 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Fri, 8 Dec 2023 14:50:47 +0100 (CET) Received: from localhost.localdomain (unknown [10.125.125.6]) by helios.alatek.com.pl (Postfix) with ESMTPSA id 16DAB2D00F5B; Fri, 8 Dec 2023 14:50:47 +0100 (CET) From: Jan Kuliga To: lizhi.hou@amd.com, brian.xu@amd.com, raj.kumar.rampelli@amd.com, vkoul@kernel.org, michal.simek@amd.com, dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org, miquel.raynal@bootlin.com Cc: jankul@alatek.krakow.pl Subject: [PATCH v4 8/8] dmaengine: xilinx: xdma: Introduce interleaved DMA transfers Date: Fri, 8 Dec 2023 14:49:29 +0100 Message-Id: <20231208134929.49523-9-jankul@alatek.krakow.pl> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231208134838.49500-1-jankul@alatek.krakow.pl> References: <20231208134838.49500-1-jankul@alatek.krakow.pl> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Interleaved DMA functionality allows dmaengine clients' to express DMA transfers in an arbitrary way. This is extremely useful in FPGA environments, where a greater transfer flexibility is needed. For instance, in one FPGA design there may be need to do DMA to/from a FIFO (at a fixed address) and also to do DMA to/from a (non)contiguous RAM memory. Introduce separate tx preparation callback and add tx-flags handling logic. Their behavior is based on the description of interleaved DMA transfers in both source code and the DMAEngine's documentation. Since XDMA is a fully-fledged scatter-gather dma engine, the logic of xdma_prep_interleaved_dma() is fairly simple and similar to the other tx preparation callbacks. The whole tx-flags handling logic resides in xdma_channel_isr(). Transfer of a single frame from a interleaved DMA transfer template is pretty similar to the single sg transaction. Therefore, the transaction of the whole interleaved DMA transfer template is basically a cyclic dma transaction with finite cycles/periods (equal to the frame of count) of a single sg transfers. Signed-off-by: Jan Kuliga --- drivers/dma/xilinx/xdma.c | 103 ++++++++++++++++++++++++++++++++++---- 1 file changed, 94 insertions(+), 9 deletions(-) diff --git a/drivers/dma/xilinx/xdma.c b/drivers/dma/xilinx/xdma.c index c8ac047249bc..c7d4def4124b 100644 --- a/drivers/dma/xilinx/xdma.c +++ b/drivers/dma/xilinx/xdma.c @@ -83,8 +83,10 @@ struct xdma_chan { * @desc_num: Number of hardware descriptors * @completed_desc_num: Completed hardware descriptors * @cyclic: Cyclic transfer vs. scatter-gather + * @interleaved_dma: Interleaved DMA transfer * @periods: Number of periods in the cyclic transfer * @period_size: Size of a period in bytes in cyclic transfers + * @frames_left: Number of frames left in interleaved DMA transfer * @error: tx error flag */ struct xdma_desc { @@ -96,8 +98,10 @@ struct xdma_desc { u32 desc_num; u32 completed_desc_num; bool cyclic; + bool interleaved_dma; u32 periods; u32 period_size; + u32 frames_left; bool error; }; @@ -607,6 +611,7 @@ xdma_prep_device_sg(struct dma_chan *chan, struct scatt= erlist *sgl, if (!sw_desc) return NULL; sw_desc->dir =3D dir; + sw_desc->cyclic =3D sw_desc->interleaved_dma =3D false; if (dir =3D=3D DMA_MEM_TO_DEV) { dev_addr =3D xdma_chan->cfg.dst_addr; @@ -682,6 +687,7 @@ xdma_prep_dma_cyclic(struct dma_chan *chan, dma_addr_t = address, sw_desc->periods =3D periods; sw_desc->period_size =3D period_size; sw_desc->dir =3D dir; + sw_desc->interleaved_dma =3D false; addr =3D address; if (dir =3D=3D DMA_MEM_TO_DEV) { @@ -712,6 +718,54 @@ xdma_prep_dma_cyclic(struct dma_chan *chan, dma_addr_t= address, return NULL; } +/** + * xdma_prep_interleaved_dma - Prepare virtual descriptor for interleaved = DMA transfers + * @chan: DMA channel + * @xt: DMA transfer template + * @flags: tx flags + */ +struct dma_async_tx_descriptor * +xdma_prep_interleaved_dma(struct dma_chan *chan, + struct dma_interleaved_template *xt, + unsigned long flags) +{ + int i; + u32 desc_num =3D 0, period_size =3D 0; + struct dma_async_tx_descriptor *tx_desc; + struct xdma_chan *xchan =3D to_xdma_chan(chan); + struct xdma_desc *sw_desc; + u64 src_addr, dst_addr; + + for (i =3D 0; i < xt->frame_size; ++i) + desc_num +=3D DIV_ROUND_UP(xt->sgl[i].size, XDMA_DESC_BLEN_MAX); + + sw_desc =3D xdma_alloc_desc(xchan, desc_num, false); + if (!sw_desc) + return NULL; + sw_desc->dir =3D xt->dir; + sw_desc->interleaved_dma =3D true; + sw_desc->cyclic =3D flags & DMA_PREP_REPEAT; + sw_desc->frames_left =3D sw_desc->periods =3D xt->numf; + + desc_num =3D 0; + src_addr =3D xt->src_start; + dst_addr =3D xt->dst_start; + for (i =3D 0; i < xt->frame_size; ++i) { + desc_num +=3D xdma_fill_descs(sw_desc, src_addr, dst_addr, xt->sgl[i].si= ze, desc_num); + src_addr +=3D dmaengine_get_src_icg(xt, &xt->sgl[i]) + xt->src_inc ? xt-= >sgl[i].size : 0; + dst_addr +=3D dmaengine_get_dst_icg(xt, &xt->sgl[i]) + xt->dst_inc ? xt-= >sgl[i].size : 0; + period_size +=3D xt->sgl[i].size; + } + sw_desc->period_size =3D period_size; + + tx_desc =3D vchan_tx_prep(&xchan->vchan, &sw_desc->vdesc, flags); + if (tx_desc) + return tx_desc; + + xdma_free_desc(&sw_desc->vdesc); + return NULL; +} + /** * xdma_device_config - Configure the DMA channel * @chan: DMA channel @@ -812,11 +866,12 @@ static irqreturn_t xdma_channel_isr(int irq, void *de= v_id) { struct xdma_chan *xchan =3D dev_id; u32 complete_desc_num =3D 0; - struct xdma_device *xdev; - struct virt_dma_desc *vd; + struct xdma_device *xdev =3D xchan->xdev_hdl; + struct virt_dma_desc *vd, *next_vd; struct xdma_desc *desc; int ret; u32 st; + bool repeat_tx; spin_lock(&xchan->vchan.lock); @@ -826,9 +881,6 @@ static irqreturn_t xdma_channel_isr(int irq, void *dev_= id) goto out; desc =3D to_xdma_desc(vd); - desc =3D to_xdma_desc(vd); - xdev =3D xchan->xdev_hdl; - /* Clear-on-read the status register */ ret =3D regmap_read(xdev->rmap, xchan->base + XDMA_CHAN_STATUS_RC, &st); if (ret) @@ -847,10 +899,36 @@ static irqreturn_t xdma_channel_isr(int irq, void *de= v_id) if (ret) goto out; - if (desc->cyclic) { - desc->completed_desc_num =3D complete_desc_num; - vchan_cyclic_callback(vd); - } else { + desc =3D to_xdma_desc(vd); + if (desc->interleaved_dma) { + xchan->busy =3D false; + desc->completed_desc_num +=3D complete_desc_num; + if (complete_desc_num =3D=3D XDMA_DESC_BLOCK_NUM * XDMA_DESC_ADJACENT) { + xdma_xfer_start(xchan); + goto out; + } + + /* last desc of any frame */ + desc->frames_left--; + if (desc->frames_left) + goto out; + + /* last desc of the last frame */ + repeat_tx =3D vd->tx.flags & DMA_PREP_REPEAT; + next_vd =3D list_first_entry_or_null(&vd->node, struct virt_dma_desc, no= de); + if (next_vd) + repeat_tx =3D repeat_tx && !(next_vd->tx.flags & DMA_PREP_LOAD_EOT); + if (repeat_tx) { + desc->frames_left =3D desc->periods; + desc->completed_desc_num =3D 0; + vchan_cyclic_callback(vd); + } else { + list_del(&vd->node); + vchan_cookie_complete(vd); + } + /* start (or continue) the tx of a first desc on the vc.desc_issued list= , if any */ + xdma_xfer_start(xchan); + } else if (!desc->cyclic) { xchan->busy =3D false; desc->completed_desc_num +=3D complete_desc_num; @@ -867,6 +945,9 @@ static irqreturn_t xdma_channel_isr(int irq, void *dev_= id) /* transfer the rest of data */ xdma_xfer_start(xchan); + } else { + desc->completed_desc_num =3D complete_desc_num; + vchan_cyclic_callback(vd); } out: @@ -1165,6 +1246,9 @@ static int xdma_probe(struct platform_device *pdev) dma_cap_set(DMA_SLAVE, xdev->dma_dev.cap_mask); dma_cap_set(DMA_PRIVATE, xdev->dma_dev.cap_mask); dma_cap_set(DMA_CYCLIC, xdev->dma_dev.cap_mask); + dma_cap_set(DMA_INTERLEAVE, xdev->dma_dev.cap_mask); + dma_cap_set(DMA_REPEAT, xdev->dma_dev.cap_mask); + dma_cap_set(DMA_LOAD_EOT, xdev->dma_dev.cap_mask); xdev->dma_dev.dev =3D &pdev->dev; xdev->dma_dev.residue_granularity =3D DMA_RESIDUE_GRANULARITY_SEGMENT; @@ -1180,6 +1264,7 @@ static int xdma_probe(struct platform_device *pdev) xdev->dma_dev.filter.mapcnt =3D pdata->device_map_cnt; xdev->dma_dev.filter.fn =3D xdma_filter_fn; xdev->dma_dev.device_prep_dma_cyclic =3D xdma_prep_dma_cyclic; + xdev->dma_dev.device_prep_interleaved_dma =3D xdma_prep_interleaved_dma; ret =3D dma_async_device_register(&xdev->dma_dev); if (ret) { -- 2.34.1