From nobody Fri Dec 19 09:29:33 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C17E8C4167B for ; Thu, 7 Dec 2023 08:18:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1378160AbjLGISP (ORCPT ); Thu, 7 Dec 2023 03:18:15 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36912 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1377935AbjLGISL (ORCPT ); Thu, 7 Dec 2023 03:18:11 -0500 Received: from mail-pl1-x632.google.com (mail-pl1-x632.google.com [IPv6:2607:f8b0:4864:20::632]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0E986DD for ; Thu, 7 Dec 2023 00:18:18 -0800 (PST) Received: by mail-pl1-x632.google.com with SMTP id d9443c01a7336-1d06d42a58aso5577895ad.0 for ; Thu, 07 Dec 2023 00:18:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1701937097; x=1702541897; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ZQJWnhNLnP6Awp7NjFB9t/P5znClGB7Yq+APmm7pGdg=; b=LjBLuoAPssi8cIJ+gHtc/QTgghFzaPFPz/1C1dFBW5qOcwglHbr6kTRwkOitD8g9Qt cBZccDzwhfyPjGw6wkpE9/A1Y9U8L5A8+BwhrCBjime8mhmoWKrs/jjEwQWraijPmEBi QPzMSgWG4eFx3bnCXI2YRJT2fArLKrxU0wLas= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1701937097; x=1702541897; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ZQJWnhNLnP6Awp7NjFB9t/P5znClGB7Yq+APmm7pGdg=; b=FMP3NT8ftGHwdgYN9nN3fCxkVPwZf/MhVyWkc/f4+/dhNQuK7MUxbBKCUFsJsry82l 9G5P9U8TDDB6bR12Pb+cWwvHAiYOO6UF2SkyrqQj8Jkk0yttdiK1ZBDZ43dfGkWVsNkp t4cErjXIaPlW/krYsLP39RPIivSo+wnidfuQnEG6y63JuV+lULRIByOGBvlfrLusu44e ZLujGJbzhT0zsEjZWnn+1n8CzD9NgLNJuVAwmVvA9vJByq8MUSYCoict9XdUnieIOtPP liN+erBQ9CHrKIjiDE48jt5Ucmb0plFSmtqSHwwmXMXftuibyO1UZ8Eq/p6G+3E6ac8I xiiw== X-Gm-Message-State: AOJu0YzkgrWZsinbf8nYNbEIqSSytGwHIwvAg9mQFsQaSW55joAf09kG kQ1TcTxEbWZHA0jn8DLR53pOJw== X-Google-Smtp-Source: AGHT+IGgqFxlIC4wu2oAnuqzZtdbL46HAt+drIAs9tIBCh2pssTSR+uBR95ax8mNq1iftLTEdDOpDQ== X-Received: by 2002:a17:902:dac5:b0:1d1:d939:159 with SMTP id q5-20020a170902dac500b001d1d9390159mr1890437plx.21.1701937097547; Thu, 07 Dec 2023 00:18:17 -0800 (PST) Received: from treapking.tpe.corp.google.com ([2401:fa00:1:10:663f:6f8e:5f2d:e06c]) by smtp.gmail.com with ESMTPSA id t23-20020a1709028c9700b001d09c5424d4sm748128plo.297.2023.12.07.00.18.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Dec 2023 00:18:17 -0800 (PST) From: Pin-yen Lin To: Douglas Anderson , Neil Armstrong , Jessica Zhang , Sam Ravnborg , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter Cc: linux-kernel@vger.kernel.org, Guenter Roeck , dri-devel@lists.freedesktop.org, Pin-yen Lin Subject: [PATCH v2 2/4] drm/panel-edp: Add powered_on_to_enable delay Date: Thu, 7 Dec 2023 16:17:36 +0800 Message-ID: <20231207081801.4049075-3-treapking@chromium.org> X-Mailer: git-send-email 2.43.0.472.g3155946c3a-goog In-Reply-To: <20231207081801.4049075-1-treapking@chromium.org> References: <20231207081801.4049075-1-treapking@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add the support of powered_on_to_enable delay as the minimum time that needs to have passed between the panel powered on and enable may begin. This delay is seen in BOE panels as the minimum delay of T3+T4+T5+T6+T8 in the eDP timing diagrams. Signed-off-by: Pin-yen Lin Reviewed-by: Douglas Anderson --- (no changes since v1) drivers/gpu/drm/panel/panel-edp.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-edp.c b/drivers/gpu/drm/panel/pane= l-edp.c index a0b6f69b916f..44acf9cacaf7 100644 --- a/drivers/gpu/drm/panel/panel-edp.c +++ b/drivers/gpu/drm/panel/panel-edp.c @@ -70,6 +70,21 @@ struct panel_delay { */ unsigned int hpd_absent; =20 + /** + * @powered_on_to_enable: Time between panel powered on and enable. + * + * The minimum time, in milliseconds, that needs to have passed + * between when panel powered on and enable may begin. + * + * This is (T3+T4+T5+T6+T8)-min on eDP timing diagrams or after the + * power supply enabled until we can turn the backlight on and see + * valid data. + * + * This doesn't normally need to be set if timings are already met by + * prepare_to_enable or enable. + */ + unsigned int powered_on_to_enable; + /** * @prepare_to_enable: Time between prepare and enable. * @@ -216,6 +231,7 @@ struct panel_edp { bool prepared; =20 ktime_t prepared_time; + ktime_t powered_on_time; ktime_t unprepared_time; =20 const struct panel_desc *desc; @@ -455,6 +471,8 @@ static int panel_edp_prepare_once(struct panel_edp *p) =20 gpiod_set_value_cansleep(p->enable_gpio, 1); =20 + p->powered_on_time =3D ktime_get_boottime(); + delay =3D p->desc->delay.hpd_reliable; if (p->no_hpd) delay =3D max(delay, p->desc->delay.hpd_absent); @@ -579,6 +597,8 @@ static int panel_edp_enable(struct drm_panel *panel) =20 panel_edp_wait(p->prepared_time, p->desc->delay.prepare_to_enable); =20 + panel_edp_wait(p->powered_on_time, p->desc->delay.powered_on_to_enable); + p->enabled =3D true; =20 return 0; --=20 2.43.0.472.g3155946c3a-goog