From nobody Fri Sep 20 09:43:40 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D76DDC4167B for ; Thu, 7 Dec 2023 06:35:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1377514AbjLGGfp (ORCPT ); Thu, 7 Dec 2023 01:35:45 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55362 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229558AbjLGGfl (ORCPT ); Thu, 7 Dec 2023 01:35:41 -0500 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BFB6BD5C; Wed, 6 Dec 2023 22:35:46 -0800 (PST) X-UUID: d78aa7c494ca11eea5db2bebc7c28f94-20231207 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=RCJcyyZ8EMNjvJVmY4Ygro4ZBJTkkM+cPjU66561fik=; b=UTxcd1kGvh7vpHDIFyBSoCNlyxzPxfKVeJABcH6/JMM/jSqvAACF6uWEv+CPcCB5ELDqzcXrHuZ4DBtBL73H3eRBEiANJzHcjetxCgSQ71SXEgAXSD7PevKgJPz9vyiBjUkKV35yPUHvxfWAcyrjOmYc9x5rwoKJhYjQboSTPx0=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.35,REQID:75c26b02-0d96-40b9-905a-b4360918fcb8,IP:0,U RL:0,TC:0,Content:-5,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:-5 X-CID-META: VersionHash:5d391d7,CLOUDID:951c8273-1bd3-4f48-b671-ada88705968c,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1,SPR:NO, DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: d78aa7c494ca11eea5db2bebc7c28f94-20231207 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1965852317; Thu, 07 Dec 2023 14:35:41 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs11n2.mediatek.inc (172.21.101.187) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Thu, 7 Dec 2023 14:35:40 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Thu, 7 Dec 2023 14:35:39 +0800 From: Axe Yang To: Chaotian Jing , Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Wenbin Mei CC: , , , , , , Axe Yang , Krzysztof Kozlowski Subject: [PATCH v4 1/2] dt-bindings: mmc: mtk-sd: add tuning steps related property Date: Thu, 7 Dec 2023 14:35:34 +0800 Message-ID: <20231207063535.29546-2-axe.yang@mediatek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231207063535.29546-1-axe.yang@mediatek.com> References: <20231207063535.29546-1-axe.yang@mediatek.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add 'mediatek,tuning-steps' setting. This property will give MSDC a chance to extend tuning steps up to 64. With more tuning steps, MSDC may achieve a more optimal calibration result, thus avoiding potential CRC issues. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Axe Yang Reviewed-by: AngeloGioacchino Del Regno --- Documentation/devicetree/bindings/mmc/mtk-sd.yaml | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml b/Documentat= ion/devicetree/bindings/mmc/mtk-sd.yaml index 3fffa467e4e1..c532ec92d2d9 100644 --- a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml @@ -145,6 +145,15 @@ properties: minimum: 0 maximum: 7 =20 + mediatek,tuning-step: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Some SoCs need extend tuning step for better delay value to avoid CR= C issue. + If not present, default tuning step is 32. For eMMC and SD, this can= yield + satisfactory calibration results in most cases. + enum: [32, 64] + default: 32 + resets: maxItems: 1 =20 --=20 2.18.0