From nobody Fri Dec 19 07:49:08 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AEA55C4167B for ; Wed, 6 Dec 2023 10:59:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1377966AbjLFK7U (ORCPT ); Wed, 6 Dec 2023 05:59:20 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49782 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1377894AbjLFK7D (ORCPT ); Wed, 6 Dec 2023 05:59:03 -0500 Received: from fd01.gateway.ufhost.com (fd01.gateway.ufhost.com [61.152.239.71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3EB59135; Wed, 6 Dec 2023 02:58:54 -0800 (PST) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by fd01.gateway.ufhost.com (Postfix) with ESMTP id 9D4DE80A7; Wed, 6 Dec 2023 18:58:48 +0800 (CST) Received: from EXMBX171.cuchost.com (172.16.6.91) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Wed, 6 Dec 2023 18:58:48 +0800 Received: from ubuntu.localdomain (183.27.97.199) by EXMBX171.cuchost.com (172.16.6.91) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Wed, 6 Dec 2023 18:58:47 +0800 From: Minda Chen To: Conor Dooley , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , Lorenzo Pieralisi , "Daire McNamara" , Emil Renner Berthing , Krzysztof Kozlowski CC: , , , , Paul Walmsley , Palmer Dabbelt , Albert Ou , Philipp Zabel , Mason Huo , Leyfoon Tan , Kevin Xie , Minda Chen Subject: [PATCH v12 07/21] PCI: microchip: Rename two setup functions Date: Wed, 6 Dec 2023 18:58:25 +0800 Message-ID: <20231206105839.25805-8-minda.chen@starfivetech.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20231206105839.25805-1-minda.chen@starfivetech.com> References: <20231206105839.25805-1-minda.chen@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [183.27.97.199] X-ClientProxiedBy: EXCAS062.cuchost.com (172.16.6.22) To EXMBX171.cuchost.com (172.16.6.91) X-YovoleRuleAgent: yovoleflag Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Rename two setup functions to plda prefix. Prepare to re-use these two setup function. For two setup functions names are similar, rename mc_pcie_setup_windows() to plda_pcie_setup_iomems(). Signed-off-by: Minda Chen Reviewed-by: Conor Dooley --- .../pci/controller/plda/pcie-microchip-host.c | 24 +++++++++---------- 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/drivers/pci/controller/plda/pcie-microchip-host.c b/drivers/pc= i/controller/plda/pcie-microchip-host.c index 261147a0a446..4877d130ee4c 100644 --- a/drivers/pci/controller/plda/pcie-microchip-host.c +++ b/drivers/pci/controller/plda/pcie-microchip-host.c @@ -838,9 +838,9 @@ static int mc_pcie_init_irq_domains(struct plda_pcie_rp= *port) return mc_allocate_msi_domains(port); } =20 -static void mc_pcie_setup_window(void __iomem *bridge_base_addr, u32 index, - phys_addr_t axi_addr, phys_addr_t pci_addr, - size_t size) +static void plda_pcie_setup_window(void __iomem *bridge_base_addr, u32 ind= ex, + phys_addr_t axi_addr, phys_addr_t pci_addr, + size_t size) { u32 atr_sz =3D ilog2(size) - 1; u32 val; @@ -876,8 +876,8 @@ static void mc_pcie_setup_window(void __iomem *bridge_b= ase_addr, u32 index, writel(0, bridge_base_addr + ATR0_PCIE_WIN0_SRC_ADDR); } =20 -static int mc_pcie_setup_windows(struct platform_device *pdev, - struct plda_pcie_rp *port) +static int plda_pcie_setup_iomems(struct platform_device *pdev, + struct plda_pcie_rp *port) { void __iomem *bridge_base_addr =3D port->bridge_addr; struct pci_host_bridge *bridge =3D platform_get_drvdata(pdev); @@ -888,9 +888,9 @@ static int mc_pcie_setup_windows(struct platform_device= *pdev, resource_list_for_each_entry(entry, &bridge->windows) { if (resource_type(entry->res) =3D=3D IORESOURCE_MEM) { pci_addr =3D entry->res->start - entry->offset; - mc_pcie_setup_window(bridge_base_addr, index, - entry->res->start, pci_addr, - resource_size(entry->res)); + plda_pcie_setup_window(bridge_base_addr, index, + entry->res->start, pci_addr, + resource_size(entry->res)); index++; } } @@ -1023,15 +1023,15 @@ static int mc_platform_init(struct pci_config_windo= w *cfg) int ret; =20 /* Configure address translation table 0 for PCIe config space */ - mc_pcie_setup_window(bridge_base_addr, 0, cfg->res.start, - cfg->res.start, - resource_size(&cfg->res)); + plda_pcie_setup_window(bridge_base_addr, 0, cfg->res.start, + cfg->res.start, + resource_size(&cfg->res)); =20 /* Need some fixups in config space */ mc_pcie_enable_msi(port, cfg->win); =20 /* Configure non-config space outbound ranges */ - ret =3D mc_pcie_setup_windows(pdev, &port->plda); + ret =3D plda_pcie_setup_iomems(pdev, &port->plda); if (ret) return ret; =20 --=20 2.17.1