From nobody Sun Dec 28 19:32:56 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A75B1C10F04 for ; Tue, 5 Dec 2023 12:36:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345139AbjLEMgm (ORCPT ); Tue, 5 Dec 2023 07:36:42 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49766 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345111AbjLEMgj (ORCPT ); Tue, 5 Dec 2023 07:36:39 -0500 Received: from mail-pf1-x433.google.com (mail-pf1-x433.google.com [IPv6:2607:f8b0:4864:20::433]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D9C0010F for ; Tue, 5 Dec 2023 04:36:45 -0800 (PST) Received: by mail-pf1-x433.google.com with SMTP id d2e1a72fcca58-6cbd24d9557so4437880b3a.1 for ; Tue, 05 Dec 2023 04:36:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1701779805; x=1702384605; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=W5mNmjMPCqBbX4f2kZl/QjTxGMwPMe3/nj+TBHAFfXI=; b=lfRw47qVs5//F5mPPuD2CxprZN7n8ax8K0ptR5x04JM0MEwLqmuX/X24dWRawMmTkG ShsLYCWxaobNDdDNzZPvq9gac8U0kDsx9MkNqbcv0mlVlTy0oa5lPKEyveYqYUQuPTLL OtG4Wb41JwU2TOvRg91XCgB/rCnuWtQbtsmMk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1701779805; x=1702384605; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=W5mNmjMPCqBbX4f2kZl/QjTxGMwPMe3/nj+TBHAFfXI=; b=oqV9OULEIJgjIR7Ys0AvsBvoGYRw4uIjjQUJ+1LD5SHzN8LhEE7GZHOKuVzFywUGyE CWm1X4Vq4qLhkFaOD7vyNUSOua+UI8d6LbRRBFAh5kzRRtUIAURa9XuRscHilwTR19PU ZIsBV71Pew3/eXFMMyVD7QsYmbAf2EaeCxhmB/m7Odhgj7R3rUDjofiA09IQSGBFwgt7 FgOF0drjKyugxcIyhkpUaIciISX9EIIKlDNn/ON3wCRcOW2jkquRYr6Hn4C1yb9CTsAi AQd958jTEbTmjvVHMRdsKDUwO4kODgJvs1a+BeOvnpuyKQE3FEVPnx+fZBBdljaJaAPt ufQA== X-Gm-Message-State: AOJu0Yx3kpRPq0e9vOaCtz14cUglILN28HqGCmhrTnZLT1FkqZPQxoQ2 CG47ITH8zhjij12DfKJ8FRyuaA== X-Google-Smtp-Source: AGHT+IE/D6fPLH75eLG9HpAcEh5urre5KQHQWGFui4XsKp47sqHxc/gbp1W0L6LtW1vVgO8lr3xT+A== X-Received: by 2002:a05:6a00:420f:b0:6ce:2731:47b4 with SMTP id cd15-20020a056a00420f00b006ce273147b4mr1403242pfb.20.1701779805324; Tue, 05 Dec 2023 04:36:45 -0800 (PST) Received: from treapking.tpe.corp.google.com ([2401:fa00:1:10:433d:45a7:8d2c:be0e]) by smtp.gmail.com with ESMTPSA id p26-20020aa7861a000000b006ce7abe91dasm285115pfn.195.2023.12.05.04.36.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 Dec 2023 04:36:45 -0800 (PST) From: Pin-yen Lin To: Douglas Anderson , Neil Armstrong , Jessica Zhang , Sam Ravnborg , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter Cc: linux-kernel@vger.kernel.org, Guenter Roeck , dri-devel@lists.freedesktop.org, Pin-yen Lin Subject: [PATCH 1/4] drm/panel-edp: Add powered_on_to_enable delay Date: Tue, 5 Dec 2023 20:35:34 +0800 Message-ID: <20231205123630.988663-2-treapking@chromium.org> X-Mailer: git-send-email 2.43.0.rc2.451.g8631bc7472-goog In-Reply-To: <20231205123630.988663-1-treapking@chromium.org> References: <20231205123630.988663-1-treapking@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add the support of powered_on_to_enable delay as the minimum time that needs to have passed between the panel powered on and enable may begin. This delay is seen in BOE panels as the minimum delay of T3+T4+T5+T6+T8 in the eDP timing diagrams. Signed-off-by: Pin-yen Lin Reviewed-by: Douglas Anderson --- drivers/gpu/drm/panel/panel-edp.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-edp.c b/drivers/gpu/drm/panel/pane= l-edp.c index 825fa2a0d8a5..819fe8115c08 100644 --- a/drivers/gpu/drm/panel/panel-edp.c +++ b/drivers/gpu/drm/panel/panel-edp.c @@ -70,6 +70,21 @@ struct panel_delay { */ unsigned int hpd_absent; =20 + /** + * @powered_on_to_enable: Time between panel powered on and enable. + * + * The minimum time, in milliseconds, that needs to have passed + * between when panel powered on and enable may begin. + * + * This is (T3+T4+T5+T6+T8)-min on eDP timing diagrams or after the + * power supply enabled until we can turn the backlight on and see + * valid data. + * + * This doesn't normally need to be set if timings are already met by + * prepare_to_enable or enable. + */ + unsigned int powered_on_to_enable; + /** * @prepare_to_enable: Time between prepare and enable. * @@ -216,6 +231,7 @@ struct panel_edp { bool prepared; =20 ktime_t prepared_time; + ktime_t powered_on_time; ktime_t unprepared_time; =20 const struct panel_desc *desc; @@ -455,6 +471,8 @@ static int panel_edp_prepare_once(struct panel_edp *p) =20 gpiod_set_value_cansleep(p->enable_gpio, 1); =20 + p->powered_on_time =3D ktime_get_boottime(); + delay =3D p->desc->delay.hpd_reliable; if (p->no_hpd) delay =3D max(delay, p->desc->delay.hpd_absent); @@ -579,6 +597,8 @@ static int panel_edp_enable(struct drm_panel *panel) =20 panel_edp_wait(p->prepared_time, p->desc->delay.prepare_to_enable); =20 + panel_edp_wait(p->powered_on_time, p->desc->delay.powered_on_to_enable); + p->enabled =3D true; =20 return 0; --=20 2.43.0.rc2.451.g8631bc7472-goog From nobody Sun Dec 28 19:32:56 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 76AA4C10F05 for ; Tue, 5 Dec 2023 12:36:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345165AbjLEMgu (ORCPT ); Tue, 5 Dec 2023 07:36:50 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43886 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345145AbjLEMgn (ORCPT ); Tue, 5 Dec 2023 07:36:43 -0500 Received: from mail-pf1-x434.google.com (mail-pf1-x434.google.com [IPv6:2607:f8b0:4864:20::434]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C4137182 for ; Tue, 5 Dec 2023 04:36:49 -0800 (PST) Received: by mail-pf1-x434.google.com with SMTP id d2e1a72fcca58-6ce26a03d9eso1791704b3a.0 for ; Tue, 05 Dec 2023 04:36:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1701779809; x=1702384609; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=6UwqFDeGV6eW6XdPYpX2kE/NInLRVcN8eq+ZIooofQY=; b=Cw5NUypTTdzKfmGeXuvbkTGC3jZ2Pq6YstxF1FeV/ZHry0jaNXdR1fPIuYf2USlR5/ RUomzRX48zTssXshfEExTPG9mVrrjVi90/KoRkTPgACguvQCkq8LlFRdrtLIgwjxAxzn qIjBDTU+hfalj2FM7VvAt0I8p2Tu94Dlxv50s= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1701779809; x=1702384609; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=6UwqFDeGV6eW6XdPYpX2kE/NInLRVcN8eq+ZIooofQY=; b=wXVDIy7SGO47mJyIm7Qw/vyfVKfuHS5Xnx/IITdMizOQfXuhDcqMdI8cc/3aEylDRs +5vtuIhJmzkwF3eIX8ClVVRWrH0g2ECY6CbEOOfJ1GAq0zVlGA14W1LpRaI5jMQr/Vd3 v179pVIrUboacfrUpBWeYBqvlEO46hN57TT6DK8vC8f5PlaB2lmtYCzwm2zzWoUmH+7X bwQm8HR764LG+CvUPbVRDE28eg65w5BEZGDT1QxVSRSVXqlMgyW+17zLF4g2wgUkluPD s49IZ2EsG1ian7RJ+YoWw2xik2Rsyxp+EwOxg9iGM5LqMZv/PNiKv0/p+r/i/5oSfl82 o3rw== X-Gm-Message-State: AOJu0Yx35Cw02Mu2XS8nKIn4d0miTD40W+9BioDk0zmbq3CDMQbuWevd mUbAYvpW9J5YKrNRcFJ9168e/g== X-Google-Smtp-Source: AGHT+IFHozXEbLedjhGxYPoLzJBDZRAuFZw6UtdjR8BL72A6PhNEbQM53COb7FZCJSMVj2+wWbAoAA== X-Received: by 2002:a05:6a00:21d3:b0:6cd:e046:f3ec with SMTP id t19-20020a056a0021d300b006cde046f3ecmr1073933pfj.5.1701779809258; Tue, 05 Dec 2023 04:36:49 -0800 (PST) Received: from treapking.tpe.corp.google.com ([2401:fa00:1:10:433d:45a7:8d2c:be0e]) by smtp.gmail.com with ESMTPSA id p26-20020aa7861a000000b006ce7abe91dasm285115pfn.195.2023.12.05.04.36.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 Dec 2023 04:36:49 -0800 (PST) From: Pin-yen Lin To: Douglas Anderson , Neil Armstrong , Jessica Zhang , Sam Ravnborg , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter Cc: linux-kernel@vger.kernel.org, Guenter Roeck , dri-devel@lists.freedesktop.org, Pin-yen Lin Subject: [PATCH 2/4] drm/edp-panel: Sort the panel entries Date: Tue, 5 Dec 2023 20:35:35 +0800 Message-ID: <20231205123630.988663-3-treapking@chromium.org> X-Mailer: git-send-email 2.43.0.rc2.451.g8631bc7472-goog In-Reply-To: <20231205123630.988663-1-treapking@chromium.org> References: <20231205123630.988663-1-treapking@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Move the order of CMN 0x14e5 to make the list sorted. Signed-off-by: Pin-yen Lin --- drivers/gpu/drm/panel/panel-edp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/panel/panel-edp.c b/drivers/gpu/drm/panel/pane= l-edp.c index 819fe8115c08..e0a18e17d3a2 100644 --- a/drivers/gpu/drm/panel/panel-edp.c +++ b/drivers/gpu/drm/panel/panel-edp.c @@ -1987,9 +1987,9 @@ static const struct edp_panel_entry edp_panels[] =3D { EDP_PANEL_ENTRY('C', 'M', 'N', 0x142b, &delay_200_500_e80_d50, "N140HCA-E= AC"), EDP_PANEL_ENTRY('C', 'M', 'N', 0x144f, &delay_200_500_e80_d50, "N140HGA-E= A1"), EDP_PANEL_ENTRY('C', 'M', 'N', 0x1468, &delay_200_500_e80, "N140HGA-EA1"), - EDP_PANEL_ENTRY('C', 'M', 'N', 0x14e5, &delay_200_500_e80_d50, "N140HGA-E= A1"), EDP_PANEL_ENTRY('C', 'M', 'N', 0x14d4, &delay_200_500_e80_d50, "N140HCA-E= AC"), EDP_PANEL_ENTRY('C', 'M', 'N', 0x14d6, &delay_200_500_e80_d50, "N140BGA-E= A4"), + EDP_PANEL_ENTRY('C', 'M', 'N', 0x14e5, &delay_200_500_e80_d50, "N140HGA-E= A1"), =20 EDP_PANEL_ENTRY('H', 'K', 'C', 0x2d5c, &delay_200_500_e200, "MB116AN01-2"= ), =20 --=20 2.43.0.rc2.451.g8631bc7472-goog From nobody Sun Dec 28 19:32:56 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AD03DC4167B for ; Tue, 5 Dec 2023 12:37:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345237AbjLEMg5 (ORCPT ); Tue, 5 Dec 2023 07:36:57 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44036 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345180AbjLEMgu (ORCPT ); Tue, 5 Dec 2023 07:36:50 -0500 Received: from mail-pf1-x432.google.com (mail-pf1-x432.google.com [IPv6:2607:f8b0:4864:20::432]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E085219F for ; Tue, 5 Dec 2023 04:36:53 -0800 (PST) Received: by mail-pf1-x432.google.com with SMTP id d2e1a72fcca58-6ce6b62746dso591057b3a.2 for ; Tue, 05 Dec 2023 04:36:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1701779813; x=1702384613; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Ob6MCLtz+SqUnIFM6W6vpzsJOaP6uH+NSZuE3PqQZy0=; b=nk2AlQemy5hybO9yNfb8S733IUKPu3gZCZXz4/7UssHNfvFs/rjqkQu49zzKjSVBZI CS/amWrRHPf4Y814ARD65uV7x4TaDN+uGe5gRJzK0jfRJ+qPDoLfnWhIg+HxO9iyT96E Zgx7RqXrXzz4606+dcgPgpmK1FM6cOSnSYQCs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1701779813; x=1702384613; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Ob6MCLtz+SqUnIFM6W6vpzsJOaP6uH+NSZuE3PqQZy0=; b=EqO4YZo9fL02NaHhkTQlKLxGc6GifGIj5BnrIZfPIsEMd6wJ6o9kXzH65xU+4iqdSY wWUJzNfUwACsO1UGJBJACQSni/gLrwqULRz0oPtPp8ysit56z+mBEdWNMlf3h2U5V2ts Wir72mXwUH8Np3dQ3kW/jVLW0jLEh9hN5VvewyjLMXiFfpfPaf2vmR+WW1TjyxwtIuXR IPxRD8mzElBXu6vBtatsJ1E167tD06wB/Dw7fzBIdGyvk3KA0Xb5tMU6xGDo2RVmiF0p QqxAWt9+LlYz8vq7lHBi/gUQYubrk5KLVj5/BKOkbiTVxbhDA1w8iFaax0nyvhuxG609 sR3g== X-Gm-Message-State: AOJu0Yw8iOzHkGi8ZO5dQUOfLPe42wIQ2QT00uxvScTPp9wX08CQ2KO9 0heFag6+8y7bRuLiz18CTvcd/TZiiBF/+kKXlYI= X-Google-Smtp-Source: AGHT+IGPWSh1R2JwOBITNVbcGLfBiPFQaX+4yhJPJDl3InLBczy9c6jFYQbEfISjC6g7/KFPMdAfHQ== X-Received: by 2002:a05:6a00:3685:b0:6cd:ec0b:61ae with SMTP id dw5-20020a056a00368500b006cdec0b61aemr985040pfb.0.1701779813333; Tue, 05 Dec 2023 04:36:53 -0800 (PST) Received: from treapking.tpe.corp.google.com ([2401:fa00:1:10:433d:45a7:8d2c:be0e]) by smtp.gmail.com with ESMTPSA id p26-20020aa7861a000000b006ce7abe91dasm285115pfn.195.2023.12.05.04.36.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 Dec 2023 04:36:53 -0800 (PST) From: Pin-yen Lin To: Douglas Anderson , Neil Armstrong , Jessica Zhang , Sam Ravnborg , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter Cc: linux-kernel@vger.kernel.org, Guenter Roeck , dri-devel@lists.freedesktop.org, Pin-yen Lin Subject: [PATCH 3/4] drm/edp-panel: Add panels delay entries Date: Tue, 5 Dec 2023 20:35:36 +0800 Message-ID: <20231205203536.3.I8fc55a1de13171aa738b14a167bab8df76c2ea2a@changeid> X-Mailer: git-send-email 2.43.0.rc2.451.g8631bc7472-goog In-Reply-To: <20231205123630.988663-1-treapking@chromium.org> References: <20231205123630.988663-1-treapking@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add panels used by Mediatek MT8173 Chromebooks. Signed-off-by: Pin-yen Lin --- drivers/gpu/drm/panel/panel-edp.c | 39 +++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-edp.c b/drivers/gpu/drm/panel/pane= l-edp.c index e0a18e17d3a2..475257fe1ddc 100644 --- a/drivers/gpu/drm/panel/panel-edp.c +++ b/drivers/gpu/drm/panel/panel-edp.c @@ -1857,6 +1857,13 @@ static const struct panel_delay delay_200_500_p2e80 = =3D { .prepare_to_enable =3D 80, }; =20 +static const struct panel_delay delay_200_500_e50_p2e80 =3D { + .hpd_absent =3D 200, + .unprepare =3D 500, + .enable =3D 50, + .prepare_to_enable =3D 80, +}; + static const struct panel_delay delay_200_500_p2e100 =3D { .hpd_absent =3D 200, .unprepare =3D 500, @@ -1894,6 +1901,13 @@ static const struct panel_delay delay_200_500_e200 = =3D { .enable =3D 200, }; =20 +static const struct panel_delay delay_200_500_e200_d200 =3D { + .hpd_absent =3D 200, + .unprepare =3D 500, + .enable =3D 200, + .disable =3D 200, +}; + static const struct panel_delay delay_200_500_e200_d10 =3D { .hpd_absent =3D 200, .unprepare =3D 500, @@ -1907,6 +1921,13 @@ static const struct panel_delay delay_200_150_e200 = =3D { .enable =3D 200, }; =20 +static const struct panel_delay delay_200_500_e50_po2e200 =3D { + .hpd_absent =3D 200, + .unprepare =3D 500, + .enable =3D 50, + .powered_on_to_enable =3D 200, +}; + #define EDP_PANEL_ENTRY(vend_chr_0, vend_chr_1, vend_chr_2, product_id, _d= elay, _name) \ { \ .name =3D _name, \ @@ -1932,6 +1953,7 @@ static const struct panel_delay delay_200_150_e200 = =3D { * Sort first by vendor, then by product ID. */ static const struct edp_panel_entry edp_panels[] =3D { + EDP_PANEL_ENTRY('A', 'U', 'O', 0x105c, &delay_200_500_e50, "B116XTN01.0"), EDP_PANEL_ENTRY('A', 'U', 'O', 0x1062, &delay_200_500_e50, "B120XAN01.0"), EDP_PANEL_ENTRY('A', 'U', 'O', 0x145c, &delay_200_500_e50, "B116XAB01.4"), EDP_PANEL_ENTRY('A', 'U', 'O', 0x1e9b, &delay_200_500_e50, "B133UAN02.1"), @@ -1948,23 +1970,31 @@ static const struct edp_panel_entry edp_panels[] = =3D { &auo_b116xa3_mode), EDP_PANEL_ENTRY('A', 'U', 'O', 0x635c, &delay_200_500_e50, "B116XAN06.3"), EDP_PANEL_ENTRY('A', 'U', 'O', 0x639c, &delay_200_500_e50, "B140HAK02.7"), + EDP_PANEL_ENTRY('A', 'U', 'O', 0x723c, &delay_200_500_e50, "B140XTN07.2"), EDP_PANEL_ENTRY('A', 'U', 'O', 0x8594, &delay_200_500_e50, "B133UAN01.0"), EDP_PANEL_ENTRY('A', 'U', 'O', 0xf390, &delay_200_500_e50, "B140XTN07.7"), =20 + EDP_PANEL_ENTRY('B', 'O', 'E', 0x0608, &delay_200_500_e50, "NT116WHM-N11"= ), EDP_PANEL_ENTRY('B', 'O', 'E', 0x0715, &delay_200_150_e200, "NT116WHM-N21= "), + EDP_PANEL_ENTRY('B', 'O', 'E', 0x0717, &delay_200_500_e50_po2e200, "NV133= FHM-N42"), EDP_PANEL_ENTRY('B', 'O', 'E', 0x0731, &delay_200_500_e80, "NT116WHM-N42"= ), EDP_PANEL_ENTRY('B', 'O', 'E', 0x0741, &delay_200_500_e200, "NT116WHM-N44= "), + EDP_PANEL_ENTRY('B', 'O', 'E', 0x0754, &delay_200_500_e50_po2e200, "NV116= WHM-N45"), EDP_PANEL_ENTRY('B', 'O', 'E', 0x0786, &delay_200_500_p2e80, "NV116WHM-T0= 1"), EDP_PANEL_ENTRY('B', 'O', 'E', 0x07d1, &boe_nv133fhm_n61.delay, "NV133FHM= -N61"), EDP_PANEL_ENTRY('B', 'O', 'E', 0x07f6, &delay_200_500_e200, "NT140FHM-N44= "), + EDP_PANEL_ENTRY('B', 'O', 'E', 0x0827, &delay_200_500_e50_p2e80, "NT140WH= M-N44 V8.0"), EDP_PANEL_ENTRY('B', 'O', 'E', 0x082d, &boe_nv133fhm_n61.delay, "NV133FHM= -N62"), EDP_PANEL_ENTRY('B', 'O', 'E', 0x08b2, &delay_200_500_e200, "NT140WHM-N49= "), EDP_PANEL_ENTRY('B', 'O', 'E', 0x09c3, &delay_200_500_e50, "NT116WHM-N21,= 836X2"), EDP_PANEL_ENTRY('B', 'O', 'E', 0x094b, &delay_200_500_e50, "NT116WHM-N21"= ), EDP_PANEL_ENTRY('B', 'O', 'E', 0x0951, &delay_200_500_e80, "NV116WHM-N47"= ), EDP_PANEL_ENTRY('B', 'O', 'E', 0x095f, &delay_200_500_e50, "NE135FBM-N41 = v8.1"), + EDP_PANEL_ENTRY('B', 'O', 'E', 0x096e, &delay_200_500_e50_po2e200, "NV116= WHM-T07 V8.0"), EDP_PANEL_ENTRY('B', 'O', 'E', 0x0979, &delay_200_500_e50, "NV116WHM-N49 = V8.0"), EDP_PANEL_ENTRY('B', 'O', 'E', 0x098d, &boe_nv110wtm_n61.delay, "NV110WTM= -N61"), + EDP_PANEL_ENTRY('B', 'O', 'E', 0x0993, &delay_200_500_e80, "NV116WHM-T14 = V8.0"), + EDP_PANEL_ENTRY('B', 'O', 'E', 0x09ad, &delay_200_500_e80, "NV116WHM-N47"= ), EDP_PANEL_ENTRY('B', 'O', 'E', 0x09ae, &delay_200_500_e200, "NT140FHM-N45= "), EDP_PANEL_ENTRY('B', 'O', 'E', 0x09dd, &delay_200_500_e50, "NT116WHM-N21"= ), EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a5d, &delay_200_500_e50, "NV116WHM-N45"= ), @@ -1973,6 +2003,7 @@ static const struct edp_panel_entry edp_panels[] =3D { EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b56, &delay_200_500_e80, "NT140FHM-N47"= ), EDP_PANEL_ENTRY('B', 'O', 'E', 0x0c20, &delay_200_500_e80, "NT140FHM-N47"= ), =20 + EDP_PANEL_ENTRY('C', 'M', 'N', 0x1130, &delay_200_500_e50, "N116BGE-EB2"), EDP_PANEL_ENTRY('C', 'M', 'N', 0x1132, &delay_200_500_e80_d50, "N116BGE-E= A2"), EDP_PANEL_ENTRY('C', 'M', 'N', 0x1138, &innolux_n116bca_ea1.delay, "N116B= CA-EA1-RC4"), EDP_PANEL_ENTRY('C', 'M', 'N', 0x1139, &delay_200_500_e80_d50, "N116BGE-E= A2"), @@ -1985,6 +2016,7 @@ static const struct edp_panel_entry edp_panels[] =3D { EDP_PANEL_ENTRY('C', 'M', 'N', 0x115b, &delay_200_500_e80_d50, "N116BCN-E= B1"), EDP_PANEL_ENTRY('C', 'M', 'N', 0x1247, &delay_200_500_e80_d50, "N120ACA-E= A1"), EDP_PANEL_ENTRY('C', 'M', 'N', 0x142b, &delay_200_500_e80_d50, "N140HCA-E= AC"), + EDP_PANEL_ENTRY('C', 'M', 'N', 0x142e, &delay_200_500_e80_d50, "N140BGA-E= A4"), EDP_PANEL_ENTRY('C', 'M', 'N', 0x144f, &delay_200_500_e80_d50, "N140HGA-E= A1"), EDP_PANEL_ENTRY('C', 'M', 'N', 0x1468, &delay_200_500_e80, "N140HGA-EA1"), EDP_PANEL_ENTRY('C', 'M', 'N', 0x14d4, &delay_200_500_e80_d50, "N140HCA-E= AC"), @@ -1999,10 +2031,17 @@ static const struct edp_panel_entry edp_panels[] = =3D { EDP_PANEL_ENTRY('I', 'V', 'O', 0x854b, &delay_200_500_p2e100, "R133NW4K-R= 0"), EDP_PANEL_ENTRY('I', 'V', 'O', 0x8c4d, &delay_200_150_e200, "R140NWFM R1"= ), =20 + EDP_PANEL_ENTRY('K', 'D', 'C', 0x044f, &delay_200_500_e50, "KD116N9-30NH-= F3"), + EDP_PANEL_ENTRY('K', 'D', 'C', 0x05f1, &delay_200_500_e80_d50, "KD116N5-3= 0NV-G7"), EDP_PANEL_ENTRY('K', 'D', 'B', 0x0624, &kingdisplay_kd116n21_30nv_a010.de= lay, "116N21-30NV-A010"), EDP_PANEL_ENTRY('K', 'D', 'C', 0x0809, &delay_200_500_e50, "KD116N2930A15= "), + EDP_PANEL_ENTRY('K', 'D', 'B', 0x1118, &delay_200_500_e50, "KD116N29-30NK= -A005"), EDP_PANEL_ENTRY('K', 'D', 'B', 0x1120, &delay_200_500_e80_d50, "116N29-30= NK-C007"), =20 + EDP_PANEL_ENTRY('L', 'G', 'D', 0x0497, &delay_200_500_e200_d200, "LP116WH= 7-SPB1"), + EDP_PANEL_ENTRY('L', 'G', 'D', 0x052c, &delay_200_500_e200_d200, "LP133WF= 2-SPL7"), + EDP_PANEL_ENTRY('L', 'G', 'D', 0x054a, &delay_200_500_e200_d200, "LP116WH= 8-SPC1"), + EDP_PANEL_ENTRY('S', 'H', 'P', 0x1511, &delay_200_500_e50, "LQ140M1JW48"), EDP_PANEL_ENTRY('S', 'H', 'P', 0x1523, &sharp_lq140m1jw46.delay, "LQ140M1= JW46"), EDP_PANEL_ENTRY('S', 'H', 'P', 0x154c, &delay_200_500_p2e100, "LQ116M1JW1= 0"), --=20 2.43.0.rc2.451.g8631bc7472-goog From nobody Sun Dec 28 19:32:56 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E8601C07E97 for ; Tue, 5 Dec 2023 12:37:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345203AbjLEMg7 (ORCPT ); Tue, 5 Dec 2023 07:36:59 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43988 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345224AbjLEMgx (ORCPT ); Tue, 5 Dec 2023 07:36:53 -0500 Received: from mail-pf1-x42b.google.com (mail-pf1-x42b.google.com [IPv6:2607:f8b0:4864:20::42b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 289EC124 for ; Tue, 5 Dec 2023 04:36:57 -0800 (PST) Received: by mail-pf1-x42b.google.com with SMTP id d2e1a72fcca58-6ce3df4c282so1724420b3a.1 for ; Tue, 05 Dec 2023 04:36:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1701779816; x=1702384616; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=DOvPvtu46u4UOqUjrecGBF7nnETON0pxtXhiq+u9N/g=; b=k0/dPvJjNiNC8AWbG7dbUEV/KkSsEfgO2eg+pInVp2ItncRstc1p1rda5Sd4iJWFSc pExJZrzGLGNxFVUyYWCfwuGPd8q/wxVu+AuJdV+jsnfrZmRCea6ErSkGAOyzLCIK0UqA LOSLgZ6LKzG5e+py+1F/tUFTzwufDk6slEAiI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1701779816; x=1702384616; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=DOvPvtu46u4UOqUjrecGBF7nnETON0pxtXhiq+u9N/g=; b=pi95b7g/wMrkC2kwe56HJgV1laJgfP8T/kO7wCiBbnDJLAMFny6euavIm0PySNQQR4 0G7OBIgEAxDf96EctAK/ZG4pIR4WtAoWxOKa8TKEqAcceZ86RSqwjZNc42ZrnHgB9XxA SVM75ECAvZi80/wamGVbkVw5d/cC3o9M/RBbxbhAqDchQcJgBzgBtwT2ACf8UH7yk5xU ITJ34Qge6IqO5GzIkXn+tJfC8ej+M7xeUph9LMqohft8WPx+ZWI5APWJME0+QjD5DwHS xpu5VgD4GE/4RVgl8Um/ffgs4QjkbuEqR+VGBWFdRck2e8Y5vge7fINbDXv8zSgC1rUk Bwfg== X-Gm-Message-State: AOJu0YyFKFMvu/myKd18fAr+rac/iQmxfEyEM6a7gkQ1vDpZ8z8vEALL rNIPw+xRDdiH5qWyOHuFOxvPFg== X-Google-Smtp-Source: AGHT+IGen2/zadmoyP1Ym+0e626ml05xL330t/M3LHeA5G08eLiDQzA8yXdGrOiTSYtc2wy0RTsEfA== X-Received: by 2002:aa7:88c9:0:b0:6ce:4853:beaf with SMTP id k9-20020aa788c9000000b006ce4853beafmr876561pff.56.1701779816519; Tue, 05 Dec 2023 04:36:56 -0800 (PST) Received: from treapking.tpe.corp.google.com ([2401:fa00:1:10:433d:45a7:8d2c:be0e]) by smtp.gmail.com with ESMTPSA id p26-20020aa7861a000000b006ce7abe91dasm285115pfn.195.2023.12.05.04.36.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 Dec 2023 04:36:56 -0800 (PST) From: Pin-yen Lin To: Douglas Anderson , Neil Armstrong , Jessica Zhang , Sam Ravnborg , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter Cc: linux-kernel@vger.kernel.org, Guenter Roeck , dri-devel@lists.freedesktop.org, Pin-yen Lin Subject: [PATCH 4/4] drm/panel-edp: Add some panels with conservative timings Date: Tue, 5 Dec 2023 20:35:37 +0800 Message-ID: <20231205203536.4.Iaa6257fcf9e7fe3ca88c50ab6e5aa3fbf55266d0@changeid> X-Mailer: git-send-email 2.43.0.rc2.451.g8631bc7472-goog In-Reply-To: <20231205123630.988663-1-treapking@chromium.org> References: <20231205123630.988663-1-treapking@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" These panels are used by Mediatek MT8173 Chromebooks but we can't find the corresponding data sheets, and these panels used to work on v4.19 kernel without any specified delays. Therefore, instead of having them use the default conservative timings, update them with less-conservative timings from other panels of the same vendor. The panels should still work under those timings, and we can save some delays and suppress the warnings. Signed-off-by: Pin-yen Lin --- drivers/gpu/drm/panel/panel-edp.c | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-edp.c b/drivers/gpu/drm/panel/pane= l-edp.c index 475257fe1ddc..55e747715178 100644 --- a/drivers/gpu/drm/panel/panel-edp.c +++ b/drivers/gpu/drm/panel/panel-edp.c @@ -1955,6 +1955,7 @@ static const struct panel_delay delay_200_500_e50_po2= e200 =3D { static const struct edp_panel_entry edp_panels[] =3D { EDP_PANEL_ENTRY('A', 'U', 'O', 0x105c, &delay_200_500_e50, "B116XTN01.0"), EDP_PANEL_ENTRY('A', 'U', 'O', 0x1062, &delay_200_500_e50, "B120XAN01.0"), + EDP_PANEL_ENTRY('A', 'U', 'O', 0x125c, &delay_200_500_e50, "Unknown"), EDP_PANEL_ENTRY('A', 'U', 'O', 0x145c, &delay_200_500_e50, "B116XAB01.4"), EDP_PANEL_ENTRY('A', 'U', 'O', 0x1e9b, &delay_200_500_e50, "B133UAN02.1"), EDP_PANEL_ENTRY('A', 'U', 'O', 0x1ea5, &delay_200_500_e50, "B116XAK01.6"), @@ -1965,6 +1966,7 @@ static const struct edp_panel_entry edp_panels[] =3D { EDP_PANEL_ENTRY('A', 'U', 'O', 0x403d, &delay_200_500_e50, "B140HAN04.0"), EDP_PANEL_ENTRY2('A', 'U', 'O', 0x405c, &auo_b116xak01.delay, "B116XAK01.= 0", &auo_b116xa3_mode), + EDP_PANEL_ENTRY('A', 'U', 'O', 0x435c, &delay_200_500_e50, "Unknown"), EDP_PANEL_ENTRY('A', 'U', 'O', 0x582d, &delay_200_500_e50, "B133UAN01.0"), EDP_PANEL_ENTRY2('A', 'U', 'O', 0x615c, &delay_200_500_e50, "B116XAN06.1", &auo_b116xa3_mode), @@ -1974,18 +1976,34 @@ static const struct edp_panel_entry edp_panels[] = =3D { EDP_PANEL_ENTRY('A', 'U', 'O', 0x8594, &delay_200_500_e50, "B133UAN01.0"), EDP_PANEL_ENTRY('A', 'U', 'O', 0xf390, &delay_200_500_e50, "B140XTN07.7"), =20 + EDP_PANEL_ENTRY('B', 'O', 'E', 0x0607, &delay_200_500_e200, "Unknown"), EDP_PANEL_ENTRY('B', 'O', 'E', 0x0608, &delay_200_500_e50, "NT116WHM-N11"= ), + EDP_PANEL_ENTRY('B', 'O', 'E', 0x0668, &delay_200_500_e200, "Unknown"), + EDP_PANEL_ENTRY('B', 'O', 'E', 0x068f, &delay_200_500_e200, "Unknown"), + EDP_PANEL_ENTRY('B', 'O', 'E', 0x06e5, &delay_200_500_e200, "Unknown"), + EDP_PANEL_ENTRY('B', 'O', 'E', 0x0705, &delay_200_500_e200, "Unknown"), EDP_PANEL_ENTRY('B', 'O', 'E', 0x0715, &delay_200_150_e200, "NT116WHM-N21= "), EDP_PANEL_ENTRY('B', 'O', 'E', 0x0717, &delay_200_500_e50_po2e200, "NV133= FHM-N42"), EDP_PANEL_ENTRY('B', 'O', 'E', 0x0731, &delay_200_500_e80, "NT116WHM-N42"= ), EDP_PANEL_ENTRY('B', 'O', 'E', 0x0741, &delay_200_500_e200, "NT116WHM-N44= "), + EDP_PANEL_ENTRY('B', 'O', 'E', 0x0744, &delay_200_500_e200, "Unknown"), + EDP_PANEL_ENTRY('B', 'O', 'E', 0x074c, &delay_200_500_e200, "Unknown"), + EDP_PANEL_ENTRY('B', 'O', 'E', 0x0751, &delay_200_500_e200, "Unknown"), EDP_PANEL_ENTRY('B', 'O', 'E', 0x0754, &delay_200_500_e50_po2e200, "NV116= WHM-N45"), + EDP_PANEL_ENTRY('B', 'O', 'E', 0x0771, &delay_200_500_e200, "Unknown"), EDP_PANEL_ENTRY('B', 'O', 'E', 0x0786, &delay_200_500_p2e80, "NV116WHM-T0= 1"), + EDP_PANEL_ENTRY('B', 'O', 'E', 0x0797, &delay_200_500_e200, "Unknown"), EDP_PANEL_ENTRY('B', 'O', 'E', 0x07d1, &boe_nv133fhm_n61.delay, "NV133FHM= -N61"), + EDP_PANEL_ENTRY('B', 'O', 'E', 0x07d3, &delay_200_500_e200, "Unknown"), EDP_PANEL_ENTRY('B', 'O', 'E', 0x07f6, &delay_200_500_e200, "NT140FHM-N44= "), + EDP_PANEL_ENTRY('B', 'O', 'E', 0x07f8, &delay_200_500_e200, "Unknown"), + EDP_PANEL_ENTRY('B', 'O', 'E', 0x0813, &delay_200_500_e200, "Unknown"), EDP_PANEL_ENTRY('B', 'O', 'E', 0x0827, &delay_200_500_e50_p2e80, "NT140WH= M-N44 V8.0"), EDP_PANEL_ENTRY('B', 'O', 'E', 0x082d, &boe_nv133fhm_n61.delay, "NV133FHM= -N62"), + EDP_PANEL_ENTRY('B', 'O', 'E', 0x0843, &delay_200_500_e200, "Unknown"), EDP_PANEL_ENTRY('B', 'O', 'E', 0x08b2, &delay_200_500_e200, "NT140WHM-N49= "), + EDP_PANEL_ENTRY('B', 'O', 'E', 0x0848, &delay_200_500_e200, "Unknown"), + EDP_PANEL_ENTRY('B', 'O', 'E', 0x0849, &delay_200_500_e200, "Unknown"), EDP_PANEL_ENTRY('B', 'O', 'E', 0x09c3, &delay_200_500_e50, "NT116WHM-N21,= 836X2"), EDP_PANEL_ENTRY('B', 'O', 'E', 0x094b, &delay_200_500_e50, "NT116WHM-N21"= ), EDP_PANEL_ENTRY('B', 'O', 'E', 0x0951, &delay_200_500_e80, "NV116WHM-N47"= ), @@ -1997,6 +2015,7 @@ static const struct edp_panel_entry edp_panels[] =3D { EDP_PANEL_ENTRY('B', 'O', 'E', 0x09ad, &delay_200_500_e80, "NV116WHM-N47"= ), EDP_PANEL_ENTRY('B', 'O', 'E', 0x09ae, &delay_200_500_e200, "NT140FHM-N45= "), EDP_PANEL_ENTRY('B', 'O', 'E', 0x09dd, &delay_200_500_e50, "NT116WHM-N21"= ), + EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a36, &delay_200_500_e200, "Unknown"), EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a5d, &delay_200_500_e50, "NV116WHM-N45"= ), EDP_PANEL_ENTRY('B', 'O', 'E', 0x0ac5, &delay_200_500_e50, "NV116WHM-N4C"= ), EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b43, &delay_200_500_e200, "NV140FHM-T09= "), @@ -2007,11 +2026,14 @@ static const struct edp_panel_entry edp_panels[] = =3D { EDP_PANEL_ENTRY('C', 'M', 'N', 0x1132, &delay_200_500_e80_d50, "N116BGE-E= A2"), EDP_PANEL_ENTRY('C', 'M', 'N', 0x1138, &innolux_n116bca_ea1.delay, "N116B= CA-EA1-RC4"), EDP_PANEL_ENTRY('C', 'M', 'N', 0x1139, &delay_200_500_e80_d50, "N116BGE-E= A2"), + EDP_PANEL_ENTRY('C', 'M', 'N', 0x1141, &delay_200_500_e80_d50, "Unknown"), EDP_PANEL_ENTRY('C', 'M', 'N', 0x1145, &delay_200_500_e80_d50, "N116BCN-E= B1"), + EDP_PANEL_ENTRY('C', 'M', 'N', 0x114a, &delay_200_500_e80_d50, "Unknown"), EDP_PANEL_ENTRY('C', 'M', 'N', 0x114c, &innolux_n116bca_ea1.delay, "N116B= CA-EA1"), EDP_PANEL_ENTRY('C', 'M', 'N', 0x1152, &delay_200_500_e80_d50, "N116BCN-E= A1"), EDP_PANEL_ENTRY('C', 'M', 'N', 0x1153, &delay_200_500_e80_d50, "N116BGE-E= A2"), EDP_PANEL_ENTRY('C', 'M', 'N', 0x1154, &delay_200_500_e80_d50, "N116BCA-E= A2"), + EDP_PANEL_ENTRY('C', 'M', 'N', 0x1156, &delay_200_500_e80_d50, "Unknown"), EDP_PANEL_ENTRY('C', 'M', 'N', 0x1157, &delay_200_500_e80_d50, "N116BGE-E= A2"), EDP_PANEL_ENTRY('C', 'M', 'N', 0x115b, &delay_200_500_e80_d50, "N116BCN-E= B1"), EDP_PANEL_ENTRY('C', 'M', 'N', 0x1247, &delay_200_500_e80_d50, "N120ACA-E= A1"), @@ -2023,6 +2045,8 @@ static const struct edp_panel_entry edp_panels[] =3D { EDP_PANEL_ENTRY('C', 'M', 'N', 0x14d6, &delay_200_500_e80_d50, "N140BGA-E= A4"), EDP_PANEL_ENTRY('C', 'M', 'N', 0x14e5, &delay_200_500_e80_d50, "N140HGA-E= A1"), =20 + EDP_PANEL_ENTRY('H', 'K', 'C', 0x2d51, &delay_200_500_e200, "Unknown"), + EDP_PANEL_ENTRY('H', 'K', 'C', 0x2d5b, &delay_200_500_e200, "Unknown"), EDP_PANEL_ENTRY('H', 'K', 'C', 0x2d5c, &delay_200_500_e200, "MB116AN01-2"= ), =20 EDP_PANEL_ENTRY('I', 'V', 'O', 0x048e, &delay_200_500_e200_d10, "M116NWR6= R5"), @@ -2031,6 +2055,7 @@ static const struct edp_panel_entry edp_panels[] =3D { EDP_PANEL_ENTRY('I', 'V', 'O', 0x854b, &delay_200_500_p2e100, "R133NW4K-R= 0"), EDP_PANEL_ENTRY('I', 'V', 'O', 0x8c4d, &delay_200_150_e200, "R140NWFM R1"= ), =20 + EDP_PANEL_ENTRY('K', 'D', 'B', 0x044f, &delay_200_500_e80_d50, "Unknown"), EDP_PANEL_ENTRY('K', 'D', 'C', 0x044f, &delay_200_500_e50, "KD116N9-30NH-= F3"), EDP_PANEL_ENTRY('K', 'D', 'C', 0x05f1, &delay_200_500_e80_d50, "KD116N5-3= 0NV-G7"), EDP_PANEL_ENTRY('K', 'D', 'B', 0x0624, &kingdisplay_kd116n21_30nv_a010.de= lay, "116N21-30NV-A010"), @@ -2038,9 +2063,15 @@ static const struct edp_panel_entry edp_panels[] =3D= { EDP_PANEL_ENTRY('K', 'D', 'B', 0x1118, &delay_200_500_e50, "KD116N29-30NK= -A005"), EDP_PANEL_ENTRY('K', 'D', 'B', 0x1120, &delay_200_500_e80_d50, "116N29-30= NK-C007"), =20 + EDP_PANEL_ENTRY('L', 'G', 'D', 0x0000, &delay_200_500_e200_d200, "Unknown= "), + EDP_PANEL_ENTRY('L', 'G', 'D', 0x048d, &delay_200_500_e200_d200, "Unknown= "), EDP_PANEL_ENTRY('L', 'G', 'D', 0x0497, &delay_200_500_e200_d200, "LP116WH= 7-SPB1"), EDP_PANEL_ENTRY('L', 'G', 'D', 0x052c, &delay_200_500_e200_d200, "LP133WF= 2-SPL7"), + EDP_PANEL_ENTRY('L', 'G', 'D', 0x0537, &delay_200_500_e200_d200, "Unknown= "), EDP_PANEL_ENTRY('L', 'G', 'D', 0x054a, &delay_200_500_e200_d200, "LP116WH= 8-SPC1"), + EDP_PANEL_ENTRY('L', 'G', 'D', 0x0567, &delay_200_500_e200_d200, "Unknown= "), + EDP_PANEL_ENTRY('L', 'G', 'D', 0x05af, &delay_200_500_e200_d200, "Unknown= "), + EDP_PANEL_ENTRY('L', 'G', 'D', 0x05f1, &delay_200_500_e200_d200, "Unknown= "), =20 EDP_PANEL_ENTRY('S', 'H', 'P', 0x1511, &delay_200_500_e50, "LQ140M1JW48"), EDP_PANEL_ENTRY('S', 'H', 'P', 0x1523, &sharp_lq140m1jw46.delay, "LQ140M1= JW46"), --=20 2.43.0.rc2.451.g8631bc7472-goog