From nobody Sun Dec 28 23:16:42 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1CB0DC10DCE for ; Tue, 5 Dec 2023 09:35:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234920AbjLEJe4 (ORCPT ); Tue, 5 Dec 2023 04:34:56 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46188 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229710AbjLEJex (ORCPT ); Tue, 5 Dec 2023 04:34:53 -0500 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 60246B2; Tue, 5 Dec 2023 01:34:59 -0800 (PST) Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 3B59YqZt009280; Tue, 5 Dec 2023 03:34:52 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1701768892; bh=UfjBhtaZZ/NKcvDIFDopEMmKDLrafRemrAtn6Pjaw1I=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=Q+UD8J3Tmie4w5lAjj5Ylj5Oc05z43MTtVcyU2+4YX+HzgXYsw8zYQE07UEqcK50d Tw/fTxpnPIt7TphinOvhcjb/+yCwjDLSC7GDD9n3uo49pS29zJ7A9h1FElUa9LT6r1 AtQcQ14jn9ioRHpCMLbCMxb2O8mb7sLJgVpfSylw= Received: from DLEE103.ent.ti.com (dlee103.ent.ti.com [157.170.170.33]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 3B59YqY5009020 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 5 Dec 2023 03:34:52 -0600 Received: from DLEE105.ent.ti.com (157.170.170.35) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Tue, 5 Dec 2023 03:34:51 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 5 Dec 2023 03:34:51 -0600 Received: from a0497641-HP-Z2-Tower-G9-Workstation-Desktop-PC.dhcp.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 3B59YeMm010566; Tue, 5 Dec 2023 03:34:46 -0600 From: Neha Malcom Francis To: , , , , , , CC: , , , , , , , , , , , , Subject: [PATCH v9 1/7] arm64: dts: ti: k3-j7200-som-p0: Add TP6594 family PMICs Date: Tue, 5 Dec 2023 15:04:33 +0530 Message-ID: <20231205093439.2298296-2-n-francis@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231205093439.2298296-1-n-francis@ti.com> References: <20231205093439.2298296-1-n-francis@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Esteban Blanc This patch adds support for TPS6594 PMIC family on wakup I2C0 bus. Theses devices provides regulators (bucks and LDOs), but also GPIOs, a RTC, a watchdog, an ESM (Error Signal Monitor) which monitors the SoC error output signal, and a PFSM (Pre-configurable Finite State Machine) which manages the operational modes of the PMIC. Signed-off-by: Esteban Blanc Signed-off-by: Jai Luthra Signed-off-by: Neha Malcom Francis --- arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi | 161 ++++++++++++++++++++ 1 file changed, 161 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi b/arch/arm64/boot/= dts/ti/k3-j7200-som-p0.dtsi index 5a300d4c8ba0..327db681199c 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi @@ -127,6 +127,14 @@ J721E_WKUP_IOPAD(0x9c, PIN_INPUT_PULLUP, 0) /* (H21) W= KUP_I2C0_SDA */ }; }; =20 +&wkup_pmx3 { + pmic_irq_pins_default: pmic-irq-default-pins { + pinctrl-single,pins =3D < + J721E_WKUP_IOPAD(0x01c, PIN_INPUT, 7) /* (E18) WKUP_GPIO0_84 */ + >; + }; +}; + &main_pmx0 { main_i2c0_pins_default: main-i2c0-default-pins { pinctrl-single,pins =3D < @@ -255,6 +263,7 @@ exp_som: gpio@21 { }; =20 &wkup_i2c0 { + bootph-pre-ram; status =3D "okay"; pinctrl-names =3D "default"; pinctrl-0 =3D <&wkup_i2c0_pins_default>; @@ -264,6 +273,158 @@ eeprom@50 { compatible =3D "atmel,24c256"; reg =3D <0x50>; }; + + tps659414: pmic@48 { + compatible =3D "ti,tps6594-q1"; + reg =3D <0x48>; + ti,primary-pmic; + system-power-controller; + + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pmic_irq_pins_default>; + interrupt-parent =3D <&wkup_gpio0>; + interrupts =3D <84 IRQ_TYPE_EDGE_FALLING>; + + gpio-controller; + #gpio-cells =3D <2>; + + buck1-supply =3D <&vsys_3v3>; + buck2-supply =3D <&vsys_3v3>; + buck3-supply =3D <&vsys_3v3>; + buck4-supply =3D <&vsys_3v3>; + buck5-supply =3D <&vsys_3v3>; + ldo1-supply =3D <&vsys_3v3>; + ldo2-supply =3D <&vsys_3v3>; + ldo3-supply =3D <&vsys_3v3>; + ldo4-supply =3D <&vsys_3v3>; + + regulators { + bucka1: buck1 { + regulator-name =3D "vda_mcu_1v8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + bucka2: buck2 { + regulator-name =3D "vdd_mcuio_1v8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + bucka3: buck3 { + regulator-name =3D "vdd_mcu_0v85"; + regulator-min-microvolt =3D <850000>; + regulator-max-microvolt =3D <850000>; + regulator-boot-on; + regulator-always-on; + }; + + bucka4: buck4 { + regulator-name =3D "vdd_ddr_1v1"; + regulator-min-microvolt =3D <1100000>; + regulator-max-microvolt =3D <1100000>; + regulator-boot-on; + regulator-always-on; + }; + + bucka5: buck5 { + regulator-name =3D "vdd_phyio_1v8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + ldoa1: ldo1 { + regulator-name =3D "vdd1_lpddr4_1v8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + ldoa2: ldo2 { + regulator-name =3D "vda_dll_0v8"; + regulator-min-microvolt =3D <800000>; + regulator-max-microvolt =3D <800000>; + regulator-boot-on; + regulator-always-on; + }; + + ldoa3: ldo3 { + regulator-name =3D "vdd_wk_0v8"; + regulator-min-microvolt =3D <800000>; + regulator-max-microvolt =3D <800000>; + regulator-boot-on; + regulator-always-on; + }; + + ldoa4: ldo4 { + regulator-name =3D "vda_pll_1v8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; + + lp876441: pmic@4c { + bootph-pre-ram; + compatible =3D "ti,lp8764-q1"; + reg =3D <0x4c>; + system-power-controller; + interrupt-parent =3D <&wkup_gpio0>; + interrupts =3D <84 IRQ_TYPE_EDGE_FALLING>; + + gpio-controller; + #gpio-cells =3D <2>; + + buck1-supply =3D <&vsys_3v3>; + buck2-supply =3D <&vsys_3v3>; + buck3-supply =3D <&vsys_3v3>; + buck4-supply =3D <&vsys_3v3>; + + regulators: regulators { + bootph-pre-ram; + buckb1: buck1 { + bootph-pre-ram; + regulator-name =3D "vdd_cpu_avs"; + regulator-min-microvolt =3D <600000>; + regulator-max-microvolt =3D <900000>; + regulator-always-on; + regulator-boot-on; + }; + + buckb2: buck2 { + regulator-name =3D "vdd_ram_0v85"; + regulator-min-microvolt =3D <850000>; + regulator-max-microvolt =3D <850000>; + regulator-boot-on; + regulator-always-on; + }; + + buckb3: buck3 { + regulator-name =3D "vdd_core_0v85"; + regulator-min-microvolt =3D <850000>; + regulator-max-microvolt =3D <850000>; + regulator-boot-on; + regulator-always-on; + }; + + buckb4: buck4 { + regulator-name =3D "vdd_io_1v8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; }; =20 &ospi0 { --=20 2.34.1