From nobody Sun Dec 28 22:52:29 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5225FC4167B for ; Tue, 5 Dec 2023 01:27:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346247AbjLEB0w (ORCPT ); Mon, 4 Dec 2023 20:26:52 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48170 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1343885AbjLEB0p (ORCPT ); Mon, 4 Dec 2023 20:26:45 -0500 Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.100]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 90B5010F for ; Mon, 4 Dec 2023 17:26:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1701739611; x=1733275611; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=UMkeLFUpYAwPaBYnzxx/I6VFYpGlFn70X93po/+cGE0=; b=lqYLp0A4kNT760HrbdSo1KwKyMJ3G9KFKqYsAxfkMH5JUZ9XZ1slPe6w JTeAgHGnIGEyo0YZl1aaCB8gWxKiYyQFJ+La1l8rF3oy98kQChkehvaC5 8j6ByK7c+2r7Ls8ysl+BzFohww1iZnHM5nNh0T+XqQ2iL4gZExvRIU1V+ 2Ho/49FnS8X21wrzKZ963UDxSPGUwZrPjO4q/wZINQ9gVgNJd+9GZBi9q AHzOzsfAq8jg/9RCvl8wO3mWDTlP8SOlpNG2z3Bnq3uxypVzLE0gPteRr q7AHOfBRoSI/1X4BcDN35fJlgzMHgAMRDnujxfaJ77U4yIpXv+FX7806l Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10914"; a="460313355" X-IronPort-AV: E=Sophos;i="6.04,251,1695711600"; d="scan'208";a="460313355" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2023 17:26:51 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10914"; a="1102276279" X-IronPort-AV: E=Sophos;i="6.04,251,1695711600"; d="scan'208";a="1102276279" Received: from allen-box.sh.intel.com ([10.239.159.127]) by fmsmga005.fm.intel.com with ESMTP; 04 Dec 2023 17:26:49 -0800 From: Lu Baolu To: Joerg Roedel , Will Deacon , Robin Murphy , Jason Gunthorpe , Kevin Tian Cc: iommu@lists.linux.dev, linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH v2 4/6] iommu/vt-d: Remove 1:1 mappings from identity domain Date: Tue, 5 Dec 2023 09:22:01 +0800 Message-Id: <20231205012203.244584-5-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231205012203.244584-1-baolu.lu@linux.intel.com> References: <20231205012203.244584-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Older VT-d hardware implementations did not support pass-through translation mode. The iommu driver relied on a DMA domain with all physical memory addresses identically mapped to the same IOVA to simulate pass-through translation. This workaround is no longer necessary due to the evolution of iommu core. The core has introduced def_domain_type op, allowing the iommu driver to specify its capabilities. Additionally, the identity domain has become a static system domain with "never fail" attach semantics. Eliminate support for the 1:1 mapping domain on older hardware and removes the unused code that created the 1:1 page table. This paves a way for the implementation of a global static identity domain. Signed-off-by: Lu Baolu Suggested-by: Kevin Tian --- drivers/iommu/intel/iommu.c | 118 +++--------------------------------- 1 file changed, 10 insertions(+), 108 deletions(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 605cd1c52e95..7022cc183120 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -2146,29 +2146,10 @@ static bool dev_is_real_dma_subdevice(struct device= *dev) pci_real_dma_dev(to_pci_dev(dev)) !=3D to_pci_dev(dev); } =20 -static int iommu_domain_identity_map(struct dmar_domain *domain, - unsigned long first_vpfn, - unsigned long last_vpfn) -{ - /* - * RMRR range might have overlap with physical memory range, - * clear it first - */ - dma_pte_clear_range(domain, first_vpfn, last_vpfn); - - return __domain_mapping(domain, first_vpfn, - first_vpfn, last_vpfn - first_vpfn + 1, - DMA_PTE_READ|DMA_PTE_WRITE, GFP_KERNEL); -} - static int md_domain_init(struct dmar_domain *domain, int guest_width); =20 static int __init si_domain_init(int hw) { - struct dmar_rmrr_unit *rmrr; - struct device *dev; - int i, nid, ret; - si_domain =3D alloc_domain(IOMMU_DOMAIN_IDENTITY); if (!si_domain) return -EFAULT; @@ -2179,44 +2160,6 @@ static int __init si_domain_init(int hw) return -EFAULT; } =20 - if (hw) - return 0; - - for_each_online_node(nid) { - unsigned long start_pfn, end_pfn; - int i; - - for_each_mem_pfn_range(i, nid, &start_pfn, &end_pfn, NULL) { - ret =3D iommu_domain_identity_map(si_domain, - mm_to_dma_pfn_start(start_pfn), - mm_to_dma_pfn_end(end_pfn)); - if (ret) - return ret; - } - } - - /* - * Identity map the RMRRs so that devices with RMRRs could also use - * the si_domain. - */ - for_each_rmrr_units(rmrr) { - for_each_active_dev_scope(rmrr->devices, rmrr->devices_cnt, - i, dev) { - unsigned long long start =3D rmrr->base_address; - unsigned long long end =3D rmrr->end_address; - - if (WARN_ON(end < start || - end >> agaw_to_width(si_domain->agaw))) - continue; - - ret =3D iommu_domain_identity_map(si_domain, - mm_to_dma_pfn_start(start >> PAGE_SHIFT), - mm_to_dma_pfn_end(end >> PAGE_SHIFT)); - if (ret) - return ret; - } - } - return 0; } =20 @@ -2301,6 +2244,9 @@ static bool device_rmrr_is_relaxable(struct device *d= ev) */ static int device_def_domain_type(struct device *dev) { + struct device_domain_info *info =3D dev_iommu_priv_get(dev); + struct intel_iommu *iommu =3D info->iommu; + if (dev_is_pci(dev)) { struct pci_dev *pdev =3D to_pci_dev(dev); =20 @@ -2311,6 +2257,13 @@ static int device_def_domain_type(struct device *dev) return IOMMU_DOMAIN_IDENTITY; } =20 + /* + * Hardware does not support the passthrough translation mode. + * Always use a dynamaic mapping domain. + */ + if (!ecap_pass_through(iommu->ecap)) + return IOMMU_DOMAIN_DMA; + return 0; } =20 @@ -3301,52 +3254,6 @@ int dmar_iommu_notify_scope_dev(struct dmar_pci_noti= fy_info *info) return 0; } =20 -static int intel_iommu_memory_notifier(struct notifier_block *nb, - unsigned long val, void *v) -{ - struct memory_notify *mhp =3D v; - unsigned long start_vpfn =3D mm_to_dma_pfn_start(mhp->start_pfn); - unsigned long last_vpfn =3D mm_to_dma_pfn_end(mhp->start_pfn + - mhp->nr_pages - 1); - - switch (val) { - case MEM_GOING_ONLINE: - if (iommu_domain_identity_map(si_domain, - start_vpfn, last_vpfn)) { - pr_warn("Failed to build identity map for [%lx-%lx]\n", - start_vpfn, last_vpfn); - return NOTIFY_BAD; - } - break; - - case MEM_OFFLINE: - case MEM_CANCEL_ONLINE: - { - struct dmar_drhd_unit *drhd; - struct intel_iommu *iommu; - LIST_HEAD(freelist); - - domain_unmap(si_domain, start_vpfn, last_vpfn, &freelist); - - rcu_read_lock(); - for_each_active_iommu(iommu, drhd) - iommu_flush_iotlb_psi(iommu, si_domain, - start_vpfn, mhp->nr_pages, - list_empty(&freelist), 0); - rcu_read_unlock(); - put_pages_list(&freelist); - } - break; - } - - return NOTIFY_OK; -} - -static struct notifier_block intel_iommu_memory_nb =3D { - .notifier_call =3D intel_iommu_memory_notifier, - .priority =3D 0 -}; - static void intel_disable_iommus(void) { struct intel_iommu *iommu =3D NULL; @@ -3643,12 +3550,7 @@ int __init intel_iommu_init(void) =20 iommu_pmu_register(iommu); } - up_read(&dmar_global_lock); =20 - if (si_domain && !hw_pass_through) - register_memory_notifier(&intel_iommu_memory_nb); - - down_read(&dmar_global_lock); if (probe_acpi_namespace_devices()) pr_warn("ACPI name space devices didn't probe correctly\n"); =20 --=20 2.34.1