From nobody Sun Dec 28 23:13:31 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2BA82C4167B for ; Tue, 5 Dec 2023 00:46:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1376317AbjLEAqW (ORCPT ); Mon, 4 Dec 2023 19:46:22 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60356 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234800AbjLEApg (ORCPT ); Mon, 4 Dec 2023 19:45:36 -0500 Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.120]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9B6C310F for ; Mon, 4 Dec 2023 16:45:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1701737136; x=1733273136; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=7MgS2tz+eXb3t+LyzYLE/xkq/zAhJTq68EvRtEFLASY=; b=h/2DWoQWkX45VJv1byn7pMDOhmAtcyjOwYlZCxaBpH6PMXzcDZJgsNLR T18KJ6FZI8IXgdVMwJsRxwwwG71o6QeumVAxEKfArLN6MqCjQyw8pSYN+ Cajon8sbvSooktnuSkkugH4j0SAMP3VGQZgMfHaFkiwxstG/32qOSz4U4 Z1Q1khz4fVkCYNw47Sg5AY9U/PxY8xll7iHL0HPtcBPHgXhBtwllSA77o gKeSQKanOgFzi8XwlNNs3q2FWuNbl29rB7sum5Msm+DtdCHihY0ZZIKbz jpy8vzL/kW0D2Ev3PbZ+2AkFIAsBLy/QHuCv7Xmk0E55tjesqSEzTze0b g==; X-IronPort-AV: E=McAfee;i="6600,9927,10914"; a="392688715" X-IronPort-AV: E=Sophos;i="6.04,251,1695711600"; d="scan'208";a="392688715" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2023 16:45:35 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10914"; a="944067949" X-IronPort-AV: E=Sophos;i="6.04,251,1695711600"; d="scan'208";a="944067949" Received: from abijaz-mobl2.ger.corp.intel.com (HELO box.shutemov.name) ([10.252.61.240]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2023 16:45:30 -0800 Received: by box.shutemov.name (Postfix, from userid 1000) id 7E6FD10A448; Tue, 5 Dec 2023 03:45:20 +0300 (+03) From: "Kirill A. Shutemov" To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org Cc: "Rafael J. Wysocki" , Peter Zijlstra , Adrian Hunter , Kuppuswamy Sathyanarayanan , Elena Reshetova , Jun Nakajima , Rick Edgecombe , Tom Lendacky , "Kalra, Ashish" , Sean Christopherson , "Huang, Kai" , Baoquan He , kexec@lists.infradead.org, linux-coco@lists.linux.dev, linux-kernel@vger.kernel.org, "Kirill A. Shutemov" Subject: [PATCHv4 08/14] x86/mm: Return correct level from lookup_address() if pte is none Date: Tue, 5 Dec 2023 03:45:04 +0300 Message-ID: <20231205004510.27164-9-kirill.shutemov@linux.intel.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231205004510.27164-1-kirill.shutemov@linux.intel.com> References: <20231205004510.27164-1-kirill.shutemov@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" lookup_address() only returns correct page table level for the entry if the entry is not none. Make the helper to always return correct 'level'. It allows to implement iterator over kernel page tables using lookup_address(). Add one more entry into enum pg_level to indicate size of VA covered by one PGD entry in 5-level paging mode. Signed-off-by: Kirill A. Shutemov Reviewed-by: Rick Edgecombe --- arch/x86/include/asm/pgtable_types.h | 1 + arch/x86/mm/pat/set_memory.c | 8 ++++---- 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/arch/x86/include/asm/pgtable_types.h b/arch/x86/include/asm/pg= table_types.h index 0b748ee16b3d..3f648ffdfbe5 100644 --- a/arch/x86/include/asm/pgtable_types.h +++ b/arch/x86/include/asm/pgtable_types.h @@ -548,6 +548,7 @@ enum pg_level { PG_LEVEL_2M, PG_LEVEL_1G, PG_LEVEL_512G, + PG_LEVEL_256T, PG_LEVEL_NUM }; =20 diff --git a/arch/x86/mm/pat/set_memory.c b/arch/x86/mm/pat/set_memory.c index 6fbf22d5fa56..01f827eb8e80 100644 --- a/arch/x86/mm/pat/set_memory.c +++ b/arch/x86/mm/pat/set_memory.c @@ -666,32 +666,32 @@ pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned lon= g address, pud_t *pud; pmd_t *pmd; =20 - *level =3D PG_LEVEL_NONE; + *level =3D PG_LEVEL_256T; =20 if (pgd_none(*pgd)) return NULL; =20 + *level =3D PG_LEVEL_512G; p4d =3D p4d_offset(pgd, address); if (p4d_none(*p4d)) return NULL; =20 - *level =3D PG_LEVEL_512G; if (p4d_large(*p4d) || !p4d_present(*p4d)) return (pte_t *)p4d; =20 + *level =3D PG_LEVEL_1G; pud =3D pud_offset(p4d, address); if (pud_none(*pud)) return NULL; =20 - *level =3D PG_LEVEL_1G; if (pud_large(*pud) || !pud_present(*pud)) return (pte_t *)pud; =20 + *level =3D PG_LEVEL_2M; pmd =3D pmd_offset(pud, address); if (pmd_none(*pmd)) return NULL; =20 - *level =3D PG_LEVEL_2M; if (pmd_large(*pmd) || !pmd_present(*pmd)) return (pte_t *)pmd; =20 --=20 2.41.0