From nobody Sun Dec 28 22:52:56 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D5873C4167B for ; Mon, 4 Dec 2023 17:30:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234827AbjLDRaI (ORCPT ); Mon, 4 Dec 2023 12:30:08 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34104 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229485AbjLDRaH (ORCPT ); Mon, 4 Dec 2023 12:30:07 -0500 Received: from smtp-fw-80009.amazon.com (smtp-fw-80009.amazon.com [99.78.197.220]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2F5E583 for ; Mon, 4 Dec 2023 09:30:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1701711013; x=1733247013; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=fQvqyzhKNSpH75iOyv0njx6smvL8ePbeR9+sM58QB7c=; b=fHewXLSBvrBymwFtXRQxYOpue4DLbsCrrahQnan88K2/wAtI8egyQH+p 30DjARUDdHNXAmFsXQzX3xhsZkKlSt1RUBEuz7c+gub+M8UnMoVpYkOYo jqurDPvP7MIFgJsYQiwWkGjlQRZlkp3nWTeq3BfZsuTEnu0NTzmAQX7xa A=; X-IronPort-AV: E=Sophos;i="6.04,250,1695686400"; d="scan'208";a="48146294" Received: from pdx4-co-svc-p1-lb2-vlan2.amazon.com (HELO email-inbound-relay-iad-1e-m6i4x-7dc0ecf1.us-east-1.amazon.com) ([10.25.36.210]) by smtp-border-fw-80009.pdx80.corp.amazon.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2023 17:30:09 +0000 Received: from smtpout.prod.us-west-2.prod.farcaster.email.amazon.dev (iad7-ws-svc-p70-lb3-vlan2.iad.amazon.com [10.32.235.34]) by email-inbound-relay-iad-1e-m6i4x-7dc0ecf1.us-east-1.amazon.com (Postfix) with ESMTPS id 0A36F80E0A; Mon, 4 Dec 2023 17:30:04 +0000 (UTC) Received: from EX19MTAUWC001.ant.amazon.com [10.0.38.20:51872] by smtpin.naws.us-west-2.prod.farcaster.email.amazon.dev [10.0.8.2:2525] with esmtp (Farcaster) id 5544904f-6150-4258-b571-018841d91ae0; Mon, 4 Dec 2023 17:30:04 +0000 (UTC) X-Farcaster-Flow-ID: 5544904f-6150-4258-b571-018841d91ae0 Received: from EX19D037UWC002.ant.amazon.com (10.13.139.250) by EX19MTAUWC001.ant.amazon.com (10.250.64.174) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.39; Mon, 4 Dec 2023 17:30:03 +0000 Received: from EX19MTAUEB001.ant.amazon.com (10.252.135.35) by EX19D037UWC002.ant.amazon.com (10.13.139.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Mon, 4 Dec 2023 17:30:02 +0000 Received: from dev-dsk-jalliste-1c-e3349c3e.eu-west-1.amazon.com (10.13.244.142) by mail-relay.amazon.com (10.252.135.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.39 via Frontend Transport; Mon, 4 Dec 2023 17:30:01 +0000 From: Jack Allister To: , , , , , , CC: Jack Allister , Paul Durrant , Jue Wang , Usama Arif , , Hans de Goede , Peter Zijlstra , "Rafael J. Wysocki" , Subject: [PATCH] x86: intel_epb: Add earlyparam option to keep bias at performance Date: Mon, 4 Dec 2023 17:28:48 +0000 Message-ID: <20231204172849.18753-1-jalliste@amazon.com> X-Mailer: git-send-email 2.40.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" There are certain scenarios where it may be intentional that the EPB was set at to 0/ENERGY_PERF_BIAS_PERFORMANCE on kernel boot. For example, in data centers a kexec/live-update of the kernel may be performed regularly. Usually this live-update is time critical and defaulting of the bias back to ENERGY_PERF_BIAS_NORMAL may actually be detrimental to the overall update time if processors' time to ramp up/boost are affected. This patch introduces a kernel command line "intel_epb_keep_performance" which will leave the EPB at performance if during the restoration code path it is detected as such. Signed-off-by: Jack Allister Cc: Paul Durrant Cc: Jue Wang Cc: Usama Arif --- arch/x86/kernel/cpu/intel_epb.c | 19 ++++++++++++++++--- 1 file changed, 16 insertions(+), 3 deletions(-) diff --git a/arch/x86/kernel/cpu/intel_epb.c b/arch/x86/kernel/cpu/intel_ep= b.c index e4c3ba91321c..0c7dd092f723 100644 --- a/arch/x86/kernel/cpu/intel_epb.c +++ b/arch/x86/kernel/cpu/intel_epb.c @@ -50,7 +50,8 @@ * the OS will do that anyway. That sometimes is problematic, as it may c= ause * the system battery to drain too fast, for example, so it is better to a= djust * it on CPU bring-up and if the initial EPB value for a given CPU is 0, t= he - * kernel changes it to 6 ('normal'). + * kernel changes it to 6 ('normal'). This however is overridable via + * intel_epb_keep_performance if required. */ =20 static DEFINE_PER_CPU(u8, saved_epb); @@ -75,6 +76,8 @@ static u8 energ_perf_values[] =3D { [EPB_INDEX_POWERSAVE] =3D ENERGY_PERF_BIAS_POWERSAVE, }; =20 +static bool intel_epb_keep_performance __read_mostly; + static int intel_epb_save(void) { u64 epb; @@ -107,8 +110,12 @@ static void intel_epb_restore(void) */ val =3D epb & EPB_MASK; if (val =3D=3D ENERGY_PERF_BIAS_PERFORMANCE) { - val =3D energ_perf_values[EPB_INDEX_NORMAL]; - pr_warn_once("ENERGY_PERF_BIAS: Set to 'normal', was 'performance'\n"); + if (!intel_epb_keep_performance) { + val =3D energ_perf_values[EPB_INDEX_NORMAL]; + pr_warn_once("ENERGY_PERF_BIAS: Set to 'normal', was 'performance'\n"); + } else { + pr_warn_once("ENERGY_PERF_BIAS: Kept at 'performance', no change\n"); + } } } wrmsrl(MSR_IA32_ENERGY_PERF_BIAS, (epb & ~EPB_MASK) | val); @@ -213,6 +220,12 @@ static const struct x86_cpu_id intel_epb_normal[] =3D { {} }; =20 +static __init int intel_epb_keep_performance_setup(char *str) +{ + return kstrtobool(str, &intel_epb_keep_performance); +} +early_param("intel_epb_keep_performance", intel_epb_keep_performance_setup= ); + static __init int intel_epb_init(void) { const struct x86_cpu_id *id =3D x86_match_cpu(intel_epb_normal); --=20 2.40.1