From nobody Fri Dec 19 06:24:05 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 836CCC4167B for ; Mon, 4 Dec 2023 09:40:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235308AbjLDJkS (ORCPT ); Mon, 4 Dec 2023 04:40:18 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53842 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234916AbjLDJjx (ORCPT ); Mon, 4 Dec 2023 04:39:53 -0500 Received: from casper.infradead.org (casper.infradead.org [IPv6:2001:8b0:10b:1236::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E408D11A; Mon, 4 Dec 2023 01:39:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=Content-Type:MIME-Version:References: Subject:Cc:To:From:Date:Message-Id:Sender:Reply-To:Content-Transfer-Encoding: Content-ID:Content-Description:In-Reply-To; bh=hovFmglboAd1PTUKIc8q/eAFcPeS4SThi+Ejk6Ow87o=; b=HZt/sTRXVWWpY54+u0ELel8mQl r2VOv0Zmd6b7hGtm877EBapQsyIqKAEI7MecYEEXbV5Ci1995HCDmM71QGXQFpe68MDmbI8v6oMRQ C0C6R+H8/NModt5JmRNXzeYZNTMutMT55mv6lNr+H7a3EZU/O5HsQtQJWtgTV3FTXRTaMClSH/BAv bRj3WmOQHgh4kJ7ReCmzNKQrdl6XjcBLsmWaqXRWG6lUOGnaajRE7NneQR8vb8+WbN0dSItwfuG+R BaWzICX22woghbGQvQvFM1sHE6YD147/Na2aBwP4uHDzjoDzBG8zZevEoRjpAyFIxLwJuVjhpLD+4 OGzkgG2Q==; Received: from j130084.upc-j.chello.nl ([24.132.130.84] helo=noisy.programming.kicks-ass.net) by casper.infradead.org with esmtpsa (Exim 4.94.2 #2 (Red Hat Linux)) id 1rA5QZ-000X0b-6y; Mon, 04 Dec 2023 09:39:47 +0000 Received: by noisy.programming.kicks-ass.net (Postfix, from userid 0) id ABFC830198F; Mon, 4 Dec 2023 10:39:45 +0100 (CET) Message-Id: <20231204093732.323101886@infradead.org> User-Agent: quilt/0.65 Date: Mon, 04 Dec 2023 10:37:11 +0100 From: Peter Zijlstra To: Sean Christopherson , Paolo Bonzini , Josh Poimboeuf , Thomas Gleixner Cc: linux-kernel@vger.kernel.org, peterz@infradead.org, x86@kernel.org, kvm@vger.kernel.org Subject: [PATCH 09/11] x86/kvm/emulate: Implement test_cc() in C References: <20231204093702.989848513@infradead.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Current test_cc() uses the fastop infrastructure to test flags using SETcc instructions. However, int3_emulate_jcc() already fully implements the flags->CC mapping, use that. Removes a pile of gnarly asm. Signed-off-by: Peter Zijlstra (Intel) --- arch/x86/include/asm/text-patching.h | 20 +++++++++++++------- arch/x86/kvm/emulate.c | 34 ++----------------------------= ---- 2 files changed, 15 insertions(+), 39 deletions(-) --- a/arch/x86/include/asm/text-patching.h +++ b/arch/x86/include/asm/text-patching.h @@ -186,9 +186,9 @@ void int3_emulate_ret(struct pt_regs *re } =20 static __always_inline -void int3_emulate_jcc(struct pt_regs *regs, u8 cc, unsigned long ip, unsig= ned long disp) +bool __emulate_cc(unsigned long flags, u8 cc) { - static const unsigned long jcc_mask[6] =3D { + static const unsigned long cc_mask[6] =3D { [0] =3D X86_EFLAGS_OF, [1] =3D X86_EFLAGS_CF, [2] =3D X86_EFLAGS_ZF, @@ -201,15 +201,21 @@ void int3_emulate_jcc(struct pt_regs *re bool match; =20 if (cc < 0xc) { - match =3D regs->flags & jcc_mask[cc >> 1]; + match =3D flags & cc_mask[cc >> 1]; } else { - match =3D ((regs->flags & X86_EFLAGS_SF) >> X86_EFLAGS_SF_BIT) ^ - ((regs->flags & X86_EFLAGS_OF) >> X86_EFLAGS_OF_BIT); + match =3D ((flags & X86_EFLAGS_SF) >> X86_EFLAGS_SF_BIT) ^ + ((flags & X86_EFLAGS_OF) >> X86_EFLAGS_OF_BIT); if (cc >=3D 0xe) - match =3D match || (regs->flags & X86_EFLAGS_ZF); + match =3D match || (flags & X86_EFLAGS_ZF); } =20 - if ((match && !invert) || (!match && invert)) + return (match && !invert) || (!match && invert); +} + +static __always_inline +void int3_emulate_jcc(struct pt_regs *regs, u8 cc, unsigned long ip, unsig= ned long disp) +{ + if (__emulate_cc(regs->flags, cc)) ip +=3D disp; =20 int3_emulate_jmp(regs, ip); --- a/arch/x86/kvm/emulate.c +++ b/arch/x86/kvm/emulate.c @@ -26,6 +26,7 @@ #include #include #include +#include =20 #include "x86.h" #include "tss.h" @@ -416,31 +417,6 @@ static int fastop(struct x86_emulate_ctx ON64(FOP3E(op##q, rax, rdx, cl)) \ FOP_END =20 -/* Special case for SETcc - 1 instruction per cc */ -#define FOP_SETCC(op) \ - FOP_FUNC(op) \ - #op " %al \n\t" \ - FOP_RET(op) - -FOP_START(setcc) -FOP_SETCC(seto) -FOP_SETCC(setno) -FOP_SETCC(setc) -FOP_SETCC(setnc) -FOP_SETCC(setz) -FOP_SETCC(setnz) -FOP_SETCC(setbe) -FOP_SETCC(setnbe) -FOP_SETCC(sets) -FOP_SETCC(setns) -FOP_SETCC(setp) -FOP_SETCC(setnp) -FOP_SETCC(setl) -FOP_SETCC(setnl) -FOP_SETCC(setle) -FOP_SETCC(setnle) -FOP_END; - FOP_START(salc) FOP_FUNC(salc) "pushf; sbb %al, %al; popf \n\t" @@ -1063,13 +1039,7 @@ static int em_bsr_c(struct x86_emulate_c =20 static __always_inline u8 test_cc(unsigned int condition, unsigned long fl= ags) { - u8 rc; - void (*fop)(void) =3D (void *)em_setcc + FASTOP_SIZE * (condition & 0xf); - - flags =3D (flags & EFLAGS_MASK) | X86_EFLAGS_IF; - asm("push %[flags]; popf; " CALL_NOSPEC - : "=3Da"(rc) : [thunk_target]"r"(fop), [flags]"r"(flags)); - return rc; + return __emulate_cc(flags, condition & 0xf); } =20 static void fetch_register_operand(struct operand *op)