From nobody Mon Dec 29 00:46:05 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 04C32C46CA0 for ; Mon, 4 Dec 2023 06:50:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234541AbjLDGuD (ORCPT ); Mon, 4 Dec 2023 01:50:03 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53644 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229446AbjLDGuB (ORCPT ); Mon, 4 Dec 2023 01:50:01 -0500 Received: from SHSQR01.spreadtrum.com (mx1.unisoc.com [222.66.158.135]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 991FCD3; Sun, 3 Dec 2023 22:50:06 -0800 (PST) Received: from dlp.unisoc.com ([10.29.3.86]) by SHSQR01.spreadtrum.com with ESMTP id 3B46niDT069714; Mon, 4 Dec 2023 14:49:44 +0800 (+08) (envelope-from Wenchao.Chen@unisoc.com) Received: from SHDLP.spreadtrum.com (shmbx05.spreadtrum.com [10.29.1.56]) by dlp.unisoc.com (SkyGuard) with ESMTPS id 4SkDf83GJWz2Nr542; Mon, 4 Dec 2023 14:44:00 +0800 (CST) Received: from xm9614pcu.spreadtrum.com (10.13.2.29) by shmbx05.spreadtrum.com (10.29.1.56) with Microsoft SMTP Server (TLS) id 15.0.1497.23; Mon, 4 Dec 2023 14:49:43 +0800 From: Wenchao Chen To: , , , CC: , , , , , Wenchao Chen Subject: [PATCH] mmc: sprd: Fix eMMC init failure after hw reset Date: Mon, 4 Dec 2023 14:49:34 +0800 Message-ID: <20231204064934.21236-1-wenchao.chen@unisoc.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-Originating-IP: [10.13.2.29] X-ClientProxiedBy: SHCAS03.spreadtrum.com (10.0.1.207) To shmbx05.spreadtrum.com (10.29.1.56) X-MAIL: SHSQR01.spreadtrum.com 3B46niDT069714 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Some eMMC devices that do not close the auto clk gate after hw reset will cause eMMC initialization to fail. Signed-off-by: Wenchao Chen Reviewed-by: Baolin Wang --- drivers/mmc/host/sdhci-sprd.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/host/sdhci-sprd.c b/drivers/mmc/host/sdhci-sprd.c index 6b8a57e2d20f..bed57a1c64b5 100644 --- a/drivers/mmc/host/sdhci-sprd.c +++ b/drivers/mmc/host/sdhci-sprd.c @@ -239,15 +239,19 @@ static inline void _sdhci_sprd_set_clock(struct sdhci= _host *host, div =3D ((div & 0x300) >> 2) | ((div & 0xFF) << 8); sdhci_enable_clk(host, div); =20 + val =3D sdhci_readl(host, SDHCI_SPRD_REG_32_BUSY_POSI); + mask =3D SDHCI_SPRD_BIT_OUTR_CLK_AUTO_EN | SDHCI_SPRD_BIT_INNR_CLK_AUTO_E= N; /* Enable CLK_AUTO when the clock is greater than 400K. */ if (clk > 400000) { - val =3D sdhci_readl(host, SDHCI_SPRD_REG_32_BUSY_POSI); - mask =3D SDHCI_SPRD_BIT_OUTR_CLK_AUTO_EN | - SDHCI_SPRD_BIT_INNR_CLK_AUTO_EN; if (mask !=3D (val & mask)) { val |=3D mask; sdhci_writel(host, val, SDHCI_SPRD_REG_32_BUSY_POSI); } + } else { + if (val & mask) { + val &=3D ~mask; + sdhci_writel(host, val, SDHCI_SPRD_REG_32_BUSY_POSI); + } } } =20 --=20 2.17.1