From nobody Thu Dec 18 15:57:12 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BC883C4167B for ; Sat, 2 Dec 2023 00:05:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1442077AbjLBAFs (ORCPT ); Fri, 1 Dec 2023 19:05:48 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33520 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1441957AbjLBAFL (ORCPT ); Fri, 1 Dec 2023 19:05:11 -0500 Received: from mail-pg1-x549.google.com (mail-pg1-x549.google.com [IPv6:2607:f8b0:4864:20::549]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BE18F1FEA for ; Fri, 1 Dec 2023 16:04:55 -0800 (PST) Received: by mail-pg1-x549.google.com with SMTP id 41be03b00d2f7-5c659339436so240174a12.2 for ; Fri, 01 Dec 2023 16:04:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1701475495; x=1702080295; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=9B5cHYHsO/AzGEl7cfGpYxbYZ6NrjTMlAyuJ5Jsh6Yk=; b=IXZudWNwhb0tqoh2IqkSANdeC0bd2AN15E9DGOiPY8FdTG7OZL0dS1TWow0LJPKu28 13bN5F+p7foMzYujYCe7Qy9zzoferUF3iw9lJRuhVYbXZK2yAKckvY5fLK8/6gSPC/SK tQjj5UlQx5r9eC71oH782g6oLjb/NwGJmYmVBPzXfMnqM7BgJREL2YDr1RUBRqPOoNJF vKoEmXaMoKKpEFxHiR808VM+ETpOhuVTixxQinAskVBXVd+N8ZqZu7a3KiUd3BlQiI8h SUqtMIEo2o+eisGZR7I5PdKPnjyLBEKL00g9T9ysAW2cYEHt/O6FsS02GqPS37Bi5SXS cuCA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1701475495; x=1702080295; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=9B5cHYHsO/AzGEl7cfGpYxbYZ6NrjTMlAyuJ5Jsh6Yk=; b=FoyfEdbjXJY3zAL58JGr/jSpd08e0eowClSamLXVuXxRnETSCbPoAedzL3vbysOAS3 S0axxmYhooQ55mCQRf13I99rcdqrW5BNydhR60GlRVFKFVT+w8VPh4/felEQgZn+cD48 DMr13X5zuxQruvcTBLBRTqt7exLYmjcKZqDQPIgppoJSihhgjBzyvmxmHaBbmFY7y7S0 Mu0lH3Rgyh3BhyCQMoDbALp9wihTUz5vvTeaAI2cPvWDkocoB+Ojl2tAnQVlRGbU6yCh Boxt03xtEvm6OzaPYqcbC57BUJoUZV9XcRtZg8KbLECRlAHkuVi87X1ziWHLpXbOySfz t0EA== X-Gm-Message-State: AOJu0YzewFh5XaGpD7gxXLD9FV/fL1sP6q+p8jRpS10D1LUBKWYtivjp Wm9ZDEHCRkz7RfSLTaM/QoZxS8frCI8= X-Google-Smtp-Source: AGHT+IEcivIyX0212n9vkEMtVZI9Ts+J4UfitLQGxh5REa77Qq4Qur/zm4h12/CO860MMNMfhQPcLoqexpU= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a63:6909:0:b0:5bd:85b1:da18 with SMTP id e9-20020a636909000000b005bd85b1da18mr3740401pgc.11.1701475495031; Fri, 01 Dec 2023 16:04:55 -0800 (PST) Reply-To: Sean Christopherson Date: Fri, 1 Dec 2023 16:04:07 -0800 In-Reply-To: <20231202000417.922113-1-seanjc@google.com> Mime-Version: 1.0 References: <20231202000417.922113-1-seanjc@google.com> X-Mailer: git-send-email 2.43.0.rc2.451.g8631bc7472-goog Message-ID: <20231202000417.922113-19-seanjc@google.com> Subject: [PATCH v9 18/28] KVM: selftests: Test consistency of CPUID with num of fixed counters From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jim Mattson , Jinrong Liang , Aaron Lewis , Like Xu Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Jinrong Liang Extend the PMU counters test to verify KVM emulation of fixed counters in addition to general purpose counters. Fixed counters add an extra wrinkle in the form of an extra supported bitmask. Thus quoth the SDM: fixed-function performance counter 'i' is supported if ECX[i] || (EDX[4:0= ] > i) Test that KVM handles a counter being available through either method. Reviewed-by: Dapeng Mi Co-developed-by: Like Xu Signed-off-by: Like Xu Signed-off-by: Jinrong Liang Co-developed-by: Sean Christopherson Signed-off-by: Sean Christopherson --- .../selftests/kvm/x86_64/pmu_counters_test.c | 60 ++++++++++++++++++- 1 file changed, 57 insertions(+), 3 deletions(-) diff --git a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c b/tools= /testing/selftests/kvm/x86_64/pmu_counters_test.c index 863418842ef8..b07294af71a3 100644 --- a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c +++ b/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c @@ -290,7 +290,7 @@ __GUEST_ASSERT(expect_gp ? vector =3D=3D GP_VECTOR : !v= ector, \ msr, expected_val, val); =20 static void guest_rd_wr_counters(uint32_t base_msr, uint8_t nr_possible_co= unters, - uint8_t nr_counters) + uint8_t nr_counters, uint32_t or_mask) { uint8_t i; =20 @@ -301,7 +301,13 @@ static void guest_rd_wr_counters(uint32_t base_msr, ui= nt8_t nr_possible_counters */ const uint64_t test_val =3D 0xffff; const uint32_t msr =3D base_msr + i; - const bool expect_success =3D i < nr_counters; + + /* + * Fixed counters are supported if the counter is less than the + * number of enumerated contiguous counters *or* the counter is + * explicitly enumerated in the supported counters mask. + */ + const bool expect_success =3D i < nr_counters || (or_mask & BIT(i)); =20 /* * KVM drops writes to MSR_P6_PERFCTR[0|1] if the counters are @@ -343,7 +349,7 @@ static void guest_test_gp_counters(void) else base_msr =3D MSR_IA32_PERFCTR0; =20 - guest_rd_wr_counters(base_msr, MAX_NR_GP_COUNTERS, nr_gp_counters); + guest_rd_wr_counters(base_msr, MAX_NR_GP_COUNTERS, nr_gp_counters, 0); } =20 static void test_gp_counters(uint8_t pmu_version, uint64_t perf_capabiliti= es, @@ -363,9 +369,50 @@ static void test_gp_counters(uint8_t pmu_version, uint= 64_t perf_capabilities, kvm_vm_free(vm); } =20 +static void guest_test_fixed_counters(void) +{ + uint64_t supported_bitmask =3D 0; + uint8_t nr_fixed_counters =3D 0; + + /* Fixed counters require Architectural vPMU Version 2+. */ + if (guest_get_pmu_version() >=3D 2) + nr_fixed_counters =3D this_cpu_property(X86_PROPERTY_PMU_NR_FIXED_COUNTE= RS); + + /* + * The supported bitmask for fixed counters was introduced in PMU + * version 5. + */ + if (guest_get_pmu_version() >=3D 5) + supported_bitmask =3D this_cpu_property(X86_PROPERTY_PMU_FIXED_COUNTERS_= BITMASK); + + guest_rd_wr_counters(MSR_CORE_PERF_FIXED_CTR0, MAX_NR_FIXED_COUNTERS, + nr_fixed_counters, supported_bitmask); +} + +static void test_fixed_counters(uint8_t pmu_version, uint64_t perf_capabil= ities, + uint8_t nr_fixed_counters, + uint32_t supported_bitmask) +{ + struct kvm_vcpu *vcpu; + struct kvm_vm *vm; + + vm =3D pmu_vm_create_with_one_vcpu(&vcpu, guest_test_fixed_counters, + pmu_version, perf_capabilities); + + vcpu_set_cpuid_property(vcpu, X86_PROPERTY_PMU_FIXED_COUNTERS_BITMASK, + supported_bitmask); + vcpu_set_cpuid_property(vcpu, X86_PROPERTY_PMU_NR_FIXED_COUNTERS, + nr_fixed_counters); + + run_vcpu(vcpu); + + kvm_vm_free(vm); +} + static void test_intel_counters(void) { uint8_t nr_arch_events =3D kvm_cpu_property(X86_PROPERTY_PMU_EBX_BIT_VECT= OR_LENGTH); + uint8_t nr_fixed_counters =3D kvm_cpu_property(X86_PROPERTY_PMU_NR_FIXED_= COUNTERS); uint8_t nr_gp_counters =3D kvm_cpu_property(X86_PROPERTY_PMU_NR_GP_COUNTE= RS); uint8_t pmu_version =3D kvm_cpu_property(X86_PROPERTY_PMU_VERSION); unsigned int i; @@ -435,6 +482,13 @@ static void test_intel_counters(void) v, perf_caps[i]); for (j =3D 0; j <=3D nr_gp_counters; j++) test_gp_counters(v, perf_caps[i], j); + + pr_info("Testing fixed counters, PMU version %u, perf_caps =3D %lx\n", + v, perf_caps[i]); + for (j =3D 0; j <=3D nr_fixed_counters; j++) { + for (k =3D 0; k <=3D (BIT(nr_fixed_counters) - 1); k++) + test_fixed_counters(v, perf_caps[i], j, k); + } } } } --=20 2.43.0.rc2.451.g8631bc7472-goog