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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by SN1PEPF000252A3.mail.protection.outlook.com (10.167.242.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7046.17 via Frontend Transport; Fri, 1 Dec 2023 00:57:47 +0000 Received: from bmoger-ubuntu.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.34; Thu, 30 Nov 2023 18:57:45 -0600 From: Babu Moger To: , , , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH 12/15] x86/resctrl: Introduce mbm_total_cfg and mbm_local_cfg Date: Thu, 30 Nov 2023 18:57:17 -0600 Message-ID: <20231201005720.235639-13-babu.moger@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231201005720.235639-1-babu.moger@amd.com> References: <20231201005720.235639-1-babu.moger@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF000252A3:EE_|BL1PR12MB5779:EE_ X-MS-Office365-Filtering-Correlation-Id: 8d5040c0-431a-440f-6d24-08dbf2088917 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Dec 2023 00:57:47.6106 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8d5040c0-431a-440f-6d24-08dbf2088917 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF000252A3.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL1PR12MB5779 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" If the BMEC (Bandwidth Monitoring Event Configuration) feature is supported, the bandwidth events can be configured. The event configuration is domain specific. ABMC (Assignable Bandwidth Monitoring Counters) feature needs the event configuration information to assign the hardware counters. Save the event configuration information in the rdt_hw_domain, so it can be used for ABMC assignment. Signed-off-by: Babu Moger --- arch/x86/kernel/cpu/resctrl/core.c | 2 ++ arch/x86/kernel/cpu/resctrl/internal.h | 3 +++ arch/x86/kernel/cpu/resctrl/monitor.c | 11 +++++++++++ arch/x86/kernel/cpu/resctrl/rdtgroup.c | 11 +++++++++++ 4 files changed, 27 insertions(+) diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resct= rl/core.c index 278698a74c49..5ac9991e81bc 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -556,6 +556,8 @@ static void domain_add_cpu(int cpu, struct rdt_resource= *r) return; } =20 + arch_domain_mbm_evt_config(hw_dom); + list_add_tail(&d->list, add_pos); =20 err =3D resctrl_online_domain(r, d); diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/r= esctrl/internal.h index ca4b551dc808..bc1756a596f0 100644 --- a/arch/x86/kernel/cpu/resctrl/internal.h +++ b/arch/x86/kernel/cpu/resctrl/internal.h @@ -346,6 +346,8 @@ struct rdt_hw_domain { u32 *ctrl_val; struct arch_mbm_state *arch_mbm_total; struct arch_mbm_state *arch_mbm_local; + u32 mbm_total_cfg; + u32 mbm_local_cfg; }; =20 static inline struct rdt_hw_domain *resctrl_to_arch_dom(struct rdt_domain = *r) @@ -605,5 +607,6 @@ void rdt_domain_reconfigure_cdp(struct rdt_resource *r); void __init thread_throttle_mode_init(void); void __init mbm_config_rftype_init(const char *config); void rdt_staged_configs_clear(void); +void arch_domain_mbm_evt_config(struct rdt_hw_domain *hw_dom); =20 #endif /* _ASM_X86_RESCTRL_INTERNAL_H */ diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/re= sctrl/monitor.c index c611b16ba259..34d3b0c7f2c6 100644 --- a/arch/x86/kernel/cpu/resctrl/monitor.c +++ b/arch/x86/kernel/cpu/resctrl/monitor.c @@ -854,3 +854,14 @@ void __init intel_rdt_mbm_apply_quirk(void) mbm_cf_rmidthreshold =3D mbm_cf_table[cf_index].rmidthreshold; mbm_cf =3D mbm_cf_table[cf_index].cf; } + +void arch_domain_mbm_evt_config(struct rdt_hw_domain *hw_dom) +{ + if (mbm_total_event.configurable) + hw_dom->mbm_total_cfg =3D resctrl_max_evt_bitmask; + + if (mbm_local_event.configurable) + hw_dom->mbm_local_cfg =3D READS_TO_LOCAL_MEM | + NON_TEMP_WRITE_TO_LOCAL_MEM | + READS_TO_LOCAL_S_MEM; +} diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/r= esctrl/rdtgroup.c index f72d6d8c12df..047aea628e2e 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -1667,6 +1667,7 @@ static void mon_event_config_write(void *info) static int mbm_config_write_domain(struct rdt_resource *r, struct rdt_domain *d, u32 evtid, u32 val) { + struct rdt_hw_domain *hw_dom =3D resctrl_to_arch_dom(d); struct mon_config_info mon_info =3D {0}; int ret =3D 0; =20 @@ -1696,6 +1697,16 @@ static int mbm_config_write_domain(struct rdt_resour= ce *r, smp_call_function_any(&d->cpu_mask, mon_event_config_write, &mon_info, 1); =20 + /* + * Update event config value in the domain when user changes it. + */ + if (evtid =3D=3D QOS_L3_MBM_TOTAL_EVENT_ID) + hw_dom->mbm_total_cfg =3D val; + else if (evtid =3D=3D QOS_L3_MBM_LOCAL_EVENT_ID) + hw_dom->mbm_local_cfg =3D val; + else + goto out; + /* * When an Event Configuration is changed, the bandwidth counters * for all RMIDs and Events will be cleared by the hardware. The --=20 2.34.1