From nobody Wed Dec 17 10:58:40 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7B476C4167B for ; Fri, 1 Dec 2023 05:10:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1377477AbjLAFKJ (ORCPT ); Fri, 1 Dec 2023 00:10:09 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36000 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1377396AbjLAFJy (ORCPT ); Fri, 1 Dec 2023 00:09:54 -0500 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 082C51724; Thu, 30 Nov 2023 21:10:00 -0800 (PST) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 3B159mO5049913; Thu, 30 Nov 2023 23:09:48 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1701407388; bh=6ItgAaMkCxt60XJc1WHuFhFNITAxxpb0vOwKj0LoWdI=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=O5dHj2eU8ymR8pMM2OFKbPWglEZ1HcaHCpqVQBriKN1NuKh9/oPn6SAySGZN8tKv6 zJaXU3BcBhiNO+QbzXdeR8cTrKQN6UBoXNbule3aDfmG/LQ/dAbtHDJNAUOoNindrw 7X1Dv4wzL/saF9yFufLesb9LCNAtAhnj6Dsnf4gg= Received: from DLEE110.ent.ti.com (dlee110.ent.ti.com [157.170.170.21]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 3B159m2p101906 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 30 Nov 2023 23:09:48 -0600 Received: from DLEE107.ent.ti.com (157.170.170.37) by DLEE110.ent.ti.com (157.170.170.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Thu, 30 Nov 2023 23:09:47 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 30 Nov 2023 23:09:48 -0600 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 3B159ldW023598; Thu, 30 Nov 2023 23:09:47 -0600 From: Jai Luthra To: Catalin Marinas , Will Deacon , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: Jai Luthra , , , , Aradhya Bhatia , Devarsh Thakkar , Vaishnav Achath , Julien Massot , Martyn Welch , Matthias Schiffer Subject: [PATCH RESEND v3 3/9] arm64: dts: ti: Enable CSI-RX on AM62A Date: Fri, 1 Dec 2023 10:39:18 +0530 Message-ID: <20231201-csi_dts-v3-3-9f06f31080fe@ti.com> X-Mailer: git-send-email 2.42.1 In-Reply-To: <20231201-csi_dts-v3-0-9f06f31080fe@ti.com> References: <20231201-csi_dts-v3-0-9f06f31080fe@ti.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=3544; i=j-luthra@ti.com; h=from:subject:message-id; bh=UdyZV1rZtSB6XPR1HDnodj8ZtnvMZqzU69UiUMbOr4Y=; b=owEBbQKS/ZANAwAIAUPekfkkmnFFAcsmYgBlaWXqkHU63MRWNdEE0pJJpyGiJT+nsYCBSDFxh kBPdMzuLcuJAjMEAAEIAB0WIQRN4NgY5dV16NRar8VD3pH5JJpxRQUCZWll6gAKCRBD3pH5JJpx RfWRD/oCHu+epO3boPy2mt0/GhYJPIHCqb7rbd87iyocx9tHJ6CU06gfvLNLreCNxSDwwtruAC+ mlJEqzWycW3M3Ne5eKVT6YzzdDyUVP8xtSq6iw67Bvv8qt0qeRopgdXDk0sHL8HOBf2QYkIoG3e kveHAVKsXv55LbDCVVWHKAw/RH0/vct/T6UjDIrlDGg+9Lq/pwJewD51hl7kdQBVrjS5RfEnDvM 1YifkpQ0VAmp8FgyAble+p1hUZzla4j4CY/BK4TDsl0kGgRQRDiVFq94ZqzshZBLdCqxduUeXS1 vswO7rI+jGEqmMHyxr/kVDBV8EpfAyxajJKjgAkYQcfAny5wen9YHUsrEh21Wss30lG9YsAeJpE zh1Ol9NtF4jBXsTmd1YTVFMNbSAGP7csGZvg8mi+/edtefqIhpcniVXcyudGZIexCxCBM0hEbbq Gk6LJzYEsfM4RqnvNk9UqoBGFaM4UGduCCui07lipz9BjNo+NsUlhk52kdyoQsXAl/rtCGLsEiY UY3/uzVxhBg2zwaNJXaqNbSZ0dYyv97UXXTsipAHQU/j1zBr71UUmykwYCpfE23NDd0FIPDkomu Mg43I+F0V8ypr3ByavTsU1hnKexGAFZkLNCLa3ZGsRMK7bz4VJbFy1Hqq41/V2T4maXibSEQMqD hMHKArkk/vKS6jQ== X-Developer-Key: i=j-luthra@ti.com; a=openpgp; fpr=4DE0D818E5D575E8D45AAFC543DE91F9249A7145 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add nodes for Cadence DPHY, CSI2RX and TI's pixel-grabbing wrapper. AM62A uses a dedicated BCDMA instance for CSI-RX traffic, so enable that as well. Signed-off-by: Jai Luthra --- arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 99 +++++++++++++++++++++++++++= ++++ 1 file changed, 99 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dt= s/ti/k3-am62a-main.dtsi index 4ae7fdc5221b..ea70d78eb132 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi @@ -144,6 +144,44 @@ main_pktdma: dma-controller@485c0000 { }; }; =20 + dmss_csi: bus@4e000000 { + compatible =3D "simple-bus"; + #address-cells =3D <2>; + #size-cells =3D <2>; + dma-ranges; + ranges =3D <0x00 0x4e000000 0x00 0x4e000000 0x00 0x300000>; + + ti,sci-dev-id =3D <198>; + + inta_main_dmss_csi: interrupt-controller@4e0a0000 { + compatible =3D "ti,sci-inta"; + reg =3D <0x00 0x4e0a0000 0x00 0x8000>; + #interrupt-cells =3D <0>; + interrupt-controller; + interrupt-parent =3D <&gic500>; + msi-controller; + ti,sci =3D <&dmsc>; + ti,sci-dev-id =3D <200>; + ti,interrupt-ranges =3D <0 237 8>; + ti,unmapped-event-sources =3D <&main_bcdma_csi>; + power-domains =3D <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>; + }; + + main_bcdma_csi: dma-controller@4e230000 { + compatible =3D "ti,am62a-dmss-bcdma-csirx"; + reg =3D <0x00 0x4e230000 0x00 0x100>, + <0x00 0x4e180000 0x00 0x8000>, + <0x00 0x4e100000 0x00 0x10000>; + reg-names =3D "gcfg", "rchanrt", "ringrt"; + msi-parent =3D <&inta_main_dmss_csi>; + #dma-cells =3D <3>; + ti,sci =3D <&dmsc>; + ti,sci-dev-id =3D <199>; + ti,sci-rm-range-rchan =3D <0x21>; + power-domains =3D <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>; + }; + }; + dmsc: system-controller@44043000 { compatible =3D "ti,k2g-sci"; reg =3D <0x00 0x44043000 0x00 0xfe0>; @@ -876,4 +914,65 @@ mcasp2: audio-controller@2b20000 { power-domains =3D <&k3_pds 192 TI_SCI_PD_EXCLUSIVE>; status =3D "disabled"; }; + + ti_csi2rx0: ticsi2rx@30102000 { + compatible =3D "ti,j721e-csi2rx-shim"; + dmas =3D <&main_bcdma_csi 0 0x5000 0>; + dma-names =3D "rx0"; + reg =3D <0x00 0x30102000 0x00 0x1000>; + power-domains =3D <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>; + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + status =3D "disabled"; + + cdns_csi2rx0: csi-bridge@30101000 { + compatible =3D "ti,j721e-csi2rx", "cdns,csi2rx"; + reg =3D <0x00 0x30101000 0x00 0x1000>; + clocks =3D <&k3_clks 182 0>, <&k3_clks 182 3>, <&k3_clks 182 0>, + <&k3_clks 182 0>, <&k3_clks 182 4>, <&k3_clks 182 4>; + clock-names =3D "sys_clk", "p_clk", "pixel_if0_clk", + "pixel_if1_clk", "pixel_if2_clk", "pixel_if3_clk"; + phys =3D <&dphy0>; + phy-names =3D "dphy"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + csi0_port0: port@0 { + reg =3D <0>; + status =3D "disabled"; + }; + + csi0_port1: port@1 { + reg =3D <1>; + status =3D "disabled"; + }; + + csi0_port2: port@2 { + reg =3D <2>; + status =3D "disabled"; + }; + + csi0_port3: port@3 { + reg =3D <3>; + status =3D "disabled"; + }; + + csi0_port4: port@4 { + reg =3D <4>; + status =3D "disabled"; + }; + }; + }; + }; + + dphy0: phy@30110000 { + compatible =3D "cdns,dphy-rx"; + reg =3D <0x00 0x30110000 0x00 0x1100>; + #phy-cells =3D <0>; + power-domains =3D <&k3_pds 185 TI_SCI_PD_EXCLUSIVE>; + status =3D "disabled"; + }; }; --=20 2.42.1