From nobody Wed Dec 17 02:40:36 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7DE81C4167B for ; Thu, 30 Nov 2023 14:17:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345908AbjK3ORq (ORCPT ); Thu, 30 Nov 2023 09:17:46 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36272 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346013AbjK3ORZ (ORCPT ); Thu, 30 Nov 2023 09:17:25 -0500 Received: from mail-ej1-x636.google.com (mail-ej1-x636.google.com [IPv6:2a00:1450:4864:20::636]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4AB5910F1 for ; Thu, 30 Nov 2023 06:17:26 -0800 (PST) Received: by mail-ej1-x636.google.com with SMTP id a640c23a62f3a-a184d717de1so129852666b.1 for ; Thu, 30 Nov 2023 06:17:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1701353844; x=1701958644; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=iBSFE7wuI7cWsbY7avwQ/zjrbx0wxDJgM1FTWZ+ONNg=; b=Tj33q3QABZ2VzTJ3oWBHaK8gbim+vAhTADIPq2Y5tgrtEVtAE5GqS/MJButdjgq9+6 N7nJd9fOpC6NIn1eu9yyspBoYNVkNrMhZiB2NXB+dHoTmpMOPZztrZgyeYmQ0tu2n8c1 iTsfhR7CSxF/kgoPSuVLadEMy7yRH3MZvDMb4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1701353844; x=1701958644; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=iBSFE7wuI7cWsbY7avwQ/zjrbx0wxDJgM1FTWZ+ONNg=; b=Co+YMKRLaSmHh1pD7rSLI9orAdyVRYFDQX1i/oON8hr/DvzyTpI6oHvIqiWvXf4pYR DgPIJgv2/MPvYykXU+On/ArZNKTK25IvbH+gD0zNK8o0OsiWxUzuYAtQqvTe2caLEX6s uCJDH7VXOmpiYkeIViGbffA0zk6AJLUW1cjV7j7218UTt56BUT7kf7dEWJ59+1+1gB9b YAP/pvXRahNmgXh9pVvDt1p9KOHjGmvTmS3J1NH55UGYS+eDSt3kwTSnvaWCOSLqiK+u Y2EMpXmaqumZAEw0wblo+8v51RkNXF4P7W53sQloNEunEM+Y1RQpAMRpCGQsiynSTwEs JeuQ== X-Gm-Message-State: AOJu0YxsIZkexv+Wq1zzvlLp9SFianYhG2H8lzzstH9m5Y9FOxQ52br9 70qA6H0RlJWyY5laMYVEKpBv4HYXw2Wi9YC539nd2Q== X-Google-Smtp-Source: AGHT+IHz7spudw42nkbxasdPGKducH2EaycjcPe0EiTwDsK/JvOdSLLoN3ppXS1JF2nFzgDFYv4MNg== X-Received: by 2002:a17:906:194f:b0:a04:3f97:f3f1 with SMTP id b15-20020a170906194f00b00a043f97f3f1mr16763433eje.58.1701353844685; Thu, 30 Nov 2023 06:17:24 -0800 (PST) Received: from localhost.localdomain ([2001:b07:6474:ebbf:d1eb:b106:516d:db0a]) by smtp.gmail.com with ESMTPSA id my18-20020a1709065a5200b009f28db2b702sm716064ejc.209.2023.11.30.06.17.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Nov 2023 06:17:24 -0800 (PST) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Amarula patchwork , michael@amarulasolutions.com, Dario Binacchi , Daniel Vetter , David Airlie , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Neil Armstrong , Sam Ravnborg , Thomas Zimmermann , dri-devel@lists.freedesktop.org Subject: [PATCH v3 09/10] drm/panel: ilitek-ili9805: add support for Tianma TM041XDHG01 panel Date: Thu, 30 Nov 2023 15:16:26 +0100 Message-ID: <20231130141705.1796672-10-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231130141705.1796672-1-dario.binacchi@amarulasolutions.com> References: <20231130141705.1796672-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Michael Trimarchi Tianma TM041XDHG01 utilizes the Ilitek ILI9805 controller. Add this panel's initialzation sequence and timing to ILI9805 driver. Signed-off-by: Michael Trimarchi Signed-off-by: Dario Binacchi Reviewed-by: Neil Armstrong --- (no changes since v1) drivers/gpu/drm/panel/panel-ilitek-ili9805.c | 53 ++++++++++++++++++++ 1 file changed, 53 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9805.c b/drivers/gpu/drm= /panel/panel-ilitek-ili9805.c index 749959e10d92..cd187b0b1998 100644 --- a/drivers/gpu/drm/panel/panel-ilitek-ili9805.c +++ b/drivers/gpu/drm/panel/panel-ilitek-ili9805.c @@ -89,6 +89,36 @@ static const struct ili9805_instr gpm1780a0_init[] =3D { ILI9805_INSTR(0, 0xB9, 0x02, 0x00), }; =20 +static const struct ili9805_instr tm041xdhg01_init[] =3D { + ILI9805_INSTR(100, ILI9805_EXTCMD_CMD_SET_ENABLE_REG, ILI9805_SETEXTC_PAR= AMETER1, + ILI9805_SETEXTC_PARAMETER2, ILI9805_SETEXTC_PARAMETER3), + ILI9805_INSTR(100, 0xFD, 0x0F, 0x13, 0x44, 0x00), + ILI9805_INSTR(0, 0xf8, 0x18, 0x02, 0x02, 0x18, 0x02, 0x02, 0x30, 0x01, + 0x01, 0x30, 0x01, 0x01, 0x30, 0x01, 0x01), + ILI9805_INSTR(0, 0xB8, 0x74), + ILI9805_INSTR(0, 0xF1, 0x00), + ILI9805_INSTR(0, 0xF2, 0x00, 0x58, 0x40), + ILI9805_INSTR(0, 0xFC, 0x04, 0x0F, 0x01), + ILI9805_INSTR(0, 0xEB, 0x08, 0x0F), + ILI9805_INSTR(0, 0xe0, 0x01, 0x0d, 0x15, 0x0e, 0x0f, 0x0f, 0x0b, 0x08, 0x= 04, + 0x07, 0x0a, 0x0d, 0x0c, 0x15, 0x0f, 0x08), + ILI9805_INSTR(0, 0xe1, 0x01, 0x0d, 0x15, 0x0e, 0x0f, 0x0f, 0x0b, 0x08, 0x= 04, + 0x07, 0x0a, 0x0d, 0x0c, 0x15, 0x0f, 0x08), + ILI9805_INSTR(10, 0xc1, 0x15, 0x03, 0x03, 0x31), + ILI9805_INSTR(10, 0xB1, 0x00, 0x12, 0x14), + ILI9805_INSTR(10, 0xB4, 0x02), + ILI9805_INSTR(0, 0xBB, 0x14, 0x55), + ILI9805_INSTR(0, MIPI_DCS_SET_ADDRESS_MODE, 0x0a), + ILI9805_INSTR(0, MIPI_DCS_SET_PIXEL_FORMAT, 0x77), + ILI9805_INSTR(0, 0x20), + ILI9805_INSTR(0, 0xB0, 0x00), + ILI9805_INSTR(0, 0xB6, 0x01), + ILI9805_INSTR(0, 0xc2, 0x11), + ILI9805_INSTR(0, 0x51, 0xFF), + ILI9805_INSTR(0, 0x53, 0x24), + ILI9805_INSTR(0, 0x55, 0x00), +}; + static inline struct ili9805 *panel_to_ili9805(struct drm_panel *panel) { return container_of(panel, struct ili9805, panel); @@ -239,6 +269,20 @@ static const struct drm_display_mode gpm1780a0_timing = =3D { .vtotal =3D 480 + 2 + 4 + 10, }; =20 +static const struct drm_display_mode tm041xdhg01_timing =3D { + .clock =3D 26227, + + .hdisplay =3D 480, + .hsync_start =3D 480 + 10, + .hsync_end =3D 480 + 10 + 2, + .htotal =3D 480 + 10 + 2 + 36, + + .vdisplay =3D 768, + .vsync_start =3D 768 + 2, + .vsync_end =3D 768 + 10 + 4, + .vtotal =3D 768 + 2 + 4 + 10, +}; + static int ili9805_get_modes(struct drm_panel *panel, struct drm_connector *connector) { @@ -343,8 +387,17 @@ static const struct ili9805_desc gpm1780a0_desc =3D { .height_mm =3D 65, }; =20 +static const struct ili9805_desc tm041xdhg01_desc =3D { + .init =3D tm041xdhg01_init, + .init_length =3D ARRAY_SIZE(tm041xdhg01_init), + .mode =3D &tm041xdhg01_timing, + .width_mm =3D 42, + .height_mm =3D 96, +}; + static const struct of_device_id ili9805_of_match[] =3D { { .compatible =3D "giantplus,gpm1790a0", .data =3D &gpm1780a0_desc }, + { .compatible =3D "tianma,tm041xdhg01", .data =3D &tm041xdhg01_desc }, { } }; MODULE_DEVICE_TABLE(of, ili9805_of_match); --=20 2.43.0