From nobody Tue Dec 16 19:53:42 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 39622C4167B for ; Wed, 29 Nov 2023 22:22:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1343696AbjK2WWN (ORCPT ); Wed, 29 Nov 2023 17:22:13 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39082 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1343528AbjK2WVl (ORCPT ); Wed, 29 Nov 2023 17:21:41 -0500 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7DAD6193; Wed, 29 Nov 2023 14:21:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1701296503; x=1732832503; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=5UoZQm+5mlrVi2iED5gw7GUDbpPxS++v3tW390wcYxA=; b=Lx27ZCfasTNeE20rYeXWujjuEiSQeiUUyxguIz3YM6xmrjhflixiIx1D gYr1RH8hU5NTN4KVTrfc/GeQQiFT9RiKcuWvlc7maNddgl/0bMf7TMc4H ZG2bAz951Cf6EZ73aFtby4yRbpg38aIXHjMvk83vWvHtPPImPJNroTK7w QLrEi529sMxYsSQP9GnvtPdJp2MEfgWqp7Ono1/ZikSx/ppb5smniZrjM D0Jo5ZWyXr0w1ORTTXQO0nweP6JkVMiaJ1J3Miqf0jLIdE4Yl1FNQGaAD ry8v6jn82SVeLPrwAY9defvj+UcemXoq4sDqFdc3jm2V+bwh4VHqrcDIp w==; X-IronPort-AV: E=McAfee;i="6600,9927,10909"; a="11937015" X-IronPort-AV: E=Sophos;i="6.04,237,1695711600"; d="scan'208";a="11937015" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Nov 2023 14:21:35 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10909"; a="798070438" X-IronPort-AV: E=Sophos;i="6.04,237,1695711600"; d="scan'208";a="798070438" Received: from linux.intel.com ([10.54.29.200]) by orsmga008.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Nov 2023 14:21:34 -0800 Received: from debox1-desk4.lan (unknown [10.209.108.167]) by linux.intel.com (Postfix) with ESMTP id 74964580ABB; Wed, 29 Nov 2023 14:21:34 -0800 (PST) From: "David E. Box" To: linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org, ilpo.jarvinen@linux.intel.com, rajvi.jingar@linux.intel.com Subject: [PATCH V6 15/20] platform/x86/intel/pmc: Find and register PMC telemetry entries Date: Wed, 29 Nov 2023 14:21:27 -0800 Message-Id: <20231129222132.2331261-16-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231129222132.2331261-1-david.e.box@linux.intel.com> References: <20231129222132.2331261-1-david.e.box@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The PMC SSRAM device contains counters that are structured in Intel Platform Monitoring Technology (PMT) telemetry regions. Look for and register these telemetry regions from the driver so that they may be read using the Intel PMT ABI. Signed-off-by: David E. Box Reviewed-by: Ilpo J=C3=A4rvinen --- V6 - No change V5 - no change V4 - no change V3 - no change V2 - no change drivers/platform/x86/intel/pmc/Kconfig | 1 + drivers/platform/x86/intel/pmc/core_ssram.c | 49 +++++++++++++++++++++ 2 files changed, 50 insertions(+) diff --git a/drivers/platform/x86/intel/pmc/Kconfig b/drivers/platform/x86/= intel/pmc/Kconfig index b526597e4deb..d2f651fbec2c 100644 --- a/drivers/platform/x86/intel/pmc/Kconfig +++ b/drivers/platform/x86/intel/pmc/Kconfig @@ -7,6 +7,7 @@ config INTEL_PMC_CORE tristate "Intel PMC Core driver" depends on PCI depends on ACPI + depends on INTEL_PMT_TELEMETRY help The Intel Platform Controller Hub for Intel Core SoCs provides access to Power Management Controller registers via various interfaces. This diff --git a/drivers/platform/x86/intel/pmc/core_ssram.c b/drivers/platform= /x86/intel/pmc/core_ssram.c index c1b984255571..9ca720f9cbb2 100644 --- a/drivers/platform/x86/intel/pmc/core_ssram.c +++ b/drivers/platform/x86/intel/pmc/core_ssram.c @@ -13,6 +13,8 @@ #include =20 #include "core.h" +#include "../vsec.h" +#include "../pmt/telemetry.h" =20 #define SSRAM_HDR_SIZE 0x100 #define SSRAM_PWRM_OFFSET 0x14 @@ -24,6 +26,49 @@ =20 DEFINE_FREE(pmc_core_iounmap, void __iomem *, iounmap(_T)); =20 +static void +pmc_add_pmt(struct pmc_dev *pmcdev, u64 ssram_base, void __iomem *ssram) +{ + struct pci_dev *pcidev =3D pmcdev->ssram_pcidev; + struct intel_vsec_platform_info info =3D {}; + struct intel_vsec_header *headers[2] =3D {}; + struct intel_vsec_header header; + void __iomem *dvsec; + u32 dvsec_offset; + u32 table, hdr; + + ssram =3D ioremap(ssram_base, SSRAM_HDR_SIZE); + if (!ssram) + return; + + dvsec_offset =3D readl(ssram + SSRAM_DVSEC_OFFSET); + iounmap(ssram); + + dvsec =3D ioremap(ssram_base + dvsec_offset, SSRAM_DVSEC_SIZE); + if (!dvsec) + return; + + hdr =3D readl(dvsec + PCI_DVSEC_HEADER1); + header.id =3D readw(dvsec + PCI_DVSEC_HEADER2); + header.rev =3D PCI_DVSEC_HEADER1_REV(hdr); + header.length =3D PCI_DVSEC_HEADER1_LEN(hdr); + header.num_entries =3D readb(dvsec + INTEL_DVSEC_ENTRIES); + header.entry_size =3D readb(dvsec + INTEL_DVSEC_SIZE); + + table =3D readl(dvsec + INTEL_DVSEC_TABLE); + header.tbir =3D INTEL_DVSEC_TABLE_BAR(table); + header.offset =3D INTEL_DVSEC_TABLE_OFFSET(table); + iounmap(dvsec); + + headers[0] =3D &header; + info.caps =3D VSEC_CAP_TELEMETRY; + info.headers =3D headers; + info.base_addr =3D ssram_base; + info.parent =3D &pmcdev->pdev->dev; + + intel_vsec_register(pcidev, &info); +} + static const struct pmc_reg_map *pmc_core_find_regmap(struct pmc_info *lis= t, u16 devid) { for (; list->map; ++list) @@ -101,6 +146,9 @@ pmc_core_ssram_get_pmc(struct pmc_dev *pmcdev, int pmc_= idx, u32 offset) pwrm_base =3D get_base(ssram, SSRAM_PWRM_OFFSET); devid =3D readw(ssram + SSRAM_DEVID_OFFSET); =20 + /* Find and register and PMC telemetry entries */ + pmc_add_pmt(pmcdev, ssram_base, ssram); + map =3D pmc_core_find_regmap(pmcdev->regmap_list, devid); if (!map) return -ENODEV; @@ -140,3 +188,4 @@ int pmc_core_ssram_init(struct pmc_dev *pmcdev) =20 return ret; } +MODULE_IMPORT_NS(INTEL_VSEC); --=20 2.34.1