From nobody Sun Sep 14 14:31:03 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 64120C4167B for ; Tue, 28 Nov 2023 05:45:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1343637AbjK1Fox (ORCPT ); Tue, 28 Nov 2023 00:44:53 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34350 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1343578AbjK1Fog (ORCPT ); Tue, 28 Nov 2023 00:44:36 -0500 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B0746D6D; Mon, 27 Nov 2023 21:44:40 -0800 (PST) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 3AS5iV6R072818; Mon, 27 Nov 2023 23:44:31 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1701150271; bh=C7nLneLG/Oh9BPvoztNlayKtN+X4/S2BfHVVmetyqmQ=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=b/bS/4SMVXWeTaBX54ZcF9ROImJ0vhwI9JTbQ8xm7xwkXS4oEOILfk1VqezSiLijf /oaKowtLIVuYskkdNbKt0AHeZHVFAIp027M3zRNEnohSoFg/mqCVGs4eT87fkBO28D Rf9dy7X++7ZHn9Q+xNd9fxBqQnOD1xGokOP1IF1Q= Received: from DLEE113.ent.ti.com (dlee113.ent.ti.com [157.170.170.24]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 3AS5iVpZ055937 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 27 Nov 2023 23:44:31 -0600 Received: from DLEE102.ent.ti.com (157.170.170.32) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 27 Nov 2023 23:44:30 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 27 Nov 2023 23:44:30 -0600 Received: from uda0492258.dhcp.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 3AS5i2uT096776; Mon, 27 Nov 2023 23:44:26 -0600 From: Siddharth Vadapalli To: , , , , , , , CC: , , , , , , , , Subject: [PATCH v13 5/5] PCI: j721e: add j784s4 PCIe configuration Date: Tue, 28 Nov 2023 11:14:02 +0530 Message-ID: <20231128054402.2155183-6-s-vadapalli@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231128054402.2155183-1-s-vadapalli@ti.com> References: <20231128054402.2155183-1-s-vadapalli@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Matt Ranostay Add PCIe configuration for j784s4 platform which has 4x lane support. Tested-by: Achal Verma Signed-off-by: Matt Ranostay Reviewed-by: Roger Quadros Signed-off-by: Achal Verma Signed-off-by: Siddharth Vadapalli --- drivers/pci/controller/cadence/pci-j721e.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/drivers/pci/controller/cadence/pci-j721e.c b/drivers/pci/contr= oller/cadence/pci-j721e.c index 645597856a1d..85718246016b 100644 --- a/drivers/pci/controller/cadence/pci-j721e.c +++ b/drivers/pci/controller/cadence/pci-j721e.c @@ -330,6 +330,20 @@ static const struct j721e_pcie_data am64_pcie_ep_data = =3D { .max_lanes =3D 1, }; =20 +static const struct j721e_pcie_data j784s4_pcie_rc_data =3D { + .mode =3D PCI_MODE_RC, + .quirk_retrain_flag =3D true, + .byte_access_allowed =3D false, + .linkdown_irq_regfield =3D LINK_DOWN, + .max_lanes =3D 4, +}; + +static const struct j721e_pcie_data j784s4_pcie_ep_data =3D { + .mode =3D PCI_MODE_EP, + .linkdown_irq_regfield =3D LINK_DOWN, + .max_lanes =3D 4, +}; + static const struct of_device_id of_j721e_pcie_match[] =3D { { .compatible =3D "ti,j721e-pcie-host", @@ -355,6 +369,14 @@ static const struct of_device_id of_j721e_pcie_match[]= =3D { .compatible =3D "ti,am64-pcie-ep", .data =3D &am64_pcie_ep_data, }, + { + .compatible =3D "ti,j784s4-pcie-host", + .data =3D &j784s4_pcie_rc_data, + }, + { + .compatible =3D "ti,j784s4-pcie-ep", + .data =3D &j784s4_pcie_ep_data, + }, {}, }; =20 --=20 2.34.1