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Mon, 27 Nov 2023 11:09:08 -0800 Received: from dc3lp-swdev041.marvell.com (dc3lp-swdev041.marvell.com [10.6.60.191]) by maili.marvell.com (Postfix) with ESMTP id 31AC83F7061; Mon, 27 Nov 2023 11:09:04 -0800 (PST) From: Elad Nachman To: , , , , , , , , , , , CC: , Subject: [PATCH v6 1/3] MAINTAINERS: add ac5 to list of maintained Marvell dts files Date: Mon, 27 Nov 2023 21:08:55 +0200 Message-ID: <20231127190857.1977974-2-enachman@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231127190857.1977974-1-enachman@marvell.com> References: <20231127190857.1977974-1-enachman@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-GUID: EAUUFmDRpg-Yb-rC_3tFWyJKs67EXdmG X-Proofpoint-ORIG-GUID: EAUUFmDRpg-Yb-rC_3tFWyJKs67EXdmG X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-11-27_17,2023-11-27_01,2023-05-22_02 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Elad Nachman Add ac5 dts files to the list of maintained Marvell Armada dts files Signed-off-by: Elad Nachman --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index b81da7a36a36..6f863a0c3248 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2339,6 +2339,7 @@ F: arch/arm/boot/dts/marvell/armada* F: arch/arm/boot/dts/marvell/kirkwood* F: arch/arm/configs/mvebu_*_defconfig F: arch/arm/mach-mvebu/ +F: arch/arm64/boot/dts/marvell/ac5* F: arch/arm64/boot/dts/marvell/armada* F: arch/arm64/boot/dts/marvell/cn913* F: drivers/clk/mvebu/ --=20 2.25.1 From nobody Wed Dec 17 10:58:52 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 069D3C4167B for ; Mon, 27 Nov 2023 19:11:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232820AbjK0TK4 (ORCPT ); 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Mon, 27 Nov 2023 11:10:51 -0800 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Mon, 27 Nov 2023 11:09:12 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Mon, 27 Nov 2023 11:09:12 -0800 Received: from dc3lp-swdev041.marvell.com (dc3lp-swdev041.marvell.com [10.6.60.191]) by maili.marvell.com (Postfix) with ESMTP id 19C4E3F7090; Mon, 27 Nov 2023 11:09:08 -0800 (PST) From: Elad Nachman To: , , , , , , , , , , , CC: , Subject: [PATCH v6 2/3] dt-bindings: arm64: add Marvell COM Express boards Date: Mon, 27 Nov 2023 21:08:56 +0200 Message-ID: <20231127190857.1977974-3-enachman@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231127190857.1977974-1-enachman@marvell.com> References: <20231127190857.1977974-1-enachman@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-GUID: elBDvPdIk94zvAoJPNk49PDxelquVYxs X-Proofpoint-ORIG-GUID: elBDvPdIk94zvAoJPNk49PDxelquVYxs X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-11-27_17,2023-11-27_01,2023-05-22_02 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Elad Nachman Add dt bindings for: CN9130 COM Express CPU module CN9131 COM Express CPU module AC5X RD COM Express Type 7 carrier board. AC5X RD COM Express board with a CN9131 COM Express Type 7 CPU module. Signed-off-by: Elad Nachman Reviewed-by: Krzysztof Kozlowski --- .../bindings/arm/marvell/armada-7k-8k.yaml | 24 +++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yam= l b/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml index 52d78521e412..d00866aeaa8d 100644 --- a/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml +++ b/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml @@ -60,4 +60,28 @@ properties: - const: marvell,armada-ap807-quad - const: marvell,armada-ap807 =20 + - description: + Alleycat5X (98DX35xx) Reference Design as COM Express Carrier pl= us + Armada CN9130 COM Express CPU module + items: + - enum: + - marvell,cn9130-ac5x-carrier + - const: marvell,rd-ac5x-carrier + - const: marvell,cn9130-cpu-module + - const: marvell,cn9130 + - const: marvell,armada-ap807-quad + - const: marvell,armada-ap807 + + - description: + Alleycat5X (98DX35xx) Reference Design as COM Express Carrier pl= us + Armada CN9131 COM Express CPU module + items: + - enum: + - marvell,cn9131-ac5x-carrier + - const: marvell,rd-ac5x-carrier + - const: marvell,cn9131-cpu-module + - const: marvell,cn9131 + - const: marvell,armada-ap807-quad + - const: marvell,armada-ap807 + additionalProperties: true --=20 2.25.1 From nobody Wed Dec 17 10:58:52 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 785BDC4167B for ; Mon, 27 Nov 2023 19:11:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232827AbjK0TK6 (ORCPT ); Mon, 27 Nov 2023 14:10:58 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58026 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232721AbjK0TKy (ORCPT ); Mon, 27 Nov 2023 14:10:54 -0500 Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AD63CD63; Mon, 27 Nov 2023 11:11:00 -0800 (PST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3AR9KUWu019803; Mon, 27 Nov 2023 11:10:51 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=Kttp6O41SVd6LWXK4XqADy2fa+4KjQlv1YubZM7AHmE=; b=WfdwefELJwKgVhcqYg8emYpA/IgWFcyecQC7Jh1d8OUUlCZLi/fCyXnkviTqPw6ZXmsz pjrdiIjrLCCvOGirKOhlQg+sAlQ2xco+jL1Uy1rufDmMfWtMCKm683rZPE5WJaoyWNIL U33El/HpOb5qY7SgpClsgmH0/XbLQMHPo6GDV1n+2zQsfnZmGYqLeSoQlulpHlvE234T hpuzXaiMBm7M76+KyBqfZyksZPHUjtWDwaes2uu/vK9c0okV42MKMtqtijDRmMtwKXUJ ZqxgBRetovnU5xa1TNu9A9adNWzy1AVhl5PdtiXdM/EqquH1Kk1d9rUfqMjnDCss0LlR Eg== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3umrcua4n2-6 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Mon, 27 Nov 2023 11:10:51 -0800 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Mon, 27 Nov 2023 11:09:16 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Mon, 27 Nov 2023 11:09:16 -0800 Received: from dc3lp-swdev041.marvell.com (dc3lp-swdev041.marvell.com [10.6.60.191]) by maili.marvell.com (Postfix) with ESMTP id EC3AD3F7061; Mon, 27 Nov 2023 11:09:12 -0800 (PST) From: Elad Nachman To: , , , , , , , , , , , CC: , Subject: [PATCH v6 3/3] arm64: dts: cn913x: add device trees for COM Express boards Date: Mon, 27 Nov 2023 21:08:57 +0200 Message-ID: <20231127190857.1977974-4-enachman@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231127190857.1977974-1-enachman@marvell.com> References: <20231127190857.1977974-1-enachman@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-GUID: H6-bB15iz7DhzpRa6etDIUJHUhjwaBLI X-Proofpoint-ORIG-GUID: H6-bB15iz7DhzpRa6etDIUJHUhjwaBLI X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-11-27_17,2023-11-27_01,2023-05-22_02 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Elad Nachman Add support for CN9130 and CN9131 COM Express Type 7 CPU module boards by Marvell. Define these COM Express CPU modules as dtsi and provide a dtsi file for a carrier board (Marvell AC5X RD COM Express type 7 carrier board). This Carrier board only utilizes the PCIe link, hence no special device / driver support is provided by this dtsi file. Finally, provide a dts file for the com express carrier and CPU module combination. These COM Express boards differ from the existing CN913x DB boards by the type of ethernet connection (RGMII), the type of voltage regulators (not i2c expander based) and the USB phy (not UTMI based). Note - PHY + RGMII connector is OOB on CPU module. CN9131 COM Express board is basically CN9130 COM Express board with an additional CP115 I/O co-processor, which in this case provides an additional USB host controller on the board. Signed-off-by: Elad Nachman --- arch/arm64/boot/dts/marvell/Makefile | 1 + .../dts/marvell/ac5x-rd-carrier-cn9131.dts | 25 ++++ .../boot/dts/marvell/ac5x-rd-carrier.dtsi | 14 +++ .../dts/marvell/cn9130-db-comexpress.dtsi | 96 ++++++++++++++++ .../dts/marvell/cn9131-db-comexpress.dtsi | 108 ++++++++++++++++++ 5 files changed, 244 insertions(+) create mode 100644 arch/arm64/boot/dts/marvell/ac5x-rd-carrier-cn9131.dts create mode 100644 arch/arm64/boot/dts/marvell/ac5x-rd-carrier.dtsi create mode 100644 arch/arm64/boot/dts/marvell/cn9130-db-comexpress.dtsi create mode 100644 arch/arm64/boot/dts/marvell/cn9131-db-comexpress.dtsi diff --git a/arch/arm64/boot/dts/marvell/Makefile b/arch/arm64/boot/dts/mar= vell/Makefile index 79ac09b58a89..99b8cb3c49e1 100644 --- a/arch/arm64/boot/dts/marvell/Makefile +++ b/arch/arm64/boot/dts/marvell/Makefile @@ -26,4 +26,5 @@ dtb-$(CONFIG_ARCH_MVEBU) +=3D cn9132-db.dtb dtb-$(CONFIG_ARCH_MVEBU) +=3D cn9132-db-B.dtb dtb-$(CONFIG_ARCH_MVEBU) +=3D cn9130-crb-A.dtb dtb-$(CONFIG_ARCH_MVEBU) +=3D cn9130-crb-B.dtb +dtb-$(CONFIG_ARCH_MVEBU) +=3D ac5x-rd-carrier-cn9131.dtb dtb-$(CONFIG_ARCH_MVEBU) +=3D ac5-98dx35xx-rd.dtb diff --git a/arch/arm64/boot/dts/marvell/ac5x-rd-carrier-cn9131.dts b/arch/= arm64/boot/dts/marvell/ac5x-rd-carrier-cn9131.dts new file mode 100644 index 000000000000..e83b9ae379ec --- /dev/null +++ b/arch/arm64/boot/dts/marvell/ac5x-rd-carrier-cn9131.dts @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2023 Marvell International Ltd. + * + * Device tree for the AC5X RD Type 7 Com Express carrier board, + * Utilizing the CN913x COM Express CPU module board. + * This specific board only maintains a PCIe link with the CPU CPU module + * module, which does not require any special DTS definitions. + */ + +#include "cn9131-db-comexpress.dtsi" +#include "ac5x-rd-carrier.dtsi" + +/ { + model =3D "Marvell Armada AC5X RD COM EXPRESS type 7 carrier board with C= N9131 CPU module"; + compatible =3D "marvell,cn9131-ac5x-carrier", "marvell,rd-ac5x-carrier", + "marvell,cn9131-cpu-module", "marvell,cn9131", + "marvell,armada-ap807-quad", "marvell,armada-ap807"; + + memory@0 { + device_type =3D "memory"; + reg =3D <0x0 0x0 0x2 0x00000000>; + }; + +}; diff --git a/arch/arm64/boot/dts/marvell/ac5x-rd-carrier.dtsi b/arch/arm64/= boot/dts/marvell/ac5x-rd-carrier.dtsi new file mode 100644 index 000000000000..fd45d5582233 --- /dev/null +++ b/arch/arm64/boot/dts/marvell/ac5x-rd-carrier.dtsi @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2023 Marvell International Ltd. + * + * Device tree for the AC5X RD Type 7 Com Express carrier board, + * This specific board only maintains a PCIe link with the CPU CPU module + * module, which does not require any special DTS definitions. + */ + +/ { + model =3D "Marvell Armada AC5X RD COM EXPRESS type 7 carrier board"; + compatible =3D "marvell,rd-ac5x-carrier"; + +}; diff --git a/arch/arm64/boot/dts/marvell/cn9130-db-comexpress.dtsi b/arch/a= rm64/boot/dts/marvell/cn9130-db-comexpress.dtsi new file mode 100644 index 000000000000..028496ebc473 --- /dev/null +++ b/arch/arm64/boot/dts/marvell/cn9130-db-comexpress.dtsi @@ -0,0 +1,96 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2023 Marvell International Ltd. + * + * Device tree for the CN9130-DB Com Express CPU module board. + */ + +#include "cn9130-db.dtsi" + +/ { + model =3D "Marvell Armada CN9130-DB COM EXPRESS type 7 CPU module board"; + compatible =3D "marvell,cn9130-cpu-module", "marvell,cn9130", + "marvell,armada-ap807-quad", "marvell,armada-ap807"; + +}; + +&ap0_reg_sd_vccq { + regulator-max-microvolt =3D <1800000>; + states =3D <1800000 0x1 1800000 0x0>; + /delete-property/ gpios; +}; + +&cp0_reg_usb3_vbus0 { + /delete-property/ gpio; +}; + +&cp0_reg_usb3_vbus1 { + /delete-property/ gpio; +}; + +&cp0_reg_sd_vcc { + status =3D "disabled"; +}; + +&cp0_reg_sd_vccq { + status =3D "disabled"; +}; + +&cp0_sdhci0 { + status =3D "disabled"; +}; + +&cp0_eth0 { + status =3D "disabled"; +}; + +&cp0_eth1 { + status =3D "okay"; + phy =3D <&phy0>; + phy-mode =3D "rgmii-id"; +}; + +&cp0_eth2 { + status =3D "disabled"; +}; + +&cp0_mdio { + status =3D "okay"; + pinctrl-0 =3D <&cp0_ge_mdio_pins>; + phy0: ethernet-phy@0 { + status =3D "okay"; + }; +}; + +&cp0_syscon0 { + cp0_pinctrl: pinctrl { + compatible =3D "marvell,cp115-standalone-pinctrl"; + + cp0_ge_mdio_pins: ge-mdio-pins { + marvell,pins =3D "mpp40", "mpp41"; + marvell,function =3D "ge"; + }; + }; +}; + +&cp0_sdhci0 { + status =3D "disabled"; +}; + +&cp0_spi1 { + status =3D "okay"; +}; + +&cp0_usb3_0 { + status =3D "okay"; + usb-phy =3D <&cp0_usb3_0_phy0>; + phy-names =3D "usb"; + /delete-property/ phys; +}; + +&cp0_usb3_1 { + status =3D "okay"; + usb-phy =3D <&cp0_usb3_0_phy1>; + phy-names =3D "usb"; + /delete-property/ phys; +}; diff --git a/arch/arm64/boot/dts/marvell/cn9131-db-comexpress.dtsi b/arch/a= rm64/boot/dts/marvell/cn9131-db-comexpress.dtsi new file mode 100644 index 000000000000..6f3914bcfd01 --- /dev/null +++ b/arch/arm64/boot/dts/marvell/cn9131-db-comexpress.dtsi @@ -0,0 +1,108 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2023 Marvell International Ltd. + * + * Device tree for the CN9131-DB Com Express CPU module board. + */ + +#include "cn9131-db.dtsi" + +/ { + model =3D "Marvell Armada CN9131-DB COM EXPRESS type 7 CPU module board"; + compatible =3D "marvell,cn9131-cpu-module", "marvell,cn9131", "marvell,cn= 9130", + "marvell,armada-ap807-quad", "marvell,armada-ap807"; + +}; + +&ap0_reg_sd_vccq { + regulator-max-microvolt =3D <1800000>; + states =3D <1800000 0x1 1800000 0x0>; + /delete-property/ gpios; +}; + +&cp0_reg_usb3_vbus0 { + /delete-property/ gpio; +}; + +&cp0_reg_usb3_vbus1 { + /delete-property/ gpio; +}; + +&cp1_reg_usb3_vbus0 { + /delete-property/ gpio; +}; + +&cp0_reg_sd_vcc { + status =3D "disabled"; +}; + +&cp0_reg_sd_vccq { + status =3D "disabled"; +}; + +&cp0_sdhci0 { + status =3D "disabled"; +}; + +&cp0_eth0 { + status =3D "disabled"; +}; + +&cp0_eth1 { + status =3D "okay"; + phy =3D <&phy0>; + phy-mode =3D "rgmii-id"; +}; + +&cp0_eth2 { + status =3D "disabled"; +}; + +&cp0_mdio { + status =3D "okay"; + pinctrl-0 =3D <&cp0_ge_mdio_pins>; + phy0: ethernet-phy@0 { + status =3D "okay"; + }; +}; + +&cp0_syscon0 { + cp0_pinctrl: pinctrl { + compatible =3D "marvell,cp115-standalone-pinctrl"; + + cp0_ge_mdio_pins: ge-mdio-pins { + marvell,pins =3D "mpp40", "mpp41"; + marvell,function =3D "ge"; + }; + }; +}; + +&cp0_sdhci0 { + status =3D "disabled"; +}; + +&cp0_spi1 { + status =3D "okay"; +}; + +&cp0_usb3_0 { + status =3D "okay"; + usb-phy =3D <&cp0_usb3_0_phy0>; + phy-names =3D "usb"; + /delete-property/ phys; +}; + +&cp0_usb3_1 { + status =3D "okay"; + usb-phy =3D <&cp0_usb3_0_phy1>; + phy-names =3D "usb"; + /delete-property/ phys; +}; + +&cp1_usb3_1 { + status =3D "okay"; + usb-phy =3D <&cp1_usb3_0_phy0>; + /* Generic PHY, providing serdes lanes */ + phys =3D <&cp1_comphy3 1>; + phy-names =3D "usb"; +}; --=20 2.25.1