From nobody Wed Dec 17 15:31:16 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 32415C636BD for ; Sat, 25 Nov 2023 08:34:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231890AbjKYIeS (ORCPT ); Sat, 25 Nov 2023 03:34:18 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37924 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231799AbjKYIeD (ORCPT ); Sat, 25 Nov 2023 03:34:03 -0500 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 76F2AE6 for ; Sat, 25 Nov 2023 00:34:09 -0800 (PST) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E6381C433C7; Sat, 25 Nov 2023 08:34:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1700901249; bh=sULvz/WSntLYIuz8arrxbKY+JbBMr2OcovMfkGjh65Q=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=uHQ/QCsenj6f9OJf8bInnyQuHu8Hf0uFEnDtugC8O9iL8r0q4Brx28gsrovvT3FAs LhawTxe3j5d8scxzMzbQiGyJZfkVMXpK82I/5XqTPoZ6u3pTdxsvLqRvezbWhDAW2o LVd+SooqmlELp+W3QibQsEqlJfY86m5+zw9VlZNPYDsZ7csQTMorfHtMvpIS+Dq9pe M0dRry6v0rhKpgRVei8IUl7Pcs3dA36MV468JtfYNLs4CN6PPE5CqUCLhI5Hd3bIFv Fbys8DjygX7Hus6H+yoTHr45M9gj5Hyu00GZb7Ow0LkMXz3xwA/WIKfQI2CgQwPJWh TNym1R38OWYZQ== From: Jisheng Zhang To: Paul Walmsley , Palmer Dabbelt , Albert Ou Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/2] riscv: select ARCH_USE_CMPXCHG_LOCKREF Date: Sat, 25 Nov 2023 16:21:43 +0800 Message-Id: <20231125082144.311-2-jszhang@kernel.org> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20231125082144.311-1-jszhang@kernel.org> References: <20231125082144.311-1-jszhang@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Select ARCH_USE_CMPXCHG_LOCKREF to enable the cmpxchg-based lockless lockref implementation for riscv. Using Linus' test case[1] on TH1520 platform, I see a 11.2% improvement. On JH7110 platform, I see 12.0% improvement. Link: http://marc.info/?l=3Dlinux-fsdevel&m=3D137782380714721&w=3D4 [1] Signed-off-by: Jisheng Zhang --- arch/riscv/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 433ec617703e..7f8aa25457ba 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -51,6 +51,7 @@ config RISCV select ARCH_SUPPORTS_PAGE_TABLE_CHECK if MMU select ARCH_SUPPORTS_PER_VMA_LOCK if MMU select ARCH_SUPPORTS_SHADOW_CALL_STACK if HAVE_SHADOW_CALL_STACK + select ARCH_USE_CMPXCHG_LOCKREF select ARCH_USE_MEMTEST select ARCH_USE_QUEUED_RWLOCKS select ARCH_USES_CFI_TRAPS if CFI_CLANG --=20 2.42.0