From nobody Wed Dec 17 17:23:53 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 72F7EC636CB for ; Fri, 24 Nov 2023 07:18:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344398AbjKXHS1 (ORCPT ); Fri, 24 Nov 2023 02:18:27 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37304 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229705AbjKXHSP (ORCPT ); Fri, 24 Nov 2023 02:18:15 -0500 Received: from mx08-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A716BD72; Thu, 23 Nov 2023 23:18:21 -0800 (PST) Received: from pps.filterd (m0369457.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.22/8.17.1.22) with ESMTP id 3AO11HJ1008884; Fri, 24 Nov 2023 08:17:20 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= selector1; bh=WM2MSIbMrg2Y/M9af1KUg6XNhb7hhWvF94YsQ4eGQyU=; b=i+ z73C1pxgxY02QYaO+o8APjn2x4B6f3aJew21l8D5b3r9wSvycK02t7Ui8ssVkECQ 693MHXn44ZLSrjoDxiyDv6ira07RgO5sYujm7RYyjMRmD3dyzGRMhreOEWBfeaeV CvxJhBWl1S16RZ4NRCq8W0Wz1eytU2NRew2ALBMV3e73Iiuv+tfZHlparoHxv4bR jFVqeB7QAEmhOQRDCL8YqDMa9/1yPwjoJjeO4QdFFoC7IFGbZSHne3co1cTrcG3m 7uUeZcp1YFAgN3FF2WoypZbNxVZakavEY4rnNIAw+7b4lLvRB6IIZBRoYAx4OMhI oLHBs72zp4mekSzsPanQ== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3uhr8apb34-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 24 Nov 2023 08:17:20 +0100 (CET) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id A103810002A; Fri, 24 Nov 2023 08:17:19 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 97C1E215137; Fri, 24 Nov 2023 08:17:19 +0100 (CET) Received: from localhost (10.252.31.103) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Fri, 24 Nov 2023 08:17:18 +0100 From: Raphael Gallais-Pou To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Yannick Fertre , Philippe Cornu , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter CC: , , , , Subject: [PATCH RESEND 3/3] arm: dts: st: fix DSI peripheral clock on stm32mp15 boards Date: Fri, 24 Nov 2023 08:16:49 +0100 Message-ID: <20231124071649.372270-4-raphael.gallais-pou@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231124071649.372270-1-raphael.gallais-pou@foss.st.com> References: <20231124071649.372270-1-raphael.gallais-pou@foss.st.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.252.31.103] X-ClientProxiedBy: EQNCAS1NODE3.st.com (10.75.129.80) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-11-23_15,2023-11-22_01,2023-05-22_02 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" In RCC driver, 'DSI_K' is a kernel clock while 'DSI' has pclk4 as parent clock, which means that it is an APB peripheral clock. Swap the clocks in the DSI peripheral clock reference. Signed-off-by: Raphael Gallais-Pou --- arch/arm/boot/dts/st/stm32mp157.dtsi | 2 +- arch/arm/boot/dts/st/stm32mp157a-dk1-scmi.dts | 2 +- arch/arm/boot/dts/st/stm32mp157c-dk2-scmi.dts | 2 +- arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts | 2 +- arch/arm/boot/dts/st/stm32mp157c-ev1-scmi.dts | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm/boot/dts/st/stm32mp157.dtsi b/arch/arm/boot/dts/st/st= m32mp157.dtsi index 6197d878894d..97cd24227cef 100644 --- a/arch/arm/boot/dts/st/stm32mp157.dtsi +++ b/arch/arm/boot/dts/st/stm32mp157.dtsi @@ -20,7 +20,7 @@ gpu: gpu@59000000 { dsi: dsi@5a000000 { compatible =3D "st,stm32-dsi"; reg =3D <0x5a000000 0x800>; - clocks =3D <&rcc DSI_K>, <&clk_hse>, <&rcc DSI_PX>; + clocks =3D <&rcc DSI>, <&clk_hse>, <&rcc DSI_PX>; clock-names =3D "pclk", "ref", "px_clk"; phy-dsi-supply =3D <®18>; resets =3D <&rcc DSI_R>; diff --git a/arch/arm/boot/dts/st/stm32mp157a-dk1-scmi.dts b/arch/arm/boot/= dts/st/stm32mp157a-dk1-scmi.dts index afcd6285890c..8634699cc65e 100644 --- a/arch/arm/boot/dts/st/stm32mp157a-dk1-scmi.dts +++ b/arch/arm/boot/dts/st/stm32mp157a-dk1-scmi.dts @@ -30,7 +30,7 @@ &cpu1 { }; =20 &dsi { - clocks =3D <&rcc DSI_K>, <&scmi_clk CK_SCMI_HSE>, <&rcc DSI_PX>; + clocks =3D <&rcc DSI>, <&scmi_clk CK_SCMI_HSE>, <&rcc DSI_PX>; }; =20 &gpioz { diff --git a/arch/arm/boot/dts/st/stm32mp157c-dk2-scmi.dts b/arch/arm/boot/= dts/st/stm32mp157c-dk2-scmi.dts index 39358d902000..3a897fa7e167 100644 --- a/arch/arm/boot/dts/st/stm32mp157c-dk2-scmi.dts +++ b/arch/arm/boot/dts/st/stm32mp157c-dk2-scmi.dts @@ -36,7 +36,7 @@ &cryp1 { =20 &dsi { phy-dsi-supply =3D <&scmi_reg18>; - clocks =3D <&rcc DSI_K>, <&scmi_clk CK_SCMI_HSE>, <&rcc DSI_PX>; + clocks =3D <&rcc DSI>, <&scmi_clk CK_SCMI_HSE>, <&rcc DSI_PX>; }; =20 &gpioz { diff --git a/arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts b/arch/arm/boot/= dts/st/stm32mp157c-ed1-scmi.dts index 07ea765a4553..29d6465b1fe6 100644 --- a/arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts +++ b/arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts @@ -35,7 +35,7 @@ &cryp1 { }; =20 &dsi { - clocks =3D <&rcc DSI_K>, <&scmi_clk CK_SCMI_HSE>, <&rcc DSI_PX>; + clocks =3D <&rcc DSI>, <&scmi_clk CK_SCMI_HSE>, <&rcc DSI_PX>; }; =20 &gpioz { diff --git a/arch/arm/boot/dts/st/stm32mp157c-ev1-scmi.dts b/arch/arm/boot/= dts/st/stm32mp157c-ev1-scmi.dts index 813086ec2489..5acb78f0a084 100644 --- a/arch/arm/boot/dts/st/stm32mp157c-ev1-scmi.dts +++ b/arch/arm/boot/dts/st/stm32mp157c-ev1-scmi.dts @@ -37,7 +37,7 @@ &cryp1 { =20 &dsi { phy-dsi-supply =3D <&scmi_reg18>; - clocks =3D <&rcc DSI_K>, <&scmi_clk CK_SCMI_HSE>, <&rcc DSI_PX>; + clocks =3D <&rcc DSI>, <&scmi_clk CK_SCMI_HSE>, <&rcc DSI_PX>; }; =20 &gpioz { --=20 2.25.1