From nobody Mon Dec 29 20:12:20 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 90D93C61DF7 for ; Thu, 23 Nov 2023 14:02:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345668AbjKWOCh (ORCPT ); Thu, 23 Nov 2023 09:02:37 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39616 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345636AbjKWOCf (ORCPT ); Thu, 23 Nov 2023 09:02:35 -0500 Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 36D679F; Thu, 23 Nov 2023 06:02:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1700748162; x=1732284162; h=from:to:cc:subject:date:message-id; bh=/aSaJpluUpfz8zIYINYmmKw/+Sgyp3i8cMgmajwYojc=; b=e7ZSSgH6pl9GeaEj0TsJmUvcrfwV1CIf4PBOH1B1fau3xU/enbQNuSy+ fL/tuGxOfIRLew0OAdK/UTbu7ZiS9C8W0Nj2KkxxrFKg3xUjn2gTiJniJ PNAHPyo2qlGE7FBvtxKdfWz8anMcTi1i4XnEFaImScb6MZlU5I1kemmuv 6hi9N6Iie6iXyV4+6vVFDT3BPnWrBnw0eLNsDt8S8IIe2aWsbSYOwz75j h+t+k+Piwz6sBVd8+cdtj8ksqUcupqwKIupBeh7dlYeNUz5kgErv8fcgg nngbnbAn35QdhWRhF2UlkE1I22Pjra6/YeaJbfwym/hlofAE3NsHq3bQV A==; X-IronPort-AV: E=McAfee;i="6600,9927,10902"; a="423401635" X-IronPort-AV: E=Sophos;i="6.04,221,1695711600"; d="scan'208";a="423401635" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Nov 2023 06:02:33 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10902"; a="771004938" X-IronPort-AV: E=Sophos;i="6.04,221,1695711600"; d="scan'208";a="771004938" Received: from inlubt0316.iind.intel.com ([10.191.20.213]) by fmsmga007.fm.intel.com with ESMTP; 23 Nov 2023 06:02:26 -0800 From: Raag Jadav To: mika.westerberg@linux.intel.com, andriy.shevchenko@linux.intel.com, linus.walleij@linaro.org Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, Raag Jadav Subject: [PATCH v1] pinctrl: tangier: simplify locking using cleanup helpers Date: Thu, 23 Nov 2023 19:32:12 +0530 Message-Id: <20231123140212.12135-1-raag.jadav@intel.com> X-Mailer: git-send-email 2.17.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Use lock guards from cleanup.h to simplify locking. Signed-off-by: Raag Jadav Acked-by: Mika Westerberg --- drivers/pinctrl/intel/pinctrl-tangier.c | 16 +++++++--------- 1 file changed, 7 insertions(+), 9 deletions(-) diff --git a/drivers/pinctrl/intel/pinctrl-tangier.c b/drivers/pinctrl/inte= l/pinctrl-tangier.c index 26e34ec0a972..2cb0b4758269 100644 --- a/drivers/pinctrl/intel/pinctrl-tangier.c +++ b/drivers/pinctrl/intel/pinctrl-tangier.c @@ -9,6 +9,7 @@ */ =20 #include +#include #include #include #include @@ -220,7 +221,6 @@ static int tng_pinmux_set_mux(struct pinctrl_dev *pctld= ev, const struct intel_pingroup *grp =3D &tp->groups[group]; u32 bits =3D grp->mode << BUFCFG_PINMODE_SHIFT; u32 mask =3D BUFCFG_PINMODE_MASK; - unsigned long flags; unsigned int i; =20 /* @@ -232,11 +232,11 @@ static int tng_pinmux_set_mux(struct pinctrl_dev *pct= ldev, return -EBUSY; } =20 + guard(raw_spinlock_irqsave)(&tp->lock); + /* Now enable the mux setting for each pin in the group */ - raw_spin_lock_irqsave(&tp->lock, flags); for (i =3D 0; i < grp->grp.npins; i++) tng_update_bufcfg(tp, grp->grp.pins[i], bits, mask); - raw_spin_unlock_irqrestore(&tp->lock, flags); =20 return 0; } @@ -248,14 +248,13 @@ static int tng_gpio_request_enable(struct pinctrl_dev= *pctldev, struct tng_pinctrl *tp =3D pinctrl_dev_get_drvdata(pctldev); u32 bits =3D BUFCFG_PINMODE_GPIO << BUFCFG_PINMODE_SHIFT; u32 mask =3D BUFCFG_PINMODE_MASK; - unsigned long flags; =20 if (!tng_buf_available(tp, pin)) return -EBUSY; =20 - raw_spin_lock_irqsave(&tp->lock, flags); + guard(raw_spinlock_irqsave)(&tp->lock); + tng_update_bufcfg(tp, pin, bits, mask); - raw_spin_unlock_irqrestore(&tp->lock, flags); =20 return 0; } @@ -360,7 +359,6 @@ static int tng_config_set_pin(struct tng_pinctrl *tp, u= nsigned int pin, unsigned int param =3D pinconf_to_config_param(config); unsigned int arg =3D pinconf_to_config_argument(config); u32 mask, term, value =3D 0; - unsigned long flags; =20 switch (param) { case PIN_CONFIG_BIAS_DISABLE: @@ -432,9 +430,9 @@ static int tng_config_set_pin(struct tng_pinctrl *tp, u= nsigned int pin, return -EINVAL; } =20 - raw_spin_lock_irqsave(&tp->lock, flags); + guard(raw_spinlock_irqsave)(&tp->lock); + tng_update_bufcfg(tp, pin, value, mask); - raw_spin_unlock_irqrestore(&tp->lock, flags); =20 return 0; } base-commit: e58e519b80ba79cd73abb1d631d429b7322ac9cb --=20 2.17.1