From nobody Wed Dec 17 19:03:18 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A8830C61D97 for ; Wed, 22 Nov 2023 15:45:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344632AbjKVPpD (ORCPT ); Wed, 22 Nov 2023 10:45:03 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34696 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344473AbjKVPob (ORCPT ); Wed, 22 Nov 2023 10:44:31 -0500 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CD5AE2122; Wed, 22 Nov 2023 07:42:56 -0800 (PST) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 3AMFgnfh033558; Wed, 22 Nov 2023 09:42:49 -0600 DKIM-Signature: v=1; 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Wed, 22 Nov 2023 09:42:49 -0600 Received: from uda0132425.dhcp.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 3AMFggJm046973; Wed, 22 Nov 2023 09:42:46 -0600 From: Vignesh Raghavendra To: Peter Ujfalusi , Vinod Koul , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: , , , Vignesh Raghavendra , Subject: [PATCH v2 1/4] dt-bindings: dma: ti: k3-*: Add descriptions for register regions Date: Wed, 22 Nov 2023 21:12:35 +0530 Message-ID: <20231122154238.815781-2-vigneshr@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231122154238.815781-1-vigneshr@ti.com> References: <20231122154238.815781-1-vigneshr@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" In preparation for introducing more register regions, add description for existing register regions so that its easier to map reg-names to that of SoC Documentations/TRMs. Signed-off-by: Vignesh Raghavendra --- .../devicetree/bindings/dma/ti/k3-bcdma.yaml | 26 +++++++++++-------- .../devicetree/bindings/dma/ti/k3-pktdma.yaml | 6 ++++- .../devicetree/bindings/dma/ti/k3-udma.yaml | 5 +++- 3 files changed, 24 insertions(+), 13 deletions(-) diff --git a/Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml b/Docum= entation/devicetree/bindings/dma/ti/k3-bcdma.yaml index 4ca300a42a99..b5444800b036 100644 --- a/Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml +++ b/Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml @@ -35,14 +35,6 @@ properties: - ti,am64-dmss-bcdma - ti,j721s2-dmss-bcdma-csi =20 - reg: - minItems: 3 - maxItems: 5 - - reg-names: - minItems: 3 - maxItems: 5 - "#dma-cells": const: 3 description: | @@ -141,7 +133,10 @@ allOf: ti,sci-rm-range-tchan: false =20 reg: - maxItems: 3 + items: + - description: BCDMA Control /Status Registers region + - description: RX Channel Realtime Registers region + - description: Ring Realtime Registers region =20 reg-names: items: @@ -160,7 +155,12 @@ allOf: then: properties: reg: - minItems: 5 + items: + - description: BCDMA Control /Status Registers region + - description: Block Copy Channel Realtime Registers region + - description: RX Channel Realtime Registers region + - description: TX Channel Realtime Registers region + - description: Ring Realtime Registers region =20 reg-names: items: @@ -184,7 +184,11 @@ allOf: ti,sci-rm-range-bchan: false =20 reg: - maxItems: 4 + items: + - description: BCDMA Control /Status Registers region + - description: RX Channel Realtime Registers region + - description: TX Channel Realtime Registers region + - description: Ring Realtime Registers region =20 reg-names: items: diff --git a/Documentation/devicetree/bindings/dma/ti/k3-pktdma.yaml b/Docu= mentation/devicetree/bindings/dma/ti/k3-pktdma.yaml index a69f62f854d8..3580b08f65c6 100644 --- a/Documentation/devicetree/bindings/dma/ti/k3-pktdma.yaml +++ b/Documentation/devicetree/bindings/dma/ti/k3-pktdma.yaml @@ -45,7 +45,11 @@ properties: The second cell is the ASEL value for the channel =20 reg: - maxItems: 4 + items: + - description: Packet DMA Control /Status Registers region + - description: RX Channel Realtime Registers region + - description: TX Channel Realtime Registers region + - description: Ring Realtime Registers region =20 reg-names: items: diff --git a/Documentation/devicetree/bindings/dma/ti/k3-udma.yaml b/Docume= ntation/devicetree/bindings/dma/ti/k3-udma.yaml index 22f6c5e2f7f4..ded588bd079a 100644 --- a/Documentation/devicetree/bindings/dma/ti/k3-udma.yaml +++ b/Documentation/devicetree/bindings/dma/ti/k3-udma.yaml @@ -69,7 +69,10 @@ properties: - ti,j721e-navss-mcu-udmap =20 reg: - maxItems: 3 + items: + - description: UDMA-P Control /Status Registers region + - description: RX Channel Realtime Registers region + - description: TX Channel Realtime Registers region =20 reg-names: items: --=20 2.42.0 From nobody Wed Dec 17 19:03:18 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DFCA1C61D97 for ; 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Wed, 22 Nov 2023 09:42:52 -0600 Received: from DFLE112.ent.ti.com (10.64.6.33) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 22 Nov 2023 09:42:52 -0600 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 22 Nov 2023 09:42:52 -0600 Received: from uda0132425.dhcp.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 3AMFggJn046973; Wed, 22 Nov 2023 09:42:49 -0600 From: Vignesh Raghavendra To: Peter Ujfalusi , Vinod Koul , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: , , , Vignesh Raghavendra , Subject: [PATCH v2 2/4] dt-bindings: dma: ti: k3-bcdma: Describe cfg register regions Date: Wed, 22 Nov 2023 21:12:36 +0530 Message-ID: <20231122154238.815781-3-vigneshr@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231122154238.815781-1-vigneshr@ti.com> References: <20231122154238.815781-1-vigneshr@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Block copy DMA(BCDMA)module on K3 SoCs have ring, BCHAN, TX and RX channel cfg register regions which are usually configured by a Device Management firmware. But certain entities such as bootloader (like U-Boot) may have to access them directly. Describe this region in the binding documentation for completeness of module description. Keep the binding compatible with existing DTS files by requiring first five regions to be present at least. Signed-off-by: Vignesh Raghavendra --- .../devicetree/bindings/dma/ti/k3-bcdma.yaml | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml b/Docum= entation/devicetree/bindings/dma/ti/k3-bcdma.yaml index b5444800b036..b9a0ce347368 100644 --- a/Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml +++ b/Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml @@ -155,20 +155,30 @@ allOf: then: properties: reg: + minItems: 5 items: - description: BCDMA Control /Status Registers region - description: Block Copy Channel Realtime Registers region - description: RX Channel Realtime Registers region - description: TX Channel Realtime Registers region - description: Ring Realtime Registers region + - description: Ring Configuration Registers region + - description: TX Channel Configuration Registers region + - description: RX Channel Configuration Registers region + - description: Block Copy Channel Configuration Registers regi= on =20 reg-names: + minItems: 5 items: - const: gcfg - const: bchanrt - const: rchanrt - const: tchanrt - const: ringrt + - const: ring + - const: tchan + - const: rchan + - const: bchan =20 required: - ti,sci-rm-range-bchan @@ -224,8 +234,13 @@ examples: <0x0 0x4c000000 0x0 0x20000>, <0x0 0x4a820000 0x0 0x20000>, <0x0 0x4aa40000 0x0 0x20000>, - <0x0 0x4bc00000 0x0 0x100000>; - reg-names =3D "gcfg", "bchanrt", "rchanrt", "tchanrt", "ri= ngrt"; + <0x0 0x4bc00000 0x0 0x100000>, + <0x0 0x48600000 0x0 0x8000>, + <0x0 0x484a4000 0x0 0x2000>, + <0x0 0x484c2000 0x0 0x2000>, + <0x0 0x48420000 0x0 0x2000>; + reg-names =3D "gcfg", "bchanrt", "rchanrt", "tchanrt", "ri= ngrt", + "ring", "tchan", "rchan", "bchan"; msi-parent =3D <&inta_main_dmss>; #dma-cells =3D <3>; =20 --=20 2.42.0 From nobody Wed Dec 17 19:03:18 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 30AD2C61D99 for ; Wed, 22 Nov 2023 15:54:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344666AbjKVPyd (ORCPT ); Wed, 22 Nov 2023 10:54:33 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33576 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235243AbjKVPya (ORCPT ); Wed, 22 Nov 2023 10:54:30 -0500 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1229B170E; Wed, 22 Nov 2023 07:43:01 -0800 (PST) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 3AMFgtjC031052; Wed, 22 Nov 2023 09:42:55 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1700667775; bh=/hLXqNq2lxfuDYMurFDuU/pVsd2mCXJXYqLfaS+P+zU=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=qdGp1tEfNQRWLytU3ht3tqcSh+oDaOdB7wJev8podPQ9/jadNoQjNOI9ajCfcdMlO Z8kjfj2dD2gw2DNCWGkMXFHVCFIqm0UbQEt2pcyMf7AL6zzCvRDM1i3wM1Kv9A0DRQ hK/C7tlxCxoIE3ac3CKAw4ja0+n5+BsZFaQrPzsM= Received: from DLEE110.ent.ti.com (dlee110.ent.ti.com [157.170.170.21]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 3AMFgtgM086025 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 22 Nov 2023 09:42:55 -0600 Received: from DLEE101.ent.ti.com (157.170.170.31) by DLEE110.ent.ti.com (157.170.170.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 22 Nov 2023 09:42:55 -0600 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 22 Nov 2023 09:42:55 -0600 Received: from uda0132425.dhcp.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 3AMFggJo046973; Wed, 22 Nov 2023 09:42:52 -0600 From: Vignesh Raghavendra To: Peter Ujfalusi , Vinod Koul , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: , , , Vignesh Raghavendra , Subject: [PATCH v2 3/4] dt-bindings: dma: ti: k3-pktdma: Describe cfg register regions Date: Wed, 22 Nov 2023 21:12:37 +0530 Message-ID: <20231122154238.815781-4-vigneshr@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231122154238.815781-1-vigneshr@ti.com> References: <20231122154238.815781-1-vigneshr@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Packet DMA (PKTDMA) module on K3 SoCs have ring cfg, TX and RX channel cfg and RX flow cfg register regions which are usually configured by a Device Management firmware. But certain entities such as bootloader (like U-Boot) may have to access them directly. Describe this region in the binding documentation for completeness of module description. Keep the binding compatible with existing DTS files by requiring first four regions to be present at least. Signed-off-by: Vignesh Raghavendra --- .../devicetree/bindings/dma/ti/k3-pktdma.yaml | 20 +++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/dma/ti/k3-pktdma.yaml b/Docu= mentation/devicetree/bindings/dma/ti/k3-pktdma.yaml index 3580b08f65c6..11e064c02994 100644 --- a/Documentation/devicetree/bindings/dma/ti/k3-pktdma.yaml +++ b/Documentation/devicetree/bindings/dma/ti/k3-pktdma.yaml @@ -45,18 +45,28 @@ properties: The second cell is the ASEL value for the channel =20 reg: + minItems: 4 items: - description: Packet DMA Control /Status Registers region - description: RX Channel Realtime Registers region - description: TX Channel Realtime Registers region - description: Ring Realtime Registers region + - description: Ring Configuration Registers region + - description: TX Configuration Registers region + - description: RX Configuration Registers region + - description: RX Flow Configuration Registers region =20 reg-names: + minItems: 4 items: - const: gcfg - const: rchanrt - const: tchanrt - const: ringrt + - const: ring + - const: tchan + - const: rchan + - const: rflow =20 msi-parent: true =20 @@ -140,8 +150,14 @@ examples: reg =3D <0x0 0x485c0000 0x0 0x100>, <0x0 0x4a800000 0x0 0x20000>, <0x0 0x4aa00000 0x0 0x40000>, - <0x0 0x4b800000 0x0 0x400000>; - reg-names =3D "gcfg", "rchanrt", "tchanrt", "ringrt"; + <0x0 0x4b800000 0x0 0x400000>, + <0x0 0x485e0000 0x0 0x20000>, + <0x0 0x484a0000 0x0 0x4000>, + <0x0 0x484c0000 0x0 0x2000>, + <0x0 0x48430000 0x0 0x4000>; + reg-names =3D "gcfg", "rchanrt", "tchanrt", "ringrt", + "ring", "tchan", "rchan", "rflow"; + msi-parent =3D <&inta_main_dmss>; #dma-cells =3D <2>; =20 --=20 2.42.0 From nobody Wed Dec 17 19:03:18 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 669A5C61D97 for ; Wed, 22 Nov 2023 15:54:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344547AbjKVPyu (ORCPT ); Wed, 22 Nov 2023 10:54:50 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33492 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344607AbjKVPyl (ORCPT ); Wed, 22 Nov 2023 10:54:41 -0500 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C08B3D59; Wed, 22 Nov 2023 07:43:10 -0800 (PST) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 3AMFgwNT087457; Wed, 22 Nov 2023 09:42:58 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1700667778; bh=4X/PvSxMuHjPWRg0qb+oBQwISSlm8v2omhy8IE/35FY=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=pygKJ9tTdjq+1eoCdBnRRl8UwLSqfXpQGUWDFNhQ9Ok4X36/B1k2qpJJ4xTk1KguG 0hWgxDa83o4xmO+yb3ZtHWRvnfh3r/rh4ZMMKLay/089D76VDAJGYRQH12PGNRx19A eoIAt3LusCnbFLXPCpqz++NX2CtTr2OZZoBIT1Yk= Received: from DFLE110.ent.ti.com (dfle110.ent.ti.com [10.64.6.31]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 3AMFgwcw012052 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 22 Nov 2023 09:42:58 -0600 Received: from DFLE100.ent.ti.com (10.64.6.21) by DFLE110.ent.ti.com (10.64.6.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 22 Nov 2023 09:42:58 -0600 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 22 Nov 2023 09:42:58 -0600 Received: from uda0132425.dhcp.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 3AMFggJp046973; Wed, 22 Nov 2023 09:42:55 -0600 From: Vignesh Raghavendra To: Peter Ujfalusi , Vinod Koul , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: , , , Vignesh Raghavendra , Subject: [PATCH v2 4/4] dt-bindings: dma: ti: k3-udma: Describe cfg register regions Date: Wed, 22 Nov 2023 21:12:38 +0530 Message-ID: <20231122154238.815781-5-vigneshr@ti.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231122154238.815781-1-vigneshr@ti.com> References: <20231122154238.815781-1-vigneshr@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Unified DMA (UDMA) module on K3 SoCs have TX and RX channel cfg and RX flow cfg register regions which are usually configured by a Device Management firmware. But certain entities such as bootloader (like U-Boot) may have to access them directly. Describe this region in the binding documentation for completeness of module description. Keep the binding compatible with existing DTS files by requiring first four regions to be present at least. Signed-off-by: Vignesh Raghavendra --- .../devicetree/bindings/dma/ti/k3-udma.yaml | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/dma/ti/k3-udma.yaml b/Docume= ntation/devicetree/bindings/dma/ti/k3-udma.yaml index ded588bd079a..b18cf2bfdb5b 100644 --- a/Documentation/devicetree/bindings/dma/ti/k3-udma.yaml +++ b/Documentation/devicetree/bindings/dma/ti/k3-udma.yaml @@ -69,16 +69,24 @@ properties: - ti,j721e-navss-mcu-udmap =20 reg: + minItems: 3 items: - description: UDMA-P Control /Status Registers region - description: RX Channel Realtime Registers region - description: TX Channel Realtime Registers region + - description: TX Configuration Registers region + - description: RX Configuration Registers region + - description: RX Flow Configuration Registers region =20 reg-names: + minItems: 3 items: - const: gcfg - const: rchanrt - const: tchanrt + - const: tchan + - const: rchan + - const: rflow =20 msi-parent: true =20 @@ -161,8 +169,11 @@ examples: compatible =3D "ti,am654-navss-main-udmap"; reg =3D <0x0 0x31150000 0x0 0x100>, <0x0 0x34000000 0x0 0x100000>, - <0x0 0x35000000 0x0 0x100000>; - reg-names =3D "gcfg", "rchanrt", "tchanrt"; + <0x0 0x35000000 0x0 0x100000>, + <0x0 0x30b00000 0x0 0x20000>, + <0x0 0x30c00000 0x0 0x8000>, + <0x0 0x30d00000 0x0 0x4000>; + reg-names =3D "gcfg", "rchanrt", "tchanrt", "tchan", "rcha= n", "rflow"; #dma-cells =3D <1>; =20 ti,ringacc =3D <&ringacc>; --=20 2.42.0