From nobody Fri Sep 20 10:51:44 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0802EC5ACB3 for ; Sat, 18 Nov 2023 12:33:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232982AbjKRMdw (ORCPT ); Sat, 18 Nov 2023 07:33:52 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56584 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230361AbjKRMdk (ORCPT ); Sat, 18 Nov 2023 07:33:40 -0500 Received: from relay4-d.mail.gandi.net (relay4-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::224]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7E16719B9; Sat, 18 Nov 2023 04:33:28 -0800 (PST) Received: by mail.gandi.net (Postfix) with ESMTPSA id CB0C4E0007; Sat, 18 Nov 2023 12:33:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=arinc9.com; s=gm1; t=1700310807; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ymPBPYibgV4VH8D3V5s7Kk5Q9W15/8vLXoPHtxkD1Ak=; b=AvJSASREqKQk+RFBuuZYVhhvjchWruzOouY7Has8VMfqKNLHk9jx4VivtUEKjmrVQcHcah FSsoJR42UVztRm6SGiYbsmIUgIp6blrEOakL7upf5oVj/emfcz8sARgkndC2YX6nM705r0 wr1XqyBUPgH8Ds9Bz/5H0od+Yl9ixbjSGnLSdOtENwS0b3bt7ymbjVEZbtLT4K4qp+teAw XOI6O6tsQq6Z1stf0v6/vJf2DRzK7K6r/3V5nXOLILh5hBoHr5nw2y609HYrdGpqUiTe20 D+LKmLgHBLOpqIDIexQZNSVo4u+yHxD/jB0QspuNQ+ekFIQBNl5s/ToNY33G+g== From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= To: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Daniel Golle , Landen Chao , DENG Qingfang , Sean Wang , Andrew Lunn , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Russell King Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, Frank Wunderlich , Bartel Eerdekens , mithat.guner@xeront.com, erkin.bozoglu@xeront.com Subject: [PATCH net-next 07/15] net: dsa: mt7530: do not run mt7530_setup_port5() if port 5 is disabled Date: Sat, 18 Nov 2023 15:31:57 +0300 Message-Id: <20231118123205.266819-8-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20231118123205.266819-1-arinc.unal@arinc9.com> References: <20231118123205.266819-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-GND-Sasl: arinc.unal@arinc9.com Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org There's no need to run all the code on mt7530_setup_port5() if port 5 is disabled. The only case for calling mt7530_setup_port5() from mt7530_setup() is when PHY muxing is enabled. That is because port 5 is not defined as a port on the devicetree, therefore, it cannot be controlled by phylink. Because of this, run mt7530_setup_port5() if priv->p5_intf_sel is P5_INTF_SEL_PHY_P0 or P5_INTF_SEL_PHY_P4. Remove the P5_DISABLED case from mt7530_setup_port5(). Stop initialising the interface variable as the remaining cases will always call mt7530_setup_port5() with it initialised. Signed-off-by: Ar=C4=B1n=C3=A7 =C3=9CNAL Reviewed-by: Vladimir Oltean --- drivers/net/dsa/mt7530.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index fc87ec817672..1aab4c3f28b0 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -942,9 +942,6 @@ static void mt7530_setup_port5(struct dsa_switch *ds, p= hy_interface_t interface) /* MT7530_P5_MODE_GMAC: P5 -> External phy or 2nd GMAC */ val &=3D ~MHWTRAP_P5_DIS; break; - case P5_DISABLED: - interface =3D PHY_INTERFACE_MODE_NA; - break; default: dev_err(ds->dev, "Unsupported p5_intf_sel %d\n", priv->p5_intf_sel); @@ -2313,8 +2310,6 @@ mt7530_setup(struct dsa_switch *ds) * Set priv->p5_intf_sel to the appropriate value if PHY muxing * is detected. */ - interface =3D PHY_INTERFACE_MODE_NA; - for_each_child_of_node(dn, mac_np) { if (!of_device_is_compatible(mac_np, "mediatek,eth-mac")) @@ -2346,7 +2341,9 @@ mt7530_setup(struct dsa_switch *ds) break; } =20 - mt7530_setup_port5(ds, interface); + if (priv->p5_intf_sel =3D=3D P5_INTF_SEL_PHY_P0 || + priv->p5_intf_sel =3D=3D P5_INTF_SEL_PHY_P4) + mt7530_setup_port5(ds, interface); } =20 #ifdef CONFIG_GPIOLIB --=20 2.40.1