From nobody Fri Sep 20 11:57:42 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9A606C072A2 for ; Fri, 17 Nov 2023 09:43:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235742AbjKQJnZ (ORCPT ); Fri, 17 Nov 2023 04:43:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37270 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345823AbjKQJnD (ORCPT ); Fri, 17 Nov 2023 04:43:03 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 143D4D7E; Fri, 17 Nov 2023 01:42:46 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (cola.collaboradmins.com [195.201.22.229]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 164176607391; Fri, 17 Nov 2023 09:42:44 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1700214164; bh=hkZjJ7q8rV2xyxskAur6iNWuCHUO3iI4tzSStjxhlcA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=fLZTFKjMlVRFrhwyLrh4QnsJOhzGL57tVBAEOBtj/imabixoWev5IDY3gvCTEMLZr s6h4mXmujcKtu2QqcXyYYwOweSGwNpWsStlAZuTj/zUlkmss3gc2aMeepXLzY31AgE Ie88wjsCL/TJFfufkLXTME1TekJNPPLheuFx0gZHt1MjDXz7IeHBkpLh8lavnWsBp4 8v4FAesQtXMcIVq4mZtx2Qe+JBqFoc7q1yuz9c7tQTzf3dBqHh38VE2VexX37Yk9m8 Xe4rZH5bAn6toV0QeSifh74n2QTkbRvmzI1xojZ0QrXNXzyFES32lesM8SfleOANo1 S68L6lMac5EsA== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, robh+dt@kernel.org, angelogioacchino.delregno@collabora.com, p.zabel@pengutronix.de, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, kernel@collabora.com, wenst@chromium.org Subject: [PATCH v1 10/20] soc: mediatek: mtk-svs: Commonize efuse parse function for most SoCs Date: Fri, 17 Nov 2023 10:42:18 +0100 Message-ID: <20231117094228.40013-11-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231117094228.40013-1-angelogioacchino.delregno@collabora.com> References: <20231117094228.40013-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Remove almost all of the per-SoC .efuse_parsing() callbacks and replace them with one common callback svs_common_parse_efuse(): to do that, also change the function signature of the callback to add the newly required pointer to struct svs_platform_data, containing the SVS-global fuse map. This is done for MT8186, MT8188, MT8192, MT8195. As for MT8183, the efuse parse function was simplified by using the new fuse maps. Signed-off-by: AngeloGioacchino Del Regno --- drivers/soc/mediatek/mtk-svs.c | 332 +++++++-------------------------- 1 file changed, 66 insertions(+), 266 deletions(-) diff --git a/drivers/soc/mediatek/mtk-svs.c b/drivers/soc/mediatek/mtk-svs.c index 1042af2aee3f..517a27c58888 100644 --- a/drivers/soc/mediatek/mtk-svs.c +++ b/drivers/soc/mediatek/mtk-svs.c @@ -122,6 +122,9 @@ #define SVSB_TS_COEFF_MT8195 250460 #define SVSB_TS_COEFF_MT8186 204650 =20 +/* Algo helpers */ +#define FUSE_DATA_NOT_VALID U32_MAX + /* svs bank related setting */ #define BITS8 8 #define MAX_OPP_ENTRIES 16 @@ -399,7 +402,7 @@ struct svs_platform { struct svs_platform_data { char *name; struct svs_bank *banks; - bool (*efuse_parsing)(struct svs_platform *svsp); + bool (*efuse_parsing)(struct svs_platform *svsp, const struct svs_platfor= m_data *pdata); int (*probe)(struct svs_platform *svsp); const struct svs_fusemap *glb_fuse_map; const u32 *regs; @@ -1838,264 +1841,83 @@ static int svs_get_efuse_data(struct svs_platform = *svsp, return 0; } =20 -static bool svs_mt8195_efuse_parsing(struct svs_platform *svsp) +static u32 svs_get_fuse_val(u32 *fuse_array, const struct svs_fusemap *fma= p, u8 nbits) { - struct svs_bank *svsb; - u32 idx, i, ft_pgm, vmin, golden_temp; - int ret; - - for (i =3D 0; i < svsp->efuse_max; i++) - if (svsp->efuse[i]) - dev_info(svsp->dev, "M_HW_RES%d: 0x%08x\n", - i, svsp->efuse[i]); - - if (!svsp->efuse[10]) { - dev_notice(svsp->dev, "svs_efuse[10] =3D 0x0?\n"); - return false; - } - - /* Svs efuse parsing */ - ft_pgm =3D svsp->efuse[0] & GENMASK(7, 0); - vmin =3D (svsp->efuse[19] >> 4) & GENMASK(1, 0); - - for (idx =3D 0; idx < svsp->bank_max; idx++) { - svsb =3D &svsp->banks[idx]; - - if (vmin =3D=3D 0x1) - svsb->vmin =3D 0x1e; - - if (ft_pgm =3D=3D 0) - svsb->volt_flags |=3D SVSB_INIT01_VOLT_IGNORE; - - if (svsb->type =3D=3D SVSB_TYPE_LOW) { - svsb->mtdes =3D svsp->efuse[10] & GENMASK(7, 0); - svsb->bdes =3D (svsp->efuse[10] >> 16) & GENMASK(7, 0); - svsb->mdes =3D (svsp->efuse[10] >> 24) & GENMASK(7, 0); - svsb->dcbdet =3D (svsp->efuse[8]) & GENMASK(7, 0); - svsb->dcmdet =3D (svsp->efuse[8] >> 8) & GENMASK(7, 0); - } else if (svsb->type =3D=3D SVSB_TYPE_HIGH) { - svsb->mtdes =3D svsp->efuse[9] & GENMASK(7, 0); - svsb->bdes =3D (svsp->efuse[9] >> 16) & GENMASK(7, 0); - svsb->mdes =3D (svsp->efuse[9] >> 24) & GENMASK(7, 0); - svsb->dcbdet =3D (svsp->efuse[8]) & GENMASK(7, 0); - svsb->dcmdet =3D (svsp->efuse[8] >> 8) & GENMASK(7, 0); - } - - svsb->vmax +=3D svsb->dvt_fixed; - } - - for (i =3D 0; i < svsp->tefuse_max; i++) - if (svsp->tefuse[i] !=3D 0) - break; + u32 val; =20 - if (i =3D=3D svsp->tefuse_max) - golden_temp =3D 50; /* All thermal efuse data are 0 */ - else - golden_temp =3D (svsp->tefuse[0] >> 24) & GENMASK(7, 0); + if (fmap->index < 0) + return FUSE_DATA_NOT_VALID; =20 - for (idx =3D 0; idx < svsp->bank_max; idx++) { - svsb =3D &svsp->banks[idx]; - svsb->mts =3D 500; - svsb->bts =3D (((500 * golden_temp + 250460) / 1000) - 25) * 4; - } + val =3D fuse_array[fmap->index] >> fmap->ofst; + val &=3D GENMASK(nbits - 1, 0); =20 - return true; + return val; } =20 -static bool svs_mt8192_efuse_parsing(struct svs_platform *svsp) +static bool svs_is_available(struct svs_platform *svsp) { - struct svs_bank *svsb; - u32 idx, i, vmin, golden_temp; - int ret; + int i, num_populated =3D 0; =20 - for (i =3D 0; i < svsp->efuse_max; i++) + /* If at least two fuse arrays are populated, SVS is calibrated */ + for (i =3D 0; i < svsp->efuse_max; i++) { if (svsp->efuse[i]) - dev_info(svsp->dev, "M_HW_RES%d: 0x%08x\n", - i, svsp->efuse[i]); - - if (!svsp->efuse[9]) { - dev_notice(svsp->dev, "svs_efuse[9] =3D 0x0?\n"); - return false; - } - - /* Svs efuse parsing */ - vmin =3D (svsp->efuse[19] >> 4) & GENMASK(1, 0); - - for (idx =3D 0; idx < svsp->bank_max; idx++) { - svsb =3D &svsp->banks[idx]; - - if (vmin =3D=3D 0x1) - svsb->vmin =3D 0x1e; - - if (svsb->type =3D=3D SVSB_TYPE_LOW) { - svsb->mtdes =3D svsp->efuse[10] & GENMASK(7, 0); - svsb->bdes =3D (svsp->efuse[10] >> 16) & GENMASK(7, 0); - svsb->mdes =3D (svsp->efuse[10] >> 24) & GENMASK(7, 0); - svsb->dcbdet =3D (svsp->efuse[17]) & GENMASK(7, 0); - svsb->dcmdet =3D (svsp->efuse[17] >> 8) & GENMASK(7, 0); - } else if (svsb->type =3D=3D SVSB_TYPE_HIGH) { - svsb->mtdes =3D svsp->efuse[9] & GENMASK(7, 0); - svsb->bdes =3D (svsp->efuse[9] >> 16) & GENMASK(7, 0); - svsb->mdes =3D (svsp->efuse[9] >> 24) & GENMASK(7, 0); - svsb->dcbdet =3D (svsp->efuse[17] >> 16) & GENMASK(7, 0); - svsb->dcmdet =3D (svsp->efuse[17] >> 24) & GENMASK(7, 0); - } + num_populated++; =20 - svsb->vmax +=3D svsb->dvt_fixed; + if (num_populated > 1) + return true; } =20 - for (i =3D 0; i < svsp->tefuse_max; i++) - if (svsp->tefuse[i] !=3D 0) - break; - - if (i =3D=3D svsp->tefuse_max) - golden_temp =3D 50; /* All thermal efuse data are 0 */ - else - golden_temp =3D (svsp->tefuse[0] >> 24) & GENMASK(7, 0); - - for (idx =3D 0; idx < svsp->bank_max; idx++) { - svsb =3D &svsp->banks[idx]; - svsb->mts =3D 500; - svsb->bts =3D (((500 * golden_temp + 250460) / 1000) - 25) * 4; - } - - return true; + return false; } =20 -static bool svs_mt8188_efuse_parsing(struct svs_platform *svsp) +static bool svs_common_parse_efuse(struct svs_platform *svsp, + const struct svs_platform_data *pdata) { - struct svs_bank *svsb; - u32 idx, i, golden_temp; - int ret; + const struct svs_fusemap *gfmap =3D pdata->glb_fuse_map; + struct svs_fusemap tfm =3D { 0, 24 }; + u32 golden_temp, val; + u8 ft_pgm, vmin; + int i; =20 - for (i =3D 0; i < svsp->efuse_max; i++) - if (svsp->efuse[i]) - dev_info(svsp->dev, "M_HW_RES%d: 0x%08x\n", - i, svsp->efuse[i]); - - if (!svsp->efuse[5]) { - dev_notice(svsp->dev, "svs_efuse[5] =3D 0x0?\n"); + if (!svs_is_available(svsp)) return false; - } - - /* Svs efuse parsing */ - for (idx =3D 0; idx < svsp->bank_max; idx++) { - svsb =3D &svsp->banks[idx]; - - if (svsb->type =3D=3D SVSB_TYPE_LOW) { - svsb->mtdes =3D svsp->efuse[5] & GENMASK(7, 0); - svsb->bdes =3D (svsp->efuse[5] >> 16) & GENMASK(7, 0); - svsb->mdes =3D (svsp->efuse[5] >> 24) & GENMASK(7, 0); - svsb->dcbdet =3D (svsp->efuse[15] >> 16) & GENMASK(7, 0); - svsb->dcmdet =3D (svsp->efuse[15] >> 24) & GENMASK(7, 0); - } else if (svsb->type =3D=3D SVSB_TYPE_HIGH) { - svsb->mtdes =3D svsp->efuse[4] & GENMASK(7, 0); - svsb->bdes =3D (svsp->efuse[4] >> 16) & GENMASK(7, 0); - svsb->mdes =3D (svsp->efuse[4] >> 24) & GENMASK(7, 0); - svsb->dcbdet =3D svsp->efuse[14] & GENMASK(7, 0); - svsb->dcmdet =3D (svsp->efuse[14] >> 8) & GENMASK(7, 0); - } - - svsb->vmax +=3D svsb->dvt_fixed; - } - - for (i =3D 0; i < svsp->tefuse_max; i++) - if (svsp->tefuse[i] !=3D 0) - break; - - if (i =3D=3D svsp->tefuse_max) - golden_temp =3D 50; /* All thermal efuse data are 0 */ - else - golden_temp =3D (svsp->tefuse[0] >> 24) & GENMASK(7, 0); - - for (idx =3D 0; idx < svsp->bank_max; idx++) { - svsb =3D &svsp->banks[idx]; - svsb->mts =3D 500; - svsb->bts =3D (((500 * golden_temp + 250460) / 1000) - 25) * 4; - } =20 - return true; -} + /* Get golden temperature from SVS-Thermal calibration */ + val =3D svs_get_fuse_val(svsp->tefuse, &tfm, 8); =20 -static bool svs_mt8186_efuse_parsing(struct svs_platform *svsp) -{ - struct svs_bank *svsb; - u32 idx, i, golden_temp; - int ret; + /* If golden temp is not programmed, use the default of 50 */ + golden_temp =3D val ? val : 50; =20 - for (i =3D 0; i < svsp->efuse_max; i++) - if (svsp->efuse[i]) - dev_info(svsp->dev, "M_HW_RES%d: 0x%08x\n", - i, svsp->efuse[i]); + /* Parse fused SVS calibration */ + ft_pgm =3D svs_get_fuse_val(svsp->efuse, &gfmap[GLB_FT_PGM], 8); + vmin =3D svs_get_fuse_val(svsp->efuse, &gfmap[GLB_VMIN], 2); =20 - if (!svsp->efuse[0]) { - dev_notice(svsp->dev, "svs_efuse[0] =3D 0x0?\n"); - return false; - } + for (i =3D 0; i < svsp->bank_max; i++) { + struct svs_bank *svsb =3D &svsp->banks[i]; + const struct svs_fusemap *dfmap =3D svsb->dev_fuse_map; =20 - /* Svs efuse parsing */ - for (idx =3D 0; idx < svsp->bank_max; idx++) { - svsb =3D &svsp->banks[idx]; + if (vmin =3D=3D 1) + svsb->vmin =3D 0x1e; =20 - switch (svsb->sw_id) { - case SVSB_SWID_CPU_BIG: - if (svsb->type =3D=3D SVSB_TYPE_HIGH) { - svsb->mdes =3D (svsp->efuse[2] >> 24) & GENMASK(7, 0); - svsb->bdes =3D (svsp->efuse[2] >> 16) & GENMASK(7, 0); - svsb->mtdes =3D svsp->efuse[2] & GENMASK(7, 0); - svsb->dcmdet =3D (svsp->efuse[13] >> 8) & GENMASK(7, 0); - svsb->dcbdet =3D svsp->efuse[13] & GENMASK(7, 0); - } else if (svsb->type =3D=3D SVSB_TYPE_LOW) { - svsb->mdes =3D (svsp->efuse[3] >> 24) & GENMASK(7, 0); - svsb->bdes =3D (svsp->efuse[3] >> 16) & GENMASK(7, 0); - svsb->mtdes =3D svsp->efuse[3] & GENMASK(7, 0); - svsb->dcmdet =3D (svsp->efuse[14] >> 24) & GENMASK(7, 0); - svsb->dcbdet =3D (svsp->efuse[14] >> 16) & GENMASK(7, 0); - } - break; - case SVSB_SWID_CPU_LITTLE: - svsb->mdes =3D (svsp->efuse[4] >> 24) & GENMASK(7, 0); - svsb->bdes =3D (svsp->efuse[4] >> 16) & GENMASK(7, 0); - svsb->mtdes =3D svsp->efuse[4] & GENMASK(7, 0); - svsb->dcmdet =3D (svsp->efuse[14] >> 8) & GENMASK(7, 0); - svsb->dcbdet =3D svsp->efuse[14] & GENMASK(7, 0); - break; - case SVSB_SWID_CCI: - svsb->mdes =3D (svsp->efuse[5] >> 24) & GENMASK(7, 0); - svsb->bdes =3D (svsp->efuse[5] >> 16) & GENMASK(7, 0); - svsb->mtdes =3D svsp->efuse[5] & GENMASK(7, 0); - svsb->dcmdet =3D (svsp->efuse[15] >> 24) & GENMASK(7, 0); - svsb->dcbdet =3D (svsp->efuse[15] >> 16) & GENMASK(7, 0); - break; - case SVSB_SWID_GPU: - svsb->mdes =3D (svsp->efuse[6] >> 24) & GENMASK(7, 0); - svsb->bdes =3D (svsp->efuse[6] >> 16) & GENMASK(7, 0); - svsb->mtdes =3D svsp->efuse[6] & GENMASK(7, 0); - svsb->dcmdet =3D (svsp->efuse[15] >> 8) & GENMASK(7, 0); - svsb->dcbdet =3D svsp->efuse[15] & GENMASK(7, 0); - break; - default: - dev_err(svsb->dev, "unknown sw_id: %u\n", svsb->sw_id); - return false; - } + if (ft_pgm =3D=3D 0) + svsb->volt_flags |=3D SVSB_INIT01_VOLT_IGNORE; =20 + svsb->mtdes =3D svs_get_fuse_val(svsp->efuse, &dfmap[BDEV_MTDES], 8); + svsb->bdes =3D svs_get_fuse_val(svsp->efuse, &dfmap[BDEV_BDES], 8); + svsb->mdes =3D svs_get_fuse_val(svsp->efuse, &dfmap[BDEV_MDES], 8); + svsb->dcbdet =3D svs_get_fuse_val(svsp->efuse, &dfmap[BDEV_DCBDET], 8); + svsb->dcmdet =3D svs_get_fuse_val(svsp->efuse, &dfmap[BDEV_DCMDET], 8); svsb->vmax +=3D svsb->dvt_fixed; - } - - golden_temp =3D (svsp->tefuse[0] >> 24) & GENMASK(7, 0); - if (!golden_temp) - golden_temp =3D 50; =20 - for (idx =3D 0; idx < svsp->bank_max; idx++) { - svsb =3D &svsp->banks[idx]; - svsb->mts =3D 409; - svsb->bts =3D (((500 * golden_temp + 204650) / 1000) - 25) * 4; + svsb->mts =3D (svsp->ts_coeff * 2) / 1000; + svsb->bts =3D (((500 * golden_temp + svsp->ts_coeff) / 1000) - 25) * 4; } =20 return true; } =20 -static bool svs_mt8183_efuse_parsing(struct svs_platform *svsp) +static bool svs_mt8183_efuse_parsing(struct svs_platform *svsp, + const struct svs_platform_data *pdata) { struct svs_bank *svsb; int format[6], x_roomt[6], o_vtsmcu[5], o_vtsabb, tb_roomt =3D 0; @@ -2115,65 +1937,43 @@ static bool svs_mt8183_efuse_parsing(struct svs_pla= tform *svsp) } =20 /* Svs efuse parsing */ - ft_pgm =3D (svsp->efuse[0] >> 4) & GENMASK(3, 0); + ft_pgm =3D svs_get_fuse_val(svsp->efuse, &pdata->glb_fuse_map[GLB_FT_PGM]= , 4); =20 for (idx =3D 0; idx < svsp->bank_max; idx++) { svsb =3D &svsp->banks[idx]; + const struct svs_fusemap *dfmap =3D svsb->dev_fuse_map; =20 if (ft_pgm <=3D 1) svsb->volt_flags |=3D SVSB_INIT01_VOLT_IGNORE; =20 + svsb->mtdes =3D svs_get_fuse_val(svsp->efuse, &dfmap[BDEV_MTDES], 8); + svsb->bdes =3D svs_get_fuse_val(svsp->efuse, &dfmap[BDEV_BDES], 8); + svsb->mdes =3D svs_get_fuse_val(svsp->efuse, &dfmap[BDEV_MDES], 8); + svsb->dcbdet =3D svs_get_fuse_val(svsp->efuse, &dfmap[BDEV_DCBDET], 8); + svsb->dcmdet =3D svs_get_fuse_val(svsp->efuse, &dfmap[BDEV_DCMDET], 8); + switch (svsb->sw_id) { case SVSB_SWID_CPU_LITTLE: - svsb->bdes =3D svsp->efuse[16] & GENMASK(7, 0); - svsb->mdes =3D (svsp->efuse[16] >> 8) & GENMASK(7, 0); - svsb->dcbdet =3D (svsp->efuse[16] >> 16) & GENMASK(7, 0); - svsb->dcmdet =3D (svsp->efuse[16] >> 24) & GENMASK(7, 0); - svsb->mtdes =3D (svsp->efuse[17] >> 16) & GENMASK(7, 0); - + case SVSB_SWID_CCI: if (ft_pgm <=3D 3) svsb->volt_od +=3D 10; else svsb->volt_od +=3D 2; break; case SVSB_SWID_CPU_BIG: - svsb->bdes =3D svsp->efuse[18] & GENMASK(7, 0); - svsb->mdes =3D (svsp->efuse[18] >> 8) & GENMASK(7, 0); - svsb->dcbdet =3D (svsp->efuse[18] >> 16) & GENMASK(7, 0); - svsb->dcmdet =3D (svsp->efuse[18] >> 24) & GENMASK(7, 0); - svsb->mtdes =3D svsp->efuse[17] & GENMASK(7, 0); - if (ft_pgm <=3D 3) svsb->volt_od +=3D 15; else svsb->volt_od +=3D 12; break; - case SVSB_SWID_CCI: - svsb->bdes =3D svsp->efuse[4] & GENMASK(7, 0); - svsb->mdes =3D (svsp->efuse[4] >> 8) & GENMASK(7, 0); - svsb->dcbdet =3D (svsp->efuse[4] >> 16) & GENMASK(7, 0); - svsb->dcmdet =3D (svsp->efuse[4] >> 24) & GENMASK(7, 0); - svsb->mtdes =3D (svsp->efuse[5] >> 16) & GENMASK(7, 0); - - if (ft_pgm <=3D 3) - svsb->volt_od +=3D 10; - else - svsb->volt_od +=3D 2; - break; case SVSB_SWID_GPU: - svsb->bdes =3D svsp->efuse[6] & GENMASK(7, 0); - svsb->mdes =3D (svsp->efuse[6] >> 8) & GENMASK(7, 0); - svsb->dcbdet =3D (svsp->efuse[6] >> 16) & GENMASK(7, 0); - svsb->dcmdet =3D (svsp->efuse[6] >> 24) & GENMASK(7, 0); - svsb->mtdes =3D svsp->efuse[5] & GENMASK(7, 0); - - if (ft_pgm >=3D 2) { + if (ft_pgm !=3D FUSE_DATA_NOT_VALID && ft_pgm >=3D 2) { svsb->freq_base =3D 800000000; /* 800MHz */ svsb->dvt_fixed =3D 2; } break; default: - dev_err(svsb->dev, "unknown sw_id: %u\n", svsb->sw_id); + dev_err(svsb->dev, "unknown sw_id: %u\n", bdata->sw_id); return false; } } @@ -2904,7 +2704,7 @@ static struct svs_bank svs_mt8183_banks[] =3D { static const struct svs_platform_data svs_mt8195_platform_data =3D { .name =3D "mt8195-svs", .banks =3D svs_mt8195_banks, - .efuse_parsing =3D svs_mt8195_efuse_parsing, + .efuse_parsing =3D svs_common_parse_efuse, .probe =3D svs_mt8192_platform_probe, .regs =3D svs_regs_v2, .bank_max =3D ARRAY_SIZE(svs_mt8195_banks), @@ -2917,7 +2717,7 @@ static const struct svs_platform_data svs_mt8195_plat= form_data =3D { static const struct svs_platform_data svs_mt8192_platform_data =3D { .name =3D "mt8192-svs", .banks =3D svs_mt8192_banks, - .efuse_parsing =3D svs_mt8192_efuse_parsing, + .efuse_parsing =3D svs_common_parse_efuse, .probe =3D svs_mt8192_platform_probe, .regs =3D svs_regs_v2, .bank_max =3D ARRAY_SIZE(svs_mt8192_banks), @@ -2931,7 +2731,7 @@ static const struct svs_platform_data svs_mt8192_plat= form_data =3D { static const struct svs_platform_data svs_mt8188_platform_data =3D { .name =3D "mt8188-svs", .banks =3D svs_mt8188_banks, - .efuse_parsing =3D svs_mt8188_efuse_parsing, + .efuse_parsing =3D svs_common_parse_efuse, .probe =3D svs_mt8192_platform_probe, .regs =3D svs_regs_v2, .bank_max =3D ARRAY_SIZE(svs_mt8188_banks), @@ -2945,7 +2745,7 @@ static const struct svs_platform_data svs_mt8188_plat= form_data =3D { static const struct svs_platform_data svs_mt8186_platform_data =3D { .name =3D "mt8186-svs", .banks =3D svs_mt8186_banks, - .efuse_parsing =3D svs_mt8186_efuse_parsing, + .efuse_parsing =3D svs_common_parse_efuse, .probe =3D svs_mt8186_platform_probe, .regs =3D svs_regs_v2, .bank_max =3D ARRAY_SIZE(svs_mt8186_banks), @@ -3025,7 +2825,7 @@ static int svs_probe(struct platform_device *pdev) goto svs_probe_free_efuse; } =20 - if (!svsp_data->efuse_parsing(svsp)) { + if (!svsp_data->efuse_parsing(svsp, svsp_data)) { dev_err(svsp->dev, "efuse data parsing failed\n"); ret =3D -EPERM; goto svs_probe_free_tefuse; --=20 2.42.0