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[31.11.218.106]) by smtp.gmail.com with ESMTPSA id u10-20020a170906408a00b009e5d30422ebsm8412710ejj.101.2023.11.16.05.13.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Nov 2023 05:13:23 -0800 (PST) From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno Cc: "Rafael J . Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Sascha Hauer , linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= Subject: [PATCH V2] dt-bindings: thermal: convert Mediatek Thermal to the json-schema Date: Thu, 16 Nov 2023 14:13:16 +0100 Message-Id: <20231116131316.5897-1-zajec5@gmail.com> X-Mailer: git-send-email 2.35.3 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Rafa=C5=82 Mi=C5=82ecki This helps validating DTS files. Signed-off-by: Rafa=C5=82 Mi=C5=82ecki --- V2: Add "maintainers" .../bindings/thermal/mediatek-thermal.txt | 52 --------- .../bindings/thermal/mediatek-thermal.yaml | 101 ++++++++++++++++++ 2 files changed, 101 insertions(+), 52 deletions(-) delete mode 100644 Documentation/devicetree/bindings/thermal/mediatek-ther= mal.txt create mode 100644 Documentation/devicetree/bindings/thermal/mediatek-ther= mal.yaml diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt= b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt deleted file mode 100644 index ac39c7156fde..000000000000 --- a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt +++ /dev/null @@ -1,52 +0,0 @@ -* Mediatek Thermal - -This describes the device tree binding for the Mediatek thermal controller -which measures the on-SoC temperatures. This device does not have its own = ADC, -instead it directly controls the AUXADC via AHB bus accesses. For this rea= son -this device needs phandles to the AUXADC. Also it controls a mux in the -apmixedsys register space via AHB bus accesses, so a phandle to the APMIXE= DSYS -is also needed. - -Required properties: -- compatible: - - "mediatek,mt8173-thermal" : For MT8173 family of SoCs - - "mediatek,mt2701-thermal" : For MT2701 family of SoCs - - "mediatek,mt2712-thermal" : For MT2712 family of SoCs - - "mediatek,mt7622-thermal" : For MT7622 SoC - - "mediatek,mt7981-thermal", "mediatek,mt7986-thermal" : For MT7981 SoC - - "mediatek,mt7986-thermal" : For MT7986 SoC - - "mediatek,mt8183-thermal" : For MT8183 family of SoCs - - "mediatek,mt8365-thermal" : For MT8365 family of SoCs - - "mediatek,mt8516-thermal", "mediatek,mt2701-thermal : For MT8516 famil= y of SoCs -- reg: Address range of the thermal controller -- interrupts: IRQ for the thermal controller -- clocks, clock-names: Clocks needed for the thermal controller. required - clocks are: - "therm": Main clock needed for register access - "auxadc": The AUXADC clock -- mediatek,auxadc: A phandle to the AUXADC which the thermal controller us= es -- mediatek,apmixedsys: A phandle to the APMIXEDSYS controller. -- #thermal-sensor-cells : Should be 0. See Documentation/devicetree/bindin= gs/thermal/thermal-sensor.yaml for a description. - -Optional properties: -- resets: Reference to the reset controller controlling the thermal contro= ller. -- nvmem-cells: A phandle to the calibration data provided by a nvmem devic= e. If - unspecified default values shall be used. -- nvmem-cell-names: Should be "calibration-data" - -Example: - - thermal: thermal@1100b000 { - #thermal-sensor-cells =3D <1>; - compatible =3D "mediatek,mt8173-thermal"; - reg =3D <0 0x1100b000 0 0x1000>; - interrupts =3D <0 70 IRQ_TYPE_LEVEL_LOW>; - clocks =3D <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>; - clock-names =3D "therm", "auxadc"; - resets =3D <&pericfg MT8173_PERI_THERM_SW_RST>; - reset-names =3D "therm"; - mediatek,auxadc =3D <&auxadc>; - mediatek,apmixedsys =3D <&apmixedsys>; - nvmem-cells =3D <&thermal_calibration_data>; - nvmem-cell-names =3D "calibration-data"; - }; diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.yam= l b/Documentation/devicetree/bindings/thermal/mediatek-thermal.yaml new file mode 100644 index 000000000000..faeb4d6c6dd4 --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/mediatek-thermal.yaml @@ -0,0 +1,101 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/thermal/mediatek-thermal.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek Thermal + +maintainers: + - Sascha Hauer + +description: > + This describes the device tree binding for the Mediatek thermal controll= er + which measures the on-SoC temperatures. This device does not have its ow= n ADC, + instead it directly controls the AUXADC via AHB bus accesses. For this r= eason + this device needs phandles to the AUXADC. Also it controls a mux in the + apmixedsys register space via AHB bus accesses, so a phandle to the APMI= XEDSYS + is also needed. + +allOf: + - $ref: thermal-sensor.yaml# + +properties: + compatible: + enum: + - mediatek,mt2701-thermal + - mediatek,mt2712-thermal + - mediatek,mt7622-thermal + - mediatek,mt7981-thermal + - mediatek,mt7986-thermal + - mediatek,mt8173-thermal + - mediatek,mt8183-thermal + - mediatek,mt8365-thermal + - mediatek,mt8516-thermal + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: Main clock needed for register access + - description: The AUXADC clock + + clock-names: + items: + - const: therm + - const: auxadc + + mediatek,auxadc: + $ref: /schemas/types.yaml#/definitions/phandle + description: A phandle to the AUXADC which the thermal controller uses + + mediatek,apmixedsys: + $ref: /schemas/types.yaml#/definitions/phandle + description: A phandle to the APMIXEDSYS controller + + resets: Reference to the reset controller controlling the thermal contro= ller. + + nvmem-cells: + items: + - description: > + NVMEM cell with EEPROMA phandle to the calibration data provided= by an + NVMEM device. If unspecified default values shall be used. + + nvmem-cell-names: + items: + - const: calibration-data + +unevaluatedProperties: false + +required: + - reg + - interrupts + - clocks + - clock-names + - mediatek,auxadc + - mediatek,apmixedsys + +examples: + - | + #include + #include + #include + + thermal@1100b000 { + compatible =3D "mediatek,mt8173-thermal"; + reg =3D <0x1100b000 0x1000>; + interrupts =3D <0 70 IRQ_TYPE_LEVEL_LOW>; + clocks =3D <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>; + clock-names =3D "therm", "auxadc"; + resets =3D <&pericfg MT8173_PERI_THERM_SW_RST>; + reset-names =3D "therm"; + mediatek,auxadc =3D <&auxadc>; + mediatek,apmixedsys =3D <&apmixedsys>; + nvmem-cells =3D <&thermal_calibration_data>; + nvmem-cell-names =3D "calibration-data"; + #thermal-sensor-cells =3D <1>; + }; --=20 2.35.3