From nobody Fri Dec 19 04:51:02 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3C4CFC54FBA for ; Wed, 15 Nov 2023 14:41:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235012AbjKOOlv (ORCPT ); Wed, 15 Nov 2023 09:41:51 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44952 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234998AbjKOOlJ (ORCPT ); Wed, 15 Nov 2023 09:41:09 -0500 Received: from relay9-d.mail.gandi.net (relay9-d.mail.gandi.net [217.70.183.199]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F16B1D68; Wed, 15 Nov 2023 06:40:42 -0800 (PST) Received: by mail.gandi.net (Postfix) with ESMTPA id 23A83FF806; Wed, 15 Nov 2023 14:40:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1700059241; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=qGg3acl9dPUDPC44eUjx/X9VrqrNtOGTzPuj0B8/OIo=; b=e89B9u788SbiUpQ6wJZbqq+4iGGgrZZ2vydGV+BSfU9SWfZcp+Y49TTVcwXoeFPif1Me6F NnWr1s78axkSJLiy5rR+wcFBHbJKsIlTL3Bq9yvsytMhbYqPhbOy/b8wLXF3nL9pl26GFZ AnSwA9NydXLapodVI0FlBkzvvK/l43T0jgsmeFvT0YGdPlHKEbXcZoW/zOtCNp1G/w8/H2 RrW7qE/Zz9fgaWhqa/ES1AZtU1XKHMJCh2yKmXrdqSFqOslvyGBxeF26t8EX/nNVHMRaLS APb+JQx1PsOzplndAvq6bqQ9M4wvBuZjJxb/my4I7XxIKit7zmBIapQs1uHEAw== From: Herve Codina To: Herve Codina , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Andrew Lunn , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lee Jones , Linus Walleij , Qiang Zhao , Li Yang , Liam Girdwood , Mark Brown , Jaroslav Kysela , Takashi Iwai , Shengjiu Wang , Xiubo Li , Fabio Estevam , Nicolin Chen , Christophe Leroy , Randy Dunlap Cc: netdev@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, alsa-devel@alsa-project.org, Simon Horman , Christophe JAILLET , Thomas Petazzoni Subject: [PATCH v9 16/27] soc: fsl: cpm1: qmc: Introduce is_tsa_64rxtx flag Date: Wed, 15 Nov 2023 15:39:52 +0100 Message-ID: <20231115144007.478111-17-herve.codina@bootlin.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231115144007.478111-1-herve.codina@bootlin.com> References: <20231115144007.478111-1-herve.codina@bootlin.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-GND-Sasl: herve.codina@bootlin.com Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" In order to support runtime timeslot route changes, some operations will be different according the routing table used (common Rx and Tx table or one table for Rx and one for Tx). The is_tsa_64rxtx flag is introduced to avoid extra computation to determine the table format each time we need it. It is set once at initialization. Signed-off-by: Herve Codina Reviewed-by: Christophe Leroy --- drivers/soc/fsl/qe/qmc.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/soc/fsl/qe/qmc.c b/drivers/soc/fsl/qe/qmc.c index 5ca4120779f8..e651b3bba1ca 100644 --- a/drivers/soc/fsl/qe/qmc.c +++ b/drivers/soc/fsl/qe/qmc.c @@ -216,6 +216,7 @@ struct qmc { u16 __iomem *int_curr; dma_addr_t int_dma_addr; size_t int_size; + bool is_tsa_64rxtx; struct list_head chan_head; struct qmc_chan *chans[64]; }; @@ -696,7 +697,7 @@ static int qmc_chan_setup_tsa(struct qmc_chan *chan, bo= ol enable) * Setup one common 64 entries table or two 32 entries (one for Tx * and one for Tx) according to assigned TS numbers. */ - if (info.nb_tx_ts > 32 || info.nb_rx_ts > 32) + if (chan->qmc->is_tsa_64rxtx) return qmc_chan_setup_tsa_64rxtx(chan, &info, enable); =20 ret =3D qmc_chan_setup_tsa_32rx(chan, &info, enable); @@ -1053,6 +1054,7 @@ static int qmc_init_tsa_64rxtx(struct qmc *qmc, const= struct tsa_serial_info *in * Everything was previously checked, Tx and Rx related stuffs are * identical -> Used Rx related stuff to build the table */ + qmc->is_tsa_64rxtx =3D true; =20 /* Invalidate all entries */ for (i =3D 0; i < 64; i++) @@ -1081,6 +1083,7 @@ static int qmc_init_tsa_32rx_32tx(struct qmc *qmc, co= nst struct tsa_serial_info * Use a Tx 32 entries table and a Rx 32 entries table. * Everything was previously checked. */ + qmc->is_tsa_64rxtx =3D false; =20 /* Invalidate all entries */ for (i =3D 0; i < 32; i++) { --=20 2.41.0