From nobody Thu Dec 18 09:42:57 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 38728C4332F for ; Mon, 13 Nov 2023 14:45:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231373AbjKMOpM (ORCPT ); Mon, 13 Nov 2023 09:45:12 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56204 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230392AbjKMOoq (ORCPT ); Mon, 13 Nov 2023 09:44:46 -0500 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CA69A1711 for ; Mon, 13 Nov 2023 06:44:42 -0800 (PST) Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 3ADEi202129614; Mon, 13 Nov 2023 08:44:02 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1699886642; bh=O0YaFPCql3t3nmS1z2ycZtV6XLM8hJsccE2jCuzoYvg=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=L9bRLHvxsMjDP4tHax4RK2/X9UVb0fjn+isitrNiIBFMC+rUqGhhJOZepCLYwxAST iO+B9y+yejoU46qB/dSyd0iWFR4QJCLzRXFXwQp05x+mouITzrAUoSZv0/xa757cgm STWdksFHiP95tNwV5cVpOBIfDCZZOJkggkWI0gW4= Received: from DLEE110.ent.ti.com (dlee110.ent.ti.com [157.170.170.21]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 3ADEi2vv032858 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 13 Nov 2023 08:44:02 -0600 Received: from DLEE101.ent.ti.com (157.170.170.31) by DLEE110.ent.ti.com (157.170.170.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 13 Nov 2023 08:44:02 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 13 Nov 2023 08:44:02 -0600 Received: from fllv0040.itg.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 3ADEi0tt065232; Mon, 13 Nov 2023 08:44:01 -0600 From: Andrew Davis To: Russell King , Baruch Siach , Vladimir Zapolskiy , Kunihiko Hayashi , Masami Hiramatsu , Arnd Bergmann , Geert Uytterhoeven , Linus Walleij CC: , , Andrew Davis Subject: [PATCH v3 1/9] ARM: Kconfig: move platform selection into its own Kconfig file Date: Mon, 13 Nov 2023 08:43:51 -0600 Message-ID: <20231113144359.174140-2-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231113144359.174140-1-afd@ti.com> References: <20231113144359.174140-1-afd@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Mostly just for better organization for now. This matches what is done on some other platforms including ARM64. This also lets us start to reduce the number of mach- directories that only exist to store the platform selection. Start with "Platform selection" and ARCH_VIRT. Signed-off-by: Andrew Davis --- arch/arm/Kconfig | 67 +------------------------------------ arch/arm/Kconfig.platforms | 68 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 69 insertions(+), 66 deletions(-) create mode 100644 arch/arm/Kconfig.platforms diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index f8567e95f98be..c39e3db466897 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -340,72 +340,7 @@ config ARCH_MULTIPLATFORM Selecting N here allows using those options, including DEBUG_UNCOMPRESS, XIP_KERNEL and ZBOOT_ROM. If unsure, say Y. =20 -menu "Platform selection" - depends on MMU - -comment "CPU Core family selection" - -config ARCH_MULTI_V4 - bool "ARMv4 based platforms (FA526, StrongARM)" - depends on !ARCH_MULTI_V6_V7 - # https://github.com/llvm/llvm-project/issues/50764 - depends on !LD_IS_LLD || LLD_VERSION >=3D 160000 - select ARCH_MULTI_V4_V5 - select CPU_FA526 if !(CPU_SA110 || CPU_SA1100) - -config ARCH_MULTI_V4T - bool "ARMv4T based platforms (ARM720T, ARM920T, ...)" - depends on !ARCH_MULTI_V6_V7 - # https://github.com/llvm/llvm-project/issues/50764 - depends on !LD_IS_LLD || LLD_VERSION >=3D 160000 - select ARCH_MULTI_V4_V5 - select CPU_ARM920T if !(CPU_ARM7TDMI || CPU_ARM720T || \ - CPU_ARM740T || CPU_ARM9TDMI || CPU_ARM922T || \ - CPU_ARM925T || CPU_ARM940T) - -config ARCH_MULTI_V5 - bool "ARMv5 based platforms (ARM926T, XSCALE, PJ1, ...)" - depends on !ARCH_MULTI_V6_V7 - select ARCH_MULTI_V4_V5 - select CPU_ARM926T if !(CPU_ARM946E || CPU_ARM1020 || \ - CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || \ - CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_FEROCEON) - -config ARCH_MULTI_V4_V5 - bool - -config ARCH_MULTI_V6 - bool "ARMv6 based platforms (ARM11)" - select ARCH_MULTI_V6_V7 - select CPU_V6K - -config ARCH_MULTI_V7 - bool "ARMv7 based platforms (Cortex-A, PJ4, Scorpion, Krait)" - default y - select ARCH_MULTI_V6_V7 - select CPU_V7 - select HAVE_SMP - -config ARCH_MULTI_V6_V7 - bool - select MIGHT_HAVE_CACHE_L2X0 - -config ARCH_MULTI_CPU_AUTO - def_bool !(ARCH_MULTI_V4 || ARCH_MULTI_V4T || ARCH_MULTI_V6_V7) - select ARCH_MULTI_V5 - -endmenu - -config ARCH_VIRT - bool "Dummy Virtual Machine" - depends on ARCH_MULTI_V7 - select ARM_AMBA - select ARM_GIC - select ARM_GIC_V2M if PCI - select ARM_GIC_V3 - select ARM_GIC_V3_ITS if PCI - select ARM_PSCI - select HAVE_ARM_ARCH_TIMER +source "arch/arm/Kconfig.platforms" =20 config ARCH_AIROHA bool "Airoha SoC Support" diff --git a/arch/arm/Kconfig.platforms b/arch/arm/Kconfig.platforms new file mode 100644 index 0000000000000..ed1f6da11e243 --- /dev/null +++ b/arch/arm/Kconfig.platforms @@ -0,0 +1,68 @@ +# SPDX-License-Identifier: GPL-2.0-only + +menu "Platform selection" + depends on MMU + +comment "CPU Core family selection" + +config ARCH_MULTI_V4 + bool "ARMv4 based platforms (FA526, StrongARM)" + depends on !ARCH_MULTI_V6_V7 + # https://github.com/llvm/llvm-project/issues/50764 + depends on !LD_IS_LLD || LLD_VERSION >=3D 160000 + select ARCH_MULTI_V4_V5 + select CPU_FA526 if !(CPU_SA110 || CPU_SA1100) + +config ARCH_MULTI_V4T + bool "ARMv4T based platforms (ARM720T, ARM920T, ...)" + depends on !ARCH_MULTI_V6_V7 + # https://github.com/llvm/llvm-project/issues/50764 + depends on !LD_IS_LLD || LLD_VERSION >=3D 160000 + select ARCH_MULTI_V4_V5 + select CPU_ARM920T if !(CPU_ARM7TDMI || CPU_ARM720T || \ + CPU_ARM740T || CPU_ARM9TDMI || CPU_ARM922T || \ + CPU_ARM925T || CPU_ARM940T) + +config ARCH_MULTI_V5 + bool "ARMv5 based platforms (ARM926T, XSCALE, PJ1, ...)" + depends on !ARCH_MULTI_V6_V7 + select ARCH_MULTI_V4_V5 + select CPU_ARM926T if !(CPU_ARM946E || CPU_ARM1020 || \ + CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || \ + CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_FEROCEON) + +config ARCH_MULTI_V4_V5 + bool + +config ARCH_MULTI_V6 + bool "ARMv6 based platforms (ARM11)" + select ARCH_MULTI_V6_V7 + select CPU_V6K + +config ARCH_MULTI_V7 + bool "ARMv7 based platforms (Cortex-A, PJ4, Scorpion, Krait)" + default y + select ARCH_MULTI_V6_V7 + select CPU_V7 + select HAVE_SMP + +config ARCH_MULTI_V6_V7 + bool + select MIGHT_HAVE_CACHE_L2X0 + +config ARCH_MULTI_CPU_AUTO + def_bool !(ARCH_MULTI_V4 || ARCH_MULTI_V4T || ARCH_MULTI_V6_V7) + select ARCH_MULTI_V5 + +endmenu + +config ARCH_VIRT + bool "Dummy Virtual Machine" + depends on ARCH_MULTI_V7 + select ARM_AMBA + select ARM_GIC + select ARM_GIC_V2M if PCI + select ARM_GIC_V3 + select ARM_GIC_V3_ITS if PCI + select ARM_PSCI + select HAVE_ARM_ARCH_TIMER --=20 2.39.2 From nobody Thu Dec 18 09:42:57 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 62BB0C4167B for ; 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Mon, 13 Nov 2023 08:44:02 -0600 Received: from DFLE109.ent.ti.com (10.64.6.30) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 13 Nov 2023 08:44:02 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 13 Nov 2023 08:44:02 -0600 Received: from fllv0040.itg.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 3ADEi0tu065232; Mon, 13 Nov 2023 08:44:02 -0600 From: Andrew Davis To: Russell King , Baruch Siach , Vladimir Zapolskiy , Kunihiko Hayashi , Masami Hiramatsu , Arnd Bergmann , Geert Uytterhoeven , Linus Walleij CC: , , Andrew Davis Subject: [PATCH v3 2/9] ARM: mach-asm9260: Move ASM9260 support into Kconfig.platforms Date: Mon, 13 Nov 2023 08:43:52 -0600 Message-ID: <20231113144359.174140-3-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231113144359.174140-1-afd@ti.com> References: <20231113144359.174140-1-afd@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This removes the need for a dedicated Kconfig and mach directory. Signed-off-by: Andrew Davis Reviewed-by: Oleksij Rempel --- arch/arm/Kconfig | 2 -- arch/arm/Kconfig.platforms | 9 +++++++++ arch/arm/mach-asm9260/Kconfig | 9 --------- 3 files changed, 9 insertions(+), 11 deletions(-) delete mode 100644 arch/arm/mach-asm9260/Kconfig diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index c39e3db466897..b31489f05ba86 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -364,8 +364,6 @@ source "arch/arm/mach-alpine/Kconfig" =20 source "arch/arm/mach-artpec/Kconfig" =20 -source "arch/arm/mach-asm9260/Kconfig" - source "arch/arm/mach-aspeed/Kconfig" =20 source "arch/arm/mach-at91/Kconfig" diff --git a/arch/arm/Kconfig.platforms b/arch/arm/Kconfig.platforms index ed1f6da11e243..b80a5b49d276d 100644 --- a/arch/arm/Kconfig.platforms +++ b/arch/arm/Kconfig.platforms @@ -66,3 +66,12 @@ config ARCH_VIRT select ARM_GIC_V3_ITS if PCI select ARM_PSCI select HAVE_ARM_ARCH_TIMER + +config MACH_ASM9260 + bool "Alphascale ASM9260" + depends on ARCH_MULTI_V5 + depends on CPU_LITTLE_ENDIAN + select CPU_ARM926T + select ASM9260_TIMER + help + Support for Alphascale ASM9260 based platform. diff --git a/arch/arm/mach-asm9260/Kconfig b/arch/arm/mach-asm9260/Kconfig deleted file mode 100644 index 74e0f61c74c88..0000000000000 --- a/arch/arm/mach-asm9260/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only -config MACH_ASM9260 - bool "Alphascale ASM9260" - depends on ARCH_MULTI_V5 - depends on CPU_LITTLE_ENDIAN - select CPU_ARM926T - select ASM9260_TIMER - help - Support for Alphascale ASM9260 based platform. --=20 2.39.2 From nobody Thu Dec 18 09:42:57 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 58E8CC4167D for ; Mon, 13 Nov 2023 14:44:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231260AbjKMOow (ORCPT ); Mon, 13 Nov 2023 09:44:52 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56134 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230124AbjKMOon (ORCPT ); Mon, 13 Nov 2023 09:44:43 -0500 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 60A0C1711 for ; Mon, 13 Nov 2023 06:44:39 -0800 (PST) Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 3ADEi3h8019397; Mon, 13 Nov 2023 08:44:03 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1699886643; bh=W2gD0fxTZBz0SdP6+dLyeXNWTwo/KNUYEabAiDwun08=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=fb64ZCHOPkA4HVr/7Q37geyN+6be4mGPOkjs4sprh0IcRTkhVjFekuXbYhvfA1vVB SwSvHTnraBgvz2jXADD7UIMknfeQeB/XjNoCHDLzmJXxFcHDGRKfbgIOuLJQZj9y3s Wliz5z2kuqhnwaGbY3wFWCIVA0H5XwF/Z+13fjJU= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 3ADEi3ol020150 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 13 Nov 2023 08:44:03 -0600 Received: from DFLE104.ent.ti.com (10.64.6.25) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 13 Nov 2023 08:44:03 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 13 Nov 2023 08:44:03 -0600 Received: from fllv0040.itg.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 3ADEi0tv065232; Mon, 13 Nov 2023 08:44:02 -0600 From: Andrew Davis To: Russell King , Baruch Siach , Vladimir Zapolskiy , Kunihiko Hayashi , Masami Hiramatsu , Arnd Bergmann , Geert Uytterhoeven , Linus Walleij CC: , , Andrew Davis Subject: [PATCH v3 3/9] ARM: mach-rda: Move RDA Micro support into Kconfig.platforms Date: Mon, 13 Nov 2023 08:43:53 -0600 Message-ID: <20231113144359.174140-4-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231113144359.174140-1-afd@ti.com> References: <20231113144359.174140-1-afd@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This removes the need for a dedicated Kconfig and empty mach directory. Signed-off-by: Andrew Davis --- arch/arm/Kconfig | 2 -- arch/arm/Kconfig.platforms | 8 ++++++++ arch/arm/mach-rda/Kconfig | 8 -------- 3 files changed, 8 insertions(+), 10 deletions(-) delete mode 100644 arch/arm/mach-rda/Kconfig diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index b31489f05ba86..e1aeaf25d7aab 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -438,8 +438,6 @@ source "arch/arm/mach-pxa/Kconfig" =20 source "arch/arm/mach-qcom/Kconfig" =20 -source "arch/arm/mach-rda/Kconfig" - source "arch/arm/mach-realtek/Kconfig" =20 source "arch/arm/mach-rpc/Kconfig" diff --git a/arch/arm/Kconfig.platforms b/arch/arm/Kconfig.platforms index b80a5b49d276d..80f5b040e6ef4 100644 --- a/arch/arm/Kconfig.platforms +++ b/arch/arm/Kconfig.platforms @@ -75,3 +75,11 @@ config MACH_ASM9260 select ASM9260_TIMER help Support for Alphascale ASM9260 based platform. + +config ARCH_RDA + bool "RDA Micro SoCs" + depends on ARCH_MULTI_V7 + select RDA_INTC + select RDA_TIMER + help + This enables support for the RDA Micro 8810PL SoC family. diff --git a/arch/arm/mach-rda/Kconfig b/arch/arm/mach-rda/Kconfig deleted file mode 100644 index 4d2e4e046cb35..0000000000000 --- a/arch/arm/mach-rda/Kconfig +++ /dev/null @@ -1,8 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only -menuconfig ARCH_RDA - bool "RDA Micro SoCs" - depends on ARCH_MULTI_V7 - select RDA_INTC - select RDA_TIMER - help - This enables support for the RDA Micro 8810PL SoC family. --=20 2.39.2 From nobody Thu Dec 18 09:42:57 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A878CC4332F for ; Mon, 13 Nov 2023 14:44:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230306AbjKMOoo (ORCPT ); Mon, 13 Nov 2023 09:44:44 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56118 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229612AbjKMOom (ORCPT ); Mon, 13 Nov 2023 09:44:42 -0500 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7891210FB for ; Mon, 13 Nov 2023 06:44:38 -0800 (PST) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 3ADEi4Y8019402; Mon, 13 Nov 2023 08:44:04 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1699886644; bh=2SyH5C6gOJmXesbqq8s7jtqwxCiGGHT1GOwL0ZOwhnQ=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=zJpLzYSVyeh4NYyHTiYMY/bdtcIGJDFlKSyiHaiQey6TgMn7N1cQV1IdObnA6PfAq Cf1caAMffkMQr85885EMqq/aPJWLXIwP9t5vicopxJ4NahRLv59qZbArrnN/ygCD+5 yfNQQ4J75UgCSA2oKleM2RAwP1GvXgcXq3SUX2KU= Received: from DFLE109.ent.ti.com (dfle109.ent.ti.com [10.64.6.30]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 3ADEi40q094092 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 13 Nov 2023 08:44:04 -0600 Received: from DFLE110.ent.ti.com (10.64.6.31) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 13 Nov 2023 08:44:03 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE110.ent.ti.com (10.64.6.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 13 Nov 2023 08:44:03 -0600 Received: from fllv0040.itg.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 3ADEi0tw065232; Mon, 13 Nov 2023 08:44:03 -0600 From: Andrew Davis To: Russell King , Baruch Siach , Vladimir Zapolskiy , Kunihiko Hayashi , Masami Hiramatsu , Arnd Bergmann , Geert Uytterhoeven , Linus Walleij CC: , , Andrew Davis Subject: [PATCH v3 4/9] ARM: mach-uniphier: Move Socionext UniPhier support into Kconfig.platforms Date: Mon, 13 Nov 2023 08:43:54 -0600 Message-ID: <20231113144359.174140-5-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231113144359.174140-1-afd@ti.com> References: <20231113144359.174140-1-afd@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This removes the need for a dedicated Kconfig and empty mach directory. Signed-off-by: Andrew Davis Reviewed-by: Masami Hiramatsu (Google) --- MAINTAINERS | 1 - arch/arm/Kconfig | 2 -- arch/arm/Kconfig.platforms | 15 +++++++++++++++ arch/arm/mach-uniphier/Kconfig | 15 --------------- 4 files changed, 15 insertions(+), 18 deletions(-) delete mode 100644 arch/arm/mach-uniphier/Kconfig diff --git a/MAINTAINERS b/MAINTAINERS index 97f51d5ec1cfd..b1ee757a4306d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2957,7 +2957,6 @@ F: Documentation/devicetree/bindings/pinctrl/socionex= t,uniphier-pinctrl.yaml F: Documentation/devicetree/bindings/soc/socionext/socionext,uniphier*.yaml F: arch/arm/boot/dts/socionext/uniphier* F: arch/arm/include/asm/hardware/cache-uniphier.h -F: arch/arm/mach-uniphier/ F: arch/arm/mm/cache-uniphier.c F: arch/arm64/boot/dts/socionext/uniphier* F: drivers/bus/uniphier-system-bus.c diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index e1aeaf25d7aab..cfdfba4d52e19 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -466,8 +466,6 @@ source "arch/arm/mach-sunxi/Kconfig" =20 source "arch/arm/mach-tegra/Kconfig" =20 -source "arch/arm/mach-uniphier/Kconfig" - source "arch/arm/mach-ux500/Kconfig" =20 source "arch/arm/mach-versatile/Kconfig" diff --git a/arch/arm/Kconfig.platforms b/arch/arm/Kconfig.platforms index 80f5b040e6ef4..0e6d7172bf61e 100644 --- a/arch/arm/Kconfig.platforms +++ b/arch/arm/Kconfig.platforms @@ -83,3 +83,18 @@ config ARCH_RDA select RDA_TIMER help This enables support for the RDA Micro 8810PL SoC family. + +config ARCH_UNIPHIER + bool "Socionext UniPhier SoCs" + depends on ARCH_MULTI_V7 + select ARCH_HAS_RESET_CONTROLLER + select ARM_AMBA + select ARM_GLOBAL_TIMER + select ARM_GIC + select HAVE_ARM_SCU + select HAVE_ARM_TWD if SMP + select PINCTRL + select RESET_CONTROLLER + help + Support for UniPhier SoC family developed by Socionext Inc. + (formerly, System LSI Business Division of Panasonic Corporation) diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig deleted file mode 100644 index e661d26266751..0000000000000 --- a/arch/arm/mach-uniphier/Kconfig +++ /dev/null @@ -1,15 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -config ARCH_UNIPHIER - bool "Socionext UniPhier SoCs" - depends on ARCH_MULTI_V7 - select ARCH_HAS_RESET_CONTROLLER - select ARM_AMBA - select ARM_GLOBAL_TIMER - select ARM_GIC - select HAVE_ARM_SCU - select HAVE_ARM_TWD if SMP - select PINCTRL - select RESET_CONTROLLER - help - Support for UniPhier SoC family developed by Socionext Inc. - (formerly, System LSI Business Division of Panasonic Corporation) --=20 2.39.2 From nobody Thu Dec 18 09:42:57 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CC87CC4167B for ; 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Mon, 13 Nov 2023 08:44:04 -0600 Received: from DFLE113.ent.ti.com (10.64.6.34) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 13 Nov 2023 08:44:04 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 13 Nov 2023 08:44:04 -0600 Received: from fllv0040.itg.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 3ADEi0tx065232; Mon, 13 Nov 2023 08:44:04 -0600 From: Andrew Davis To: Russell King , Baruch Siach , Vladimir Zapolskiy , Kunihiko Hayashi , Masami Hiramatsu , Arnd Bergmann , Geert Uytterhoeven , Linus Walleij CC: , , Andrew Davis Subject: [PATCH v3 5/9] ARM: mach-moxart: Move MOXA ART support into Kconfig.platforms Date: Mon, 13 Nov 2023 08:43:55 -0600 Message-ID: <20231113144359.174140-6-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231113144359.174140-1-afd@ti.com> References: <20231113144359.174140-1-afd@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This removes the need for a dedicated Kconfig and empty mach directory. Signed-off-by: Andrew Davis --- arch/arm/Kconfig | 2 -- arch/arm/Kconfig.platforms | 28 ++++++++++++++++++++++++++++ arch/arm/Makefile | 1 - arch/arm/mach-moxart/Kconfig | 28 ---------------------------- arch/arm/mach-moxart/Makefile | 4 ---- arch/arm/mach-moxart/moxart.c | 6 ------ 6 files changed, 28 insertions(+), 41 deletions(-) delete mode 100644 arch/arm/mach-moxart/Kconfig delete mode 100644 arch/arm/mach-moxart/Makefile delete mode 100644 arch/arm/mach-moxart/moxart.c diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index cfdfba4d52e19..dc906d0c3948e 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -412,8 +412,6 @@ source "arch/arm/mach-milbeaut/Kconfig" =20 source "arch/arm/mach-mmp/Kconfig" =20 -source "arch/arm/mach-moxart/Kconfig" - source "arch/arm/mach-mstar/Kconfig" =20 source "arch/arm/mach-mv78xx0/Kconfig" diff --git a/arch/arm/Kconfig.platforms b/arch/arm/Kconfig.platforms index 0e6d7172bf61e..4b5fad18ca8b0 100644 --- a/arch/arm/Kconfig.platforms +++ b/arch/arm/Kconfig.platforms @@ -76,6 +76,34 @@ config MACH_ASM9260 help Support for Alphascale ASM9260 based platform. =20 +menuconfig ARCH_MOXART + bool "MOXA ART SoC" + depends on ARCH_MULTI_V4 + depends on CPU_LITTLE_ENDIAN + select CPU_FA526 + select ARM_DMA_MEM_BUFFERABLE + select FARADAY_FTINTC010 + select FTTMR010_TIMER + select GPIOLIB + select PHYLIB if NETDEVICES + help + Say Y here if you want to run your kernel on hardware with a + MOXA ART SoC. + The MOXA ART SoC is based on a Faraday FA526 ARMv4 32-bit + 192 MHz CPU with MMU and 16KB/8KB D/I-cache (UC-7112-LX). + Used on models UC-7101, UC-7112/UC-7110, IA240/IA241, IA3341. + +if ARCH_MOXART + +config MACH_UC7112LX + bool "MOXA UC-7112-LX" + depends on ARCH_MOXART + help + Say Y here if you intend to run this kernel on a MOXA + UC-7112-LX embedded computer. + +endif + config ARCH_RDA bool "RDA Micro SoCs" depends on ARCH_MULTI_V7 diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 5ba42f69f8ce0..826738b7c7a77 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -192,7 +192,6 @@ machine-$(CONFIG_ARCH_LPC18XX) +=3D lpc18xx machine-$(CONFIG_ARCH_LPC32XX) +=3D lpc32xx machine-$(CONFIG_ARCH_MESON) +=3D meson machine-$(CONFIG_ARCH_MMP) +=3D mmp -machine-$(CONFIG_ARCH_MOXART) +=3D moxart machine-$(CONFIG_ARCH_MV78XX0) +=3D mv78xx0 machine-$(CONFIG_ARCH_MVEBU) +=3D mvebu machine-$(CONFIG_ARCH_MXC) +=3D imx diff --git a/arch/arm/mach-moxart/Kconfig b/arch/arm/mach-moxart/Kconfig deleted file mode 100644 index 909c6573ba8b1..0000000000000 --- a/arch/arm/mach-moxart/Kconfig +++ /dev/null @@ -1,28 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only -menuconfig ARCH_MOXART - bool "MOXA ART SoC" - depends on ARCH_MULTI_V4 - depends on CPU_LITTLE_ENDIAN - select CPU_FA526 - select ARM_DMA_MEM_BUFFERABLE - select FARADAY_FTINTC010 - select FTTMR010_TIMER - select GPIOLIB - select PHYLIB if NETDEVICES - help - Say Y here if you want to run your kernel on hardware with a - MOXA ART SoC. - The MOXA ART SoC is based on a Faraday FA526 ARMv4 32-bit - 192 MHz CPU with MMU and 16KB/8KB D/I-cache (UC-7112-LX). - Used on models UC-7101, UC-7112/UC-7110, IA240/IA241, IA3341. - -if ARCH_MOXART - -config MACH_UC7112LX - bool "MOXA UC-7112-LX" - depends on ARCH_MOXART - help - Say Y here if you intend to run this kernel on a MOXA - UC-7112-LX embedded computer. - -endif diff --git a/arch/arm/mach-moxart/Makefile b/arch/arm/mach-moxart/Makefile deleted file mode 100644 index ded3e38fb98d3..0000000000000 --- a/arch/arm/mach-moxart/Makefile +++ /dev/null @@ -1,4 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only -# Object file lists. - -obj-$(CONFIG_MACH_UC7112LX) +=3D moxart.o diff --git a/arch/arm/mach-moxart/moxart.c b/arch/arm/mach-moxart/moxart.c deleted file mode 100644 index f1f58c0c0fa1c..0000000000000 --- a/arch/arm/mach-moxart/moxart.c +++ /dev/null @@ -1,6 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * arch/arm/mach-moxart/moxart.c - * - * (C) Copyright 2013, Jonas Jensen - */ --=20 2.39.2 From nobody Thu Dec 18 09:42:57 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EE27EC4332F for ; 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Mon, 13 Nov 2023 08:44:05 -0600 Received: from DLEE103.ent.ti.com (157.170.170.33) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 13 Nov 2023 08:44:05 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 13 Nov 2023 08:44:05 -0600 Received: from fllv0040.itg.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 3ADEi0u0065232; Mon, 13 Nov 2023 08:44:04 -0600 From: Andrew Davis To: Russell King , Baruch Siach , Vladimir Zapolskiy , Kunihiko Hayashi , Masami Hiramatsu , Arnd Bergmann , Geert Uytterhoeven , Linus Walleij CC: , , Andrew Davis Subject: [PATCH v3 6/9] ARM: mach-airoha: Rework support and directory structure Date: Mon, 13 Nov 2023 08:43:56 -0600 Message-ID: <20231113144359.174140-7-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231113144359.174140-1-afd@ti.com> References: <20231113144359.174140-1-afd@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Having a platform need a mach-* directory should be seen as a negative, it means the platform needs special non-standard handling. ARM64 support does not allow mach-* directories at all. While we may not get to that given all the non-standard architectures we support, we should still try to get as close as we can and reduce the number of mach directories. The mach-airoha/ directory, and files within, provide just one "feature": having the kernel print the machine name if the DTB does not also contain a "model" string (which they always do). To reduce the number of mach-* directories let's do without that feature and remove this directory. It also seems there was a copy/paste error and the "MEDIATEK_DT" name was re-used in the DT_MACHINE_START macro. This may have caused conflicts if this was built in a multi-arch configuration. NOTE: The default l2c_aux_mask is now ~0 but these devices never have this type of cache controller so this is safe. Signed-off-by: Andrew Davis --- arch/arm/Kconfig | 11 ----------- arch/arm/Kconfig.platforms | 11 +++++++++++ arch/arm/Makefile | 1 - arch/arm/mach-airoha/Makefile | 2 -- arch/arm/mach-airoha/airoha.c | 16 ---------------- 5 files changed, 11 insertions(+), 30 deletions(-) delete mode 100644 arch/arm/mach-airoha/Makefile delete mode 100644 arch/arm/mach-airoha/airoha.c diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index dc906d0c3948e..fbdf366d260a6 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -342,17 +342,6 @@ config ARCH_MULTIPLATFORM =20 source "arch/arm/Kconfig.platforms" =20 -config ARCH_AIROHA - bool "Airoha SoC Support" - depends on ARCH_MULTI_V7 - select ARM_AMBA - select ARM_GIC - select ARM_GIC_V3 - select ARM_PSCI - select HAVE_ARM_ARCH_TIMER - help - Support for Airoha EN7523 SoCs - # # This is sorted alphabetically by mach-* pathname. However, plat-* # Kconfigs may be included either alphabetically (according to the diff --git a/arch/arm/Kconfig.platforms b/arch/arm/Kconfig.platforms index 4b5fad18ca8b0..38457d5a18fff 100644 --- a/arch/arm/Kconfig.platforms +++ b/arch/arm/Kconfig.platforms @@ -67,6 +67,17 @@ config ARCH_VIRT select ARM_PSCI select HAVE_ARM_ARCH_TIMER =20 +config ARCH_AIROHA + bool "Airoha SoC Support" + depends on ARCH_MULTI_V7 + select ARM_AMBA + select ARM_GIC + select ARM_GIC_V3 + select ARM_PSCI + select HAVE_ARM_ARCH_TIMER + help + Support for Airoha EN7523 SoCs + config MACH_ASM9260 bool "Alphascale ASM9260" depends on ARCH_MULTI_V5 diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 826738b7c7a77..eb72b092d7b4a 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -167,7 +167,6 @@ textofs-$(CONFIG_ARCH_AXXIA) :=3D 0x00308000 # Machine directory name. This list is sorted alphanumerically # by CONFIG_* macro name. machine-$(CONFIG_ARCH_ACTIONS) +=3D actions -machine-$(CONFIG_ARCH_AIROHA) +=3D airoha machine-$(CONFIG_ARCH_ALPINE) +=3D alpine machine-$(CONFIG_ARCH_ARTPEC) +=3D artpec machine-$(CONFIG_ARCH_ASPEED) +=3D aspeed diff --git a/arch/arm/mach-airoha/Makefile b/arch/arm/mach-airoha/Makefile deleted file mode 100644 index a5857d0d02ebf..0000000000000 --- a/arch/arm/mach-airoha/Makefile +++ /dev/null @@ -1,2 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only -obj-y +=3D airoha.o diff --git a/arch/arm/mach-airoha/airoha.c b/arch/arm/mach-airoha/airoha.c deleted file mode 100644 index ea23b5abb478e..0000000000000 --- a/arch/arm/mach-airoha/airoha.c +++ /dev/null @@ -1,16 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * Device Tree support for Airoha SoCs - * - * Copyright (c) 2022 Felix Fietkau - */ -#include - -static const char * const airoha_board_dt_compat[] =3D { - "airoha,en7523", - NULL, -}; - -DT_MACHINE_START(MEDIATEK_DT, "Airoha Cortex-A53 (Device Tree)") - .dt_compat =3D airoha_board_dt_compat, -MACHINE_END --=20 2.39.2 From nobody Thu Dec 18 09:42:57 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 13D54C4167B for ; Mon, 13 Nov 2023 14:45:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231368AbjKMOpI (ORCPT ); Mon, 13 Nov 2023 09:45:08 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56202 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230372AbjKMOop (ORCPT ); Mon, 13 Nov 2023 09:44:45 -0500 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E046810FB for ; Mon, 13 Nov 2023 06:44:40 -0800 (PST) Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 3ADEi6UT019412; Mon, 13 Nov 2023 08:44:06 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1699886646; bh=2j2rZ0wAfPXMdUDaibcPxRQk4yh1F+v0/Ydsjhdm1W8=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=GRSJs4Vk+qhInhB/SOKF0wzoRUA7c3BJPmK3NOHtxGAEaeXpqbeuDA6j8BbMTY9qs PovTvoTbArwX06cI3Y4o2gSnnyHCSP36sf5C5llGzwFn9/Lzai4qw1Ld19uwzCisy+ dYxkoZdj1L3MFh1Sh/PXGtQM+yHLXXozcfgoBETU= Received: from DFLE115.ent.ti.com (dfle115.ent.ti.com [10.64.6.36]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 3ADEi63I020188 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 13 Nov 2023 08:44:06 -0600 Received: from DFLE115.ent.ti.com (10.64.6.36) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 13 Nov 2023 08:44:06 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 13 Nov 2023 08:44:06 -0600 Received: from fllv0040.itg.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 3ADEi0u1065232; Mon, 13 Nov 2023 08:44:05 -0600 From: Andrew Davis To: Russell King , Baruch Siach , Vladimir Zapolskiy , Kunihiko Hayashi , Masami Hiramatsu , Arnd Bergmann , Geert Uytterhoeven , Linus Walleij CC: , , Andrew Davis Subject: [PATCH v3 7/9] ARM: mach-sunplus: Rework support and directory structure Date: Mon, 13 Nov 2023 08:43:57 -0600 Message-ID: <20231113144359.174140-8-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231113144359.174140-1-afd@ti.com> References: <20231113144359.174140-1-afd@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Having a platform need a mach-* directory should be seen as a negative, it means the platform needs special non-standard handling. ARM64 support does not allow mach-* directories at all. While we may not get to that given all the non-standard architectures we support, we should still try to get as close as we can and reduce the number of mach directories. The mach-sunplus/ directory and files, provides just one "feature": having the kernel print the machine name if the DTB does not also contain a "model" string (which they always do). To reduce the number of mach-* directories let's do without that feature and remove this directory. NOTE: The default l2c_aux_mask is now ~0 but these devices never have this type of cache controller so this is safe. Signed-off-by: Andrew Davis --- MAINTAINERS | 1 - arch/arm/Kconfig | 2 -- arch/arm/Kconfig.platforms | 29 +++++++++++++++++++++++++++++ arch/arm/Makefile | 1 - arch/arm/mach-sunplus/Kconfig | 27 --------------------------- arch/arm/mach-sunplus/Makefile | 8 -------- arch/arm/mach-sunplus/sp7021.c | 16 ---------------- 7 files changed, 29 insertions(+), 55 deletions(-) delete mode 100644 arch/arm/mach-sunplus/Kconfig delete mode 100644 arch/arm/mach-sunplus/Makefile delete mode 100644 arch/arm/mach-sunplus/sp7021.c diff --git a/MAINTAINERS b/MAINTAINERS index b1ee757a4306d..73f1100014218 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2837,7 +2837,6 @@ F: Documentation/devicetree/bindings/interrupt-contro= ller/sunplus,sp7021-intc.ya F: Documentation/devicetree/bindings/reset/sunplus,reset.yaml F: arch/arm/boot/dts/sunplus/ F: arch/arm/configs/sp7021_*defconfig -F: arch/arm/mach-sunplus/ F: drivers/clk/clk-sp7021.c F: drivers/irqchip/irq-sp7021-intc.c F: drivers/reset/reset-sunplus.c diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index fbdf366d260a6..395530fe22402 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -447,8 +447,6 @@ source "arch/arm/mach-sti/Kconfig" =20 source "arch/arm/mach-stm32/Kconfig" =20 -source "arch/arm/mach-sunplus/Kconfig" - source "arch/arm/mach-sunxi/Kconfig" =20 source "arch/arm/mach-tegra/Kconfig" diff --git a/arch/arm/Kconfig.platforms b/arch/arm/Kconfig.platforms index 38457d5a18fff..acaced2f0ab04 100644 --- a/arch/arm/Kconfig.platforms +++ b/arch/arm/Kconfig.platforms @@ -123,6 +123,35 @@ config ARCH_RDA help This enables support for the RDA Micro 8810PL SoC family. =20 +menuconfig ARCH_SUNPLUS + bool "Sunplus SoCs" + depends on ARCH_MULTI_V7 + help + Support for Sunplus SoC family: SP7021 and succeeding SoC-based systems, + such as the Banana Pi BPI-F2S development board (and derivatives). + () + () + +if ARCH_SUNPLUS + +config SOC_SP7021 + bool "Sunplus SP7021 SoC support" + default ARCH_SUNPLUS + select HAVE_ARM_ARCH_TIMER + select ARM_GIC + select ARM_PSCI + select PINCTRL + select PINCTRL_SPPCTL + select SERIAL_SUNPLUS if TTY + select SERIAL_SUNPLUS_CONSOLE if TTY + help + Support for Sunplus SP7021 SoC. It is based on ARM 4-core + Cortex-A7 with various peripherals (e.g.: I2C, SPI, SDIO, + Ethernet, etc.), FPGA interface, chip-to-chip bus. + It is designed for industrial control. + +endif + config ARCH_UNIPHIER bool "Socionext UniPhier SoCs" depends on ARCH_MULTI_V7 diff --git a/arch/arm/Makefile b/arch/arm/Makefile index eb72b092d7b4a..699be64a74be6 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -216,7 +216,6 @@ machine-$(CONFIG_ARCH_RENESAS) +=3D shmobile machine-$(CONFIG_ARCH_INTEL_SOCFPGA) +=3D socfpga machine-$(CONFIG_ARCH_STI) +=3D sti machine-$(CONFIG_ARCH_STM32) +=3D stm32 -machine-$(CONFIG_ARCH_SUNPLUS) +=3D sunplus machine-$(CONFIG_ARCH_SUNXI) +=3D sunxi machine-$(CONFIG_ARCH_TEGRA) +=3D tegra machine-$(CONFIG_ARCH_U8500) +=3D ux500 diff --git a/arch/arm/mach-sunplus/Kconfig b/arch/arm/mach-sunplus/Kconfig deleted file mode 100644 index d0c2416e6f241..0000000000000 --- a/arch/arm/mach-sunplus/Kconfig +++ /dev/null @@ -1,27 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) - -menuconfig ARCH_SUNPLUS - bool "Sunplus SoCs" - depends on ARCH_MULTI_V7 - help - Support for Sunplus SoC family: SP7021 and succeeding SoC-based systems, - such as the Banana Pi BPI-F2S development board (and derivatives). - () - () - -config SOC_SP7021 - bool "Sunplus SP7021 SoC support" - depends on ARCH_SUNPLUS - default ARCH_SUNPLUS - select HAVE_ARM_ARCH_TIMER - select ARM_GIC - select ARM_PSCI - select PINCTRL - select PINCTRL_SPPCTL - select SERIAL_SUNPLUS if TTY - select SERIAL_SUNPLUS_CONSOLE if TTY - help - Support for Sunplus SP7021 SoC. It is based on ARM 4-core - Cortex-A7 with various peripherals (e.g.: I2C, SPI, SDIO, - Ethernet, etc.), FPGA interface, chip-to-chip bus. - It is designed for industrial control. diff --git a/arch/arm/mach-sunplus/Makefile b/arch/arm/mach-sunplus/Makefile deleted file mode 100644 index d211de6af2db9..0000000000000 --- a/arch/arm/mach-sunplus/Makefile +++ /dev/null @@ -1,8 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -# -# Makefile for the linux kernel. -# - -# Object file lists. - -obj-$(CONFIG_SOC_SP7021) +=3D sp7021.o diff --git a/arch/arm/mach-sunplus/sp7021.c b/arch/arm/mach-sunplus/sp7021.c deleted file mode 100644 index 774d0a5bd4eb0..0000000000000 --- a/arch/arm/mach-sunplus/sp7021.c +++ /dev/null @@ -1,16 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -/* - * Copyright (C) Sunplus Technology Co., Ltd. - * All rights reserved. - */ -#include -#include - -static const char *sp7021_compat[] __initconst =3D { - "sunplus,sp7021", - NULL -}; - -DT_MACHINE_START(SP7021_DT, "SP7021") - .dt_compat =3D sp7021_compat, -MACHINE_END --=20 2.39.2 From nobody Thu Dec 18 09:42:57 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B4570C4332F for ; Mon, 13 Nov 2023 14:44:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231320AbjKMOpA (ORCPT ); Mon, 13 Nov 2023 09:45:00 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56176 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230265AbjKMOoo (ORCPT ); Mon, 13 Nov 2023 09:44:44 -0500 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C7BFD171A for ; Mon, 13 Nov 2023 06:44:39 -0800 (PST) Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 3ADEi7wN014479; Mon, 13 Nov 2023 08:44:07 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1699886647; bh=053670vNwP13YdPy+JoG38ND3fYYc+OjTbm03kf6lD0=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=zNYEbkoNQd+sDfjFR12op9/wajo8uAidiw3Uxm75F1IahoT1ETBFf42yv/CFGO42Q UaVu/EmbLspgLRGM6QilwcY4CyWP1VHDfJFJCL4wH0bS8DhhdNIYGcqFRVTzNTpdT6 +NMPGbgZI2/2PJ980QNjWcTCctTvxkhzLv/ldlN8= Received: from DLEE111.ent.ti.com (dlee111.ent.ti.com [157.170.170.22]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 3ADEi7pV020192 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 13 Nov 2023 08:44:07 -0600 Received: from DLEE100.ent.ti.com (157.170.170.30) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 13 Nov 2023 08:44:06 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 13 Nov 2023 08:44:06 -0600 Received: from fllv0040.itg.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 3ADEi0u2065232; Mon, 13 Nov 2023 08:44:06 -0600 From: Andrew Davis To: Russell King , Baruch Siach , Vladimir Zapolskiy , Kunihiko Hayashi , Masami Hiramatsu , Arnd Bergmann , Geert Uytterhoeven , Linus Walleij CC: , , Andrew Davis Subject: [PATCH v3 8/9] ARM: mach-hpe: Rework support and directory structure Date: Mon, 13 Nov 2023 08:43:58 -0600 Message-ID: <20231113144359.174140-9-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231113144359.174140-1-afd@ti.com> References: <20231113144359.174140-1-afd@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Having a platform need a mach-* directory should be seen as a negative, it means the platform needs special non-standard handling. ARM64 support does not allow mach-* directories at all. While we may not get to that given all the non-standard architectures we support, we should still try to get as close as we can and reduce the number of mach directories. The mach-hpe/ directory and files, provides just one "feature": having the kernel print the machine name if the DTB does not also contain a "model" string (which they always do). To reduce the number of mach-* directories let's do without that feature and remove this directory. Signed-off-by: Andrew Davis --- MAINTAINERS | 1 - arch/arm/Kconfig | 2 -- arch/arm/Kconfig.platforms | 25 +++++++++++++++++++++++++ arch/arm/Makefile | 1 - arch/arm/mach-hpe/Kconfig | 23 ----------------------- arch/arm/mach-hpe/Makefile | 1 - arch/arm/mach-hpe/gxp.c | 15 --------------- 7 files changed, 25 insertions(+), 43 deletions(-) delete mode 100644 arch/arm/mach-hpe/Kconfig delete mode 100644 arch/arm/mach-hpe/Makefile delete mode 100644 arch/arm/mach-hpe/gxp.c diff --git a/MAINTAINERS b/MAINTAINERS index 73f1100014218..eba68bf3417fa 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2216,7 +2216,6 @@ F: Documentation/devicetree/bindings/spi/hpe,gxp-spif= i.yaml F: Documentation/devicetree/bindings/timer/hpe,gxp-timer.yaml F: Documentation/hwmon/gxp-fan-ctrl.rst F: arch/arm/boot/dts/hpe/ -F: arch/arm/mach-hpe/ F: drivers/clocksource/timer-gxp.c F: drivers/hwmon/gxp-fan-ctrl.c F: drivers/i2c/busses/i2c-gxp.c diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 395530fe22402..ed069b336c308 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -383,8 +383,6 @@ source "arch/arm/mach-highbank/Kconfig" =20 source "arch/arm/mach-hisi/Kconfig" =20 -source "arch/arm/mach-hpe/Kconfig" - source "arch/arm/mach-imx/Kconfig" =20 source "arch/arm/mach-ixp4xx/Kconfig" diff --git a/arch/arm/Kconfig.platforms b/arch/arm/Kconfig.platforms index acaced2f0ab04..b4ad800a17b7e 100644 --- a/arch/arm/Kconfig.platforms +++ b/arch/arm/Kconfig.platforms @@ -87,6 +87,31 @@ config MACH_ASM9260 help Support for Alphascale ASM9260 based platform. =20 +menuconfig ARCH_HPE + bool "HPE SoC support" + depends on ARCH_MULTI_V7 + help + This enables support for HPE ARM based BMC chips. + +if ARCH_HPE + +config ARCH_HPE_GXP + bool "HPE GXP SoC" + depends on ARCH_MULTI_V7 + select ARM_VIC + select GENERIC_IRQ_CHIP + select CLKSRC_MMIO + help + HPE GXP is the name of the HPE Soc. This SoC is used to implement many + BMC features at HPE. It supports ARMv7 architecture based on the Cortex + A9 core. It is capable of using an AXI bus to which a memory controller + is attached. It has multiple SPI interfaces to connect boot flash and + BIOS flash. It uses a 10/100/1000 MAC for network connectivity. It + has multiple i2c engines to drive connectivity with a host + infrastructure. + +endif + menuconfig ARCH_MOXART bool "MOXA ART SoC" depends on ARCH_MULTI_V4 diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 699be64a74be6..47c53c068e3d8 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -184,7 +184,6 @@ machine-$(CONFIG_ARCH_FOOTBRIDGE) +=3D footbridge machine-$(CONFIG_ARCH_GEMINI) +=3D gemini machine-$(CONFIG_ARCH_HIGHBANK) +=3D highbank machine-$(CONFIG_ARCH_HISI) +=3D hisi -machine-$(CONFIG_ARCH_HPE) +=3D hpe machine-$(CONFIG_ARCH_IXP4XX) +=3D ixp4xx machine-$(CONFIG_ARCH_KEYSTONE) +=3D keystone machine-$(CONFIG_ARCH_LPC18XX) +=3D lpc18xx diff --git a/arch/arm/mach-hpe/Kconfig b/arch/arm/mach-hpe/Kconfig deleted file mode 100644 index 3372bbf38d383..0000000000000 --- a/arch/arm/mach-hpe/Kconfig +++ /dev/null @@ -1,23 +0,0 @@ -menuconfig ARCH_HPE - bool "HPE SoC support" - depends on ARCH_MULTI_V7 - help - This enables support for HPE ARM based BMC chips. -if ARCH_HPE - -config ARCH_HPE_GXP - bool "HPE GXP SoC" - depends on ARCH_MULTI_V7 - select ARM_VIC - select GENERIC_IRQ_CHIP - select CLKSRC_MMIO - help - HPE GXP is the name of the HPE Soc. This SoC is used to implement many - BMC features at HPE. It supports ARMv7 architecture based on the Cortex - A9 core. It is capable of using an AXI bus to which a memory controller - is attached. It has multiple SPI interfaces to connect boot flash and - BIOS flash. It uses a 10/100/1000 MAC for network connectivity. It - has multiple i2c engines to drive connectivity with a host - infrastructure. - -endif diff --git a/arch/arm/mach-hpe/Makefile b/arch/arm/mach-hpe/Makefile deleted file mode 100644 index 8b0a91234df4e..0000000000000 --- a/arch/arm/mach-hpe/Makefile +++ /dev/null @@ -1 +0,0 @@ -obj-$(CONFIG_ARCH_HPE_GXP) +=3D gxp.o diff --git a/arch/arm/mach-hpe/gxp.c b/arch/arm/mach-hpe/gxp.c deleted file mode 100644 index 581c8da517b86..0000000000000 --- a/arch/arm/mach-hpe/gxp.c +++ /dev/null @@ -1,15 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* Copyright (C) 2022 Hewlett-Packard Enterprise Development Company, L.P.= */ - -#include - -static const char * const gxp_board_dt_compat[] =3D { - "hpe,gxp", - NULL, -}; - -DT_MACHINE_START(GXP_DT, "HPE GXP") - .dt_compat =3D gxp_board_dt_compat, - .l2c_aux_val =3D 0, - .l2c_aux_mask =3D ~0, -MACHINE_END --=20 2.39.2 From nobody Thu Dec 18 09:42:57 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AB89EC4332F for ; Mon, 13 Nov 2023 14:44:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231158AbjKMOoy (ORCPT ); Mon, 13 Nov 2023 09:44:54 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56162 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230205AbjKMOoo (ORCPT ); Mon, 13 Nov 2023 09:44:44 -0500 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2B5FA171C for ; Mon, 13 Nov 2023 06:44:40 -0800 (PST) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 3ADEi7Xl129635; Mon, 13 Nov 2023 08:44:07 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1699886647; bh=bzGE9Yrc+rwi/fH2bDKqDEhxMKUPsrtHRJDtG0zTHLM=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=ZvoqTeYrpJQv0vr5eIGC7/LIHOJKXTvAmDo1D1z4yL2rbPUinVU4PuhWaMQXFQgDi qxhNQolusIaiH9CKzXgAuG07WKFuJ1iSfyLfj5vIqWljDMTq09377aku4+FARJ2mAD SamzWS8jNqZ5d1Sp5njLOvjImlBPu9UoeoXiDUoI= Received: from DLEE113.ent.ti.com (dlee113.ent.ti.com [157.170.170.24]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 3ADEi7d3007976 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 13 Nov 2023 08:44:07 -0600 Received: from DLEE114.ent.ti.com (157.170.170.25) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 13 Nov 2023 08:44:07 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 13 Nov 2023 08:44:07 -0600 Received: from fllv0040.itg.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 3ADEi0u3065232; Mon, 13 Nov 2023 08:44:06 -0600 From: Andrew Davis To: Russell King , Baruch Siach , Vladimir Zapolskiy , Kunihiko Hayashi , Masami Hiramatsu , Arnd Bergmann , Geert Uytterhoeven , Linus Walleij CC: , , Andrew Davis Subject: [PATCH v3 9/9] ARM: mach-nspire: Rework support and directory structure Date: Mon, 13 Nov 2023 08:43:59 -0600 Message-ID: <20231113144359.174140-10-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231113144359.174140-1-afd@ti.com> References: <20231113144359.174140-1-afd@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Having a platform need a mach-* directory should be seen as a negative, it means the platform needs special non-standard handling. ARM64 support does not allow mach-* directories at all. While we may not get to that given all the non-standard architectures we support, we should still try to get as close as we can and reduce the number of mach directories. The mach-nspire/ directory and files, provides just one "feature": having the kernel print the machine name if the DTB does not also contain a "model" string (which they always do). To reduce the number of mach-* directories let's do without that feature and remove this directory. NOTE: The default l2c_aux_mask is now ~0 but these devices never have this type of cache controller so this is safe. Signed-off-by: Andrew Davis --- arch/arm/Kconfig | 2 -- arch/arm/Kconfig.platforms | 15 +++++++++++++++ arch/arm/Makefile | 1 - arch/arm/mach-nspire/Kconfig | 15 --------------- arch/arm/mach-nspire/Makefile | 2 -- arch/arm/mach-nspire/nspire.c | 18 ------------------ 6 files changed, 15 insertions(+), 38 deletions(-) delete mode 100644 arch/arm/mach-nspire/Kconfig delete mode 100644 arch/arm/mach-nspire/Makefile delete mode 100644 arch/arm/mach-nspire/nspire.c diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index ed069b336c308..038cc4ccc8d16 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -411,8 +411,6 @@ source "arch/arm/mach-nomadik/Kconfig" =20 source "arch/arm/mach-npcm/Kconfig" =20 -source "arch/arm/mach-nspire/Kconfig" - source "arch/arm/mach-omap1/Kconfig" =20 source "arch/arm/mach-omap2/Kconfig" diff --git a/arch/arm/Kconfig.platforms b/arch/arm/Kconfig.platforms index b4ad800a17b7e..5c19c1f2cff61 100644 --- a/arch/arm/Kconfig.platforms +++ b/arch/arm/Kconfig.platforms @@ -140,6 +140,21 @@ config MACH_UC7112LX =20 endif =20 +config ARCH_NSPIRE + bool "TI-NSPIRE based" + depends on ARCH_MULTI_V4T + depends on CPU_LITTLE_ENDIAN + select CPU_ARM926T + select GENERIC_IRQ_CHIP + select ARM_AMBA + select ARM_VIC + select ARM_TIMER_SP804 + select NSPIRE_TIMER + select POWER_RESET + select POWER_RESET_SYSCON + help + This enables support for systems using the TI-NSPIRE CPU + config ARCH_RDA bool "RDA Micro SoCs" depends on ARCH_MULTI_V7 diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 47c53c068e3d8..05b425b0fc9d3 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -199,7 +199,6 @@ machine-$(CONFIG_ARCH_MXS) +=3D mxs machine-$(CONFIG_ARCH_MSTARV7) +=3D mstar machine-$(CONFIG_ARCH_NOMADIK) +=3D nomadik machine-$(CONFIG_ARCH_NPCM) +=3D npcm -machine-$(CONFIG_ARCH_NSPIRE) +=3D nspire machine-$(CONFIG_ARCH_OMAP1) +=3D omap1 machine-$(CONFIG_ARCH_OMAP2PLUS) +=3D omap2 machine-$(CONFIG_ARCH_ORION5X) +=3D orion5x diff --git a/arch/arm/mach-nspire/Kconfig b/arch/arm/mach-nspire/Kconfig deleted file mode 100644 index 0ffdcaca1e6b4..0000000000000 --- a/arch/arm/mach-nspire/Kconfig +++ /dev/null @@ -1,15 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only -config ARCH_NSPIRE - bool "TI-NSPIRE based" - depends on ARCH_MULTI_V4T - depends on CPU_LITTLE_ENDIAN - select CPU_ARM926T - select GENERIC_IRQ_CHIP - select ARM_AMBA - select ARM_VIC - select ARM_TIMER_SP804 - select NSPIRE_TIMER - select POWER_RESET - select POWER_RESET_SYSCON - help - This enables support for systems using the TI-NSPIRE CPU diff --git a/arch/arm/mach-nspire/Makefile b/arch/arm/mach-nspire/Makefile deleted file mode 100644 index 4716b9b9aa7bb..0000000000000 --- a/arch/arm/mach-nspire/Makefile +++ /dev/null @@ -1,2 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only -obj-y +=3D nspire.o diff --git a/arch/arm/mach-nspire/nspire.c b/arch/arm/mach-nspire/nspire.c deleted file mode 100644 index 2fbfc23237ffe..0000000000000 --- a/arch/arm/mach-nspire/nspire.c +++ /dev/null @@ -1,18 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (C) 2013 Daniel Tang - */ - -#include - -static const char *const nspire_dt_match[] __initconst =3D { - "ti,nspire", - "ti,nspire-cx", - "ti,nspire-tp", - "ti,nspire-clp", - NULL, -}; - -DT_MACHINE_START(NSPIRE, "TI-NSPIRE") - .dt_compat =3D nspire_dt_match, -MACHINE_END --=20 2.39.2