From nobody Wed Dec 31 04:14:20 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8C51BC4332F for ; Sun, 12 Nov 2023 04:13:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230211AbjKLENJ (ORCPT ); Sat, 11 Nov 2023 23:13:09 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46730 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229956AbjKLEMP (ORCPT ); Sat, 11 Nov 2023 23:12:15 -0500 Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B351530D5; Sat, 11 Nov 2023 20:12:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1699762332; x=1731298332; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=xFZk1jO0NsxwqOQHg0a3driwffs3nDYuRHJpiimktAA=; b=gOnPHrSPA0GRoHHYvgsWYBpVIn1KSrHL7uQHOEglojLEBN9bAq3py+wz zIJQ2t6p9Uj1/1XSjwcaCoke0JyRbQDFl70FY/075uRbF+9JIPZ4oSG7I WPq5OwK9Qs+eaRpO6KbDTgjwu0B9i4/DTr2JHEJ+IcLaoqJImUYH6G541 1WiGcwLVPAHyg1gAuwFBFeD+ljyAMwVRijXRNUNYDMHjXenurqCDojoa8 9RCmEdzfXL2q0bo8Nb/Gy5kzx6pikr2pfmvtcEAqYJhuTmTJe2QipU9GV fSa1qA/NlcdjSJ1t9oUSaCMn0znaxi+jHQqhfoadnQnBaqpORYDp2UH0o g==; X-IronPort-AV: E=McAfee;i="6600,9927,10891"; a="476533961" X-IronPort-AV: E=Sophos;i="6.03,296,1694761200"; d="scan'208";a="476533961" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Nov 2023 20:12:10 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10891"; a="713936773" X-IronPort-AV: E=Sophos;i="6.03,296,1694761200"; d="scan'208";a="713936773" Received: from srinivas-otcpl-7600.jf.intel.com (HELO jacob-builder.jf.intel.com) ([10.54.39.116]) by orsmga003.jf.intel.com with ESMTP; 11 Nov 2023 20:12:09 -0800 From: Jacob Pan To: LKML , X86 Kernel , iommu@lists.linux.dev, Thomas Gleixner , "Lu Baolu" , kvm@vger.kernel.org, Dave Hansen , Joerg Roedel , "H. Peter Anvin" , "Borislav Petkov" , "Ingo Molnar" Cc: Raj Ashok , "Tian, Kevin" , maz@kernel.org, peterz@infradead.org, seanjc@google.com, "Robin Murphy" , Jacob Pan Subject: [PATCH RFC 12/13] iommu/vt-d: Add a helper to retrieve PID address Date: Sat, 11 Nov 2023 20:16:42 -0800 Message-Id: <20231112041643.2868316-13-jacob.jun.pan@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231112041643.2868316-1-jacob.jun.pan@linux.intel.com> References: <20231112041643.2868316-1-jacob.jun.pan@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Thomas Gleixner When programming IRTE for posted mode, we need to retrieve the physical address of the posted interrupt descriptor (PID) that belongs to it's target CPU. This per CPU PID has already been set up during cpu_init(). Signed-off-by: Thomas Gleixner Signed-off-by: Jacob Pan --- drivers/iommu/intel/irq_remapping.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/iommu/intel/irq_remapping.c b/drivers/iommu/intel/irq_= remapping.c index f2870d3c8313..971e6c37002f 100644 --- a/drivers/iommu/intel/irq_remapping.c +++ b/drivers/iommu/intel/irq_remapping.c @@ -1125,6 +1125,15 @@ struct irq_remap_ops intel_irq_remap_ops =3D { .reenable =3D reenable_irq_remapping, .enable_faulting =3D enable_drhd_fault_handling, }; +#ifdef CONFIG_X86_POSTED_MSI + +static u64 get_pi_desc_addr(struct irq_data *irqd) +{ + int cpu =3D cpumask_first(irq_data_get_effective_affinity_mask(irqd)); + + return __pa(per_cpu_ptr(&posted_interrupt_desc, cpu)); +} +#endif =20 static void intel_ir_reconfigure_irte(struct irq_data *irqd, bool force) { --=20 2.25.1