From nobody Tue Dec 16 05:46:44 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E9FDDC4167B for ; Fri, 10 Nov 2023 17:43:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345127AbjKJRnb (ORCPT ); Fri, 10 Nov 2023 12:43:31 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45984 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234766AbjKJRmA (ORCPT ); Fri, 10 Nov 2023 12:42:00 -0500 Received: from fanzine2.igalia.com (fanzine.igalia.com [178.60.130.6]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EB985446C3 for ; Fri, 10 Nov 2023 09:23:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Content-Transfer-Encoding:Content-Type:MIME-Version:Message-ID: Date:Subject:Cc:To:From:Sender:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: In-Reply-To:References:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=x9s/LbhV6ymMyl2qdLIGf9X5DBfCTAfDF4eYJOh9Vx0=; b=Rkji7kiMy3kxAH1nXHMd2o11vW YkoQAPbjQkUUCVyHGx3ZCOv54R91m7pMbf9s7MKo9JChwsa5O7RIOU+iV5k6XJDR1XZ3d5coTfna4 tg+3k/5mZOd5vHXYQbG608Uj0B+syDGE6Uu95R8SKwyU3hcPddOBAJu91GYZO49UyLymGpLyIU26J xv8o4eyZFkrNXPz91IQYXIzYMNzRPVWDCf+ViigyzJ2SXIwtRBj8+asXia15DVpx7Sy8DrB1dA+HT AevadpkkluIvrmtJU0oU17Ey6W64MSnXWXJDl83330V7b8hCHGSrmwVzVoxkg1Lp+aFO1Qmi7a0Jl IuNRbBdg==; Received: from pool-96-246-156-208.nycmny.fios.verizon.net ([96.246.156.208] helo=X1.myfiosgateway.com) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1r1VEF-001ikc-7x; Fri, 10 Nov 2023 18:23:35 +0100 From: =?UTF-8?q?Andr=C3=A9=20Almeida?= To: dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org Cc: kernel-dev@igalia.com, alexander.deucher@amd.com, christian.koenig@amd.com, ray.huang@amd.com, =?UTF-8?q?Andr=C3=A9=20Almeida?= Subject: [PATCH v2] drm/amd: Document device reset methods Date: Fri, 10 Nov 2023 12:23:28 -0500 Message-ID: <20231110172328.27451-1-andrealmeid@igalia.com> X-Mailer: git-send-email 2.42.1 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Document what each amdgpu driver reset method does. Signed-off-by: Andr=C3=A9 Almeida --- v2: Add more details and small correction (Alex) drivers/gpu/drm/amd/amdgpu/amdgpu.h | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdg= pu/amdgpu.h index a79d53bdbe13..c4675572f907 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h @@ -504,6 +504,31 @@ struct amdgpu_allowed_register_entry { bool grbm_indexed; }; =20 +/** + * enum amd_reset_method - Methods for resetting AMD GPU devices + * + * @AMD_RESET_METHOD_NONE: The device will not be reset. + * @AMD_RESET_LEGACY: Method reserved for SI, CIK and VI ASICs. + * @AMD_RESET_MODE0: Reset the entire ASIC. Not currently available for the + * any device. + * @AMD_RESET_MODE1: Resets all IP blocks on the ASIC (SDMA, GFX, VCN, etc= .) + * individually. Suitable only for some discrete GPU, not + * available for all ASICs. + * @AMD_RESET_MODE2: Resets a lesser level of IPs compared to MODE1. Which= IPs + * are reset depends on the ASIC. Notably doesn't reset = IPs + * shared with the CPU on APUs or the memory controllers= (so + * VRAM is not lost). Not available on all ASICs. + * @AMD_RESET_BACO: BACO (Bus Alive, Chip Off) method powers off and on th= e card + * but without powering off the PCI bus. Suitable only for + * discrete GPUs. + * @AMD_RESET_PCI: Does a full bus reset using core Linux subsystem PCI re= set + * and does a secondary bus reset or FLR, depending on wha= t the + * underlying hardware supports. + * + * Methods available for AMD GPU driver for resetting the device. Not all + * methods are suitable for every device. User can overwrite the method us= ing + * module parameter `reset_method`. + */ enum amd_reset_method { AMD_RESET_METHOD_NONE =3D -1, AMD_RESET_METHOD_LEGACY =3D 0, --=20 2.42.1