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(unknown [10.28.34.196]) by maili.marvell.com (Postfix) with ESMTP id 91C995B6933; Fri, 10 Nov 2023 03:25:53 -0800 (PST) From: Linu Cherian To: , , , CC: , , , , , , , , , Linu Cherian Subject: [PATCH v5 1/7] dt-bindings: arm: coresight-tmc: Add "memory-region" property Date: Fri, 10 Nov 2023 16:55:27 +0530 Message-ID: <20231110112533.2499437-2-lcherian@marvell.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231110112533.2499437-1-lcherian@marvell.com> References: <20231110112533.2499437-1-lcherian@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-ORIG-GUID: k6ujKPaIPoDxZgvJYwSo3dAGPgOIZeY0 X-Proofpoint-GUID: k6ujKPaIPoDxZgvJYwSo3dAGPgOIZeY0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-11-10_07,2023-11-09_01,2023-05-22_02 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" memory-region 0: Reserved trace buffer memory TMC ETR: When available, use this reserved memory region for trace data capture. Same region is used for trace data retention after a panic or watchdog reset. TMC ETF: When available, use this reserved memory region for trace data retention synced from internal SRAM after a panic or watchdog reset. memory-region 1: Reserved meta data memory TMC ETR, ETF: When available, use this memory for register snapshot retention synced from hardware registers after a panic or watchdog reset. Signed-off-by: Linu Cherian Reviewed-by: Rob Herring --- Changelog from v4: * Description is more explicit on the usage of reserved trace buffer regions * Removed "mem" suffix from the memory region names .../bindings/arm/arm,coresight-tmc.yaml | 25 +++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml b= /Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml index cb8dceaca70e..6d266ac0016b 100644 --- a/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml +++ b/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml @@ -101,6 +101,28 @@ properties: and ETF configurations. $ref: /schemas/graph.yaml#/properties/port =20 + memory-region: + items: + - description: Reserved trace buffer memory for ETR and ETF sinks. + For ETR, this reserved memory region is used for trace data capt= ure. + Same region is used for trace data retention as well after a pan= ic + or watchdog reset. + This reserved memory region is used as trace buffer or used for = trace + data retention only if specifically selected by the user in sysfs + interface. + The default memory usage models for ETR in sysfs/perf modes are + otherwise unaltered. + + For ETF, this reserved memory region is used by default for + retention of trace data synced from internal SRAM after a panic + or watchdog reset. + - description: Reserved meta data memory. Used for ETR and ETF sinks + for storing metadata. + memory-region-names: + items: + - const: tracedata + - const: metadata + required: - compatible - reg @@ -115,6 +137,9 @@ examples: etr@20070000 { compatible =3D "arm,coresight-tmc", "arm,primecell"; reg =3D <0x20070000 0x1000>; + memory-region =3D <&etr_trace_mem_reserved>, + <&etr_mdata_mem_reserved>; + memory-region-names =3D "tracedata", "metadata"; =20 clocks =3D <&oscclk6a>; clock-names =3D "apb_pclk"; --=20 2.34.1