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Thu, 09 Nov 2023 01:00:26 -0800 (PST) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:52eb:f6ff:feb3:451a]) by smtp.gmail.com with ESMTPSA id ay36-20020a05600c1e2400b0040472ad9a3dsm1428484wmb.14.2023.11.09.01.00.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Nov 2023 01:00:25 -0800 (PST) From: Neil Armstrong Date: Thu, 09 Nov 2023 10:00:11 +0100 Subject: [PATCH v8 10/12] arm64: meson: g12-common: add the MIPI DSI nodes MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20231109-amlogic-v6-4-upstream-dsi-ccf-vim3-v8-10-81e4aeeda193@linaro.org> References: <20231109-amlogic-v6-4-upstream-dsi-ccf-vim3-v8-0-81e4aeeda193@linaro.org> In-Reply-To: <20231109-amlogic-v6-4-upstream-dsi-ccf-vim3-v8-0-81e4aeeda193@linaro.org> To: Jerome Brunet , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kevin Hilman , Martin Blumenstingl , David Airlie , Daniel Vetter , Jagan Teki , Nicolas Belin Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, Neil Armstrong X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; 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a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the MIPI DSI Analog & Digital PHY nodes and the DSI control nodes with proper port endpoint to the VPU. Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 70 +++++++++++++++++++= ++++ 1 file changed, 70 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64= /boot/dts/amlogic/meson-g12-common.dtsi index ff68b911b729..7300408262d5 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi @@ -1663,9 +1663,28 @@ pwrc: power-controller { <250000000>, <0>; /* Do Nothing */ }; + + mipi_analog_dphy: phy { + compatible =3D "amlogic,g12a-mipi-dphy-analog"; + #phy-cells =3D <0>; + status =3D "disabled"; + }; }; }; =20 + mipi_dphy: phy@44000 { + compatible =3D "amlogic,axg-mipi-dphy"; + reg =3D <0x0 0x44000 0x0 0x2000>; + clocks =3D <&clkc CLKID_MIPI_DSI_PHY>; + clock-names =3D "pclk"; + resets =3D <&reset RESET_MIPI_DSI_PHY>; + reset-names =3D "phy"; + phys =3D <&mipi_analog_dphy>; + phy-names =3D "analog"; + #phy-cells =3D <0>; + status =3D "disabled"; + }; + usb3_pcie_phy: phy@46000 { compatible =3D "amlogic,g12a-usb3-pcie-phy"; reg =3D <0x0 0x46000 0x0 0x2000>; @@ -2152,6 +2171,15 @@ hdmi_tx_out: endpoint { remote-endpoint =3D <&hdmi_tx_in>; }; }; + + /* DPI output port */ + dpi_port: port@2 { + reg =3D <2>; + + dpi_out: endpoint { + remote-endpoint =3D <&mipi_dsi_in>; + }; + }; }; =20 gic: interrupt-controller@ffc01000 { @@ -2189,6 +2217,48 @@ gpio_intc: interrupt-controller@f080 { amlogic,channel-interrupts =3D <64 65 66 67 68 69 70 71>; }; =20 + mipi_dsi: dsi@7000 { + compatible =3D "amlogic,meson-g12a-dw-mipi-dsi"; + reg =3D <0x0 0x7000 0x0 0x1000>; + resets =3D <&reset RESET_MIPI_DSI_HOST>; + reset-names =3D "top"; + clocks =3D <&clkc CLKID_MIPI_DSI_HOST>, + <&clkc CLKID_MIPI_DSI_PXCLK>, + <&clkc CLKID_CTS_ENCL>; + clock-names =3D "pclk", "bit", "px"; + phys =3D <&mipi_dphy>; + phy-names =3D "dphy"; + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "disabled"; + + assigned-clocks =3D <&clkc CLKID_MIPI_DSI_PXCLK_SEL>, + <&clkc CLKID_CTS_ENCL_SEL>, + <&clkc CLKID_VCLK2_SEL>; + assigned-clock-parents =3D <&clkc CLKID_GP0_PLL>, + <&clkc CLKID_VCLK2_DIV1>, + <&clkc CLKID_GP0_PLL>; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + /* VPU VENC Input */ + mipi_dsi_venc_port: port@0 { + reg =3D <0>; + + mipi_dsi_in: endpoint { + remote-endpoint =3D <&dpi_out>; + }; + }; + + /* DSI Output */ + mipi_dsi_panel_port: port@1 { + reg =3D <1>; + }; + }; + }; + watchdog: watchdog@f0d0 { compatible =3D "amlogic,meson-gxbb-wdt"; reg =3D <0x0 0xf0d0 0x0 0x10>; --=20 2.34.1