From nobody Wed Dec 31 12:27:58 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 10B4CC4167D for ; Sat, 4 Nov 2023 00:03:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231790AbjKDADL (ORCPT ); Fri, 3 Nov 2023 20:03:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54066 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231226AbjKDAC7 (ORCPT ); Fri, 3 Nov 2023 20:02:59 -0400 Received: from mail-pl1-x64a.google.com (mail-pl1-x64a.google.com [IPv6:2607:f8b0:4864:20::64a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 96F4619D for ; Fri, 3 Nov 2023 17:02:56 -0700 (PDT) Received: by mail-pl1-x64a.google.com with SMTP id d9443c01a7336-1cc29f3afe0so20466135ad.2 for ; Fri, 03 Nov 2023 17:02:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1699056176; x=1699660976; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=L3Ph1WGBEgHW7QvmfHelm4EacJM/EhO7PSNkxK0HmCo=; b=DccDeXfiDvfv1fBWEzY45WjEbiOWdrzZaTNQV4f0F7uJwEyYRbB+VVZf9wIn1IeCTE iUVhrrFl/42ZXS4ylZj3+rYQbFEFxo1SVJWWPyw6CfR3I1AzEgsH+SlCQqrCiYl6GZT3 MYnHtkO1Fn1LmgGtqObBctRZ7WRfIotrQqHt7wIFyJ6lvVudHnoKz/0402GO07m1C12a sHT3RmqN+J7A0OQqLbzMuwW8AMKjv8b2iU4mDN4lZYLYNMqS72px5WI4hPFrDV50O/mF YQLqOd7nEQvgbLuV+RXSkqHYfMgwkEowuSi7XSedAqeNJUx291KThC4BoNpi5+JXYlXc jLvg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699056176; x=1699660976; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=L3Ph1WGBEgHW7QvmfHelm4EacJM/EhO7PSNkxK0HmCo=; b=s4nVTl8k1N+503Y/ykA5GXwm3hMrunDeloZYWHUEwb0pSyEg6AUNLO/S/jEOtLeGJv ESZFuJDX5r46Ce1RSVaN9Eijzok+gjHQiMGWNS2TLQmcgUJ39rJVRDP+YKTkB6S2Fq9Y TlHPe+GeC9kY/RL/TwovOQRvoijGkmNJW1yDDTJbQmGHkvB0UGh2GubamdKbhk6TCo3i SDeZAjkkdQj6VS8R/87/4pfPbwvvIo+w6cP25b5l1laJnRwqpzLUd0tMrzIgVqNo3LEi NvR+mC7wgosr9tASfSITQVojthb+GOY+4AQdjG57G/6UUaYHC0n8hUHNvgn8sFaRTIQC IVFA== X-Gm-Message-State: AOJu0Yz/0iFiD/iTBuw7ROlUUnxeZ5/2L5k8k0tcWvrClhaZcNRtfFc3 aDcNuQlAyEgsgzqDwuu3wpYb+1fyupA= X-Google-Smtp-Source: AGHT+IF+xtFGk+3kSZATAuvt1FOAxavnxlitpSZmorzLd17NCJnmNvLwfKoliM6+iK7h6vXq068eMlQgu0k= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a17:902:d301:b0:1cc:32c6:e5d4 with SMTP id b1-20020a170902d30100b001cc32c6e5d4mr312291plc.6.1699056176128; Fri, 03 Nov 2023 17:02:56 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 3 Nov 2023 17:02:26 -0700 In-Reply-To: <20231104000239.367005-1-seanjc@google.com> Mime-Version: 1.0 References: <20231104000239.367005-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.869.gea05f2083d-goog Message-ID: <20231104000239.367005-9-seanjc@google.com> Subject: [PATCH v6 08/20] KVM: selftests: Extend {kvm,this}_pmu_has() to support fixed counters From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jinrong Liang , Like Xu , Jim Mattson , Aaron Lewis Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Extend the kvm_x86_pmu_feature framework to allow querying for fixed counters via {kvm,this}_pmu_has(). Like architectural events, checking for a fixed counter annoyingly requires checking multiple CPUID fields, as a fixed counter exists if: FxCtr[i]_is_supported :=3D ECX[i] || (EDX[4:0] > i); Note, KVM currently doesn't actually support exposing fixed counters via the bitmask, but that will hopefully change sooner than later, and Intel's SDM explicitly "recommends" checking both the number of counters and the mask. Rename the intermedate "anti_feature" field to simply 'f' since the fixed counter bitmask (thankfully) doesn't have reversed polarity like the architectural events bitmask. Note, ideally the helpers would use BUILD_BUG_ON() to assert on the incoming register, but the expected usage in PMU tests can't guarantee the inputs are compile-time constants. Opportunistically define macros for all of the architectural events and fixed counters that KVM currently supports. Signed-off-by: Sean Christopherson --- .../selftests/kvm/include/x86_64/processor.h | 63 +++++++++++++------ 1 file changed, 45 insertions(+), 18 deletions(-) diff --git a/tools/testing/selftests/kvm/include/x86_64/processor.h b/tools= /testing/selftests/kvm/include/x86_64/processor.h index 2d9771151dd9..b103c462701b 100644 --- a/tools/testing/selftests/kvm/include/x86_64/processor.h +++ b/tools/testing/selftests/kvm/include/x86_64/processor.h @@ -281,24 +281,39 @@ struct kvm_x86_cpu_property { * that indicates the feature is _not_ supported, and a property that stat= es * the length of the bit mask of unsupported features. A feature is suppo= rted * if the size of the bit mask is larger than the "unavailable" bit, and s= aid - * bit is not set. + * bit is not set. Fixed counters also bizarre enumeration, but inverted = from + * arch events for general purpose counters. Fixed counters are supported= if a + * feature flag is set **OR** the total number of fixed counters is greater + * than index of the counter. * - * Wrap the "unavailable" feature to simplify checking whether or not a gi= ven - * architectural event is supported. + * Wrap the events for general purpose and fixed counters to simplify chec= king + * whether or not a given architectural event is supported. */ struct kvm_x86_pmu_feature { - struct kvm_x86_cpu_feature anti_feature; + struct kvm_x86_cpu_feature f; }; -#define KVM_X86_PMU_FEATURE(__bit) \ -({ \ - struct kvm_x86_pmu_feature feature =3D { \ - .anti_feature =3D KVM_X86_CPU_FEATURE(0xa, 0, EBX, __bit), \ - }; \ - \ - feature; \ +#define KVM_X86_PMU_FEATURE(__reg, __bit) \ +({ \ + struct kvm_x86_pmu_feature feature =3D { \ + .f =3D KVM_X86_CPU_FEATURE(0xa, 0, __reg, __bit), \ + }; \ + \ + kvm_static_assert(KVM_CPUID_##__reg =3D=3D KVM_CPUID_EBX || \ + KVM_CPUID_##__reg =3D=3D KVM_CPUID_ECX); \ + feature; \ }) =20 -#define X86_PMU_FEATURE_BRANCH_INSNS_RETIRED KVM_X86_PMU_FEATURE(5) +#define X86_PMU_FEATURE_CPU_CYCLES KVM_X86_PMU_FEATURE(EBX, 0) +#define X86_PMU_FEATURE_INSNS_RETIRED KVM_X86_PMU_FEATURE(EBX, 1) +#define X86_PMU_FEATURE_REFERENCE_CYCLES KVM_X86_PMU_FEATURE(EBX, 2) +#define X86_PMU_FEATURE_LLC_REFERENCES KVM_X86_PMU_FEATURE(EBX, 3) +#define X86_PMU_FEATURE_LLC_MISSES KVM_X86_PMU_FEATURE(EBX, 4) +#define X86_PMU_FEATURE_BRANCH_INSNS_RETIRED KVM_X86_PMU_FEATURE(EBX, 5) +#define X86_PMU_FEATURE_BRANCHES_MISPREDICTED KVM_X86_PMU_FEATURE(EBX, 6) + +#define X86_PMU_FEATURE_INSNS_RETIRED_FIXED KVM_X86_PMU_FEATURE(ECX, 0) +#define X86_PMU_FEATURE_CPU_CYCLES_FIXED KVM_X86_PMU_FEATURE(ECX, 1) +#define X86_PMU_FEATURE_REFERENCE_CYCLES_FIXED KVM_X86_PMU_FEATURE(ECX, 2) =20 static inline unsigned int x86_family(unsigned int eax) { @@ -697,10 +712,16 @@ static __always_inline bool this_cpu_has_p(struct kvm= _x86_cpu_property property) =20 static inline bool this_pmu_has(struct kvm_x86_pmu_feature feature) { - uint32_t nr_bits =3D this_cpu_property(X86_PROPERTY_PMU_EBX_BIT_VECTOR_LE= NGTH); + uint32_t nr_bits; =20 - return nr_bits > feature.anti_feature.bit && - !this_cpu_has(feature.anti_feature); + if (feature.f.reg =3D=3D KVM_CPUID_EBX) { + nr_bits =3D this_cpu_property(X86_PROPERTY_PMU_EBX_BIT_VECTOR_LENGTH); + return nr_bits > feature.f.bit && !this_cpu_has(feature.f); + } + + GUEST_ASSERT(feature.f.reg =3D=3D KVM_CPUID_ECX); + nr_bits =3D this_cpu_property(X86_PROPERTY_PMU_NR_FIXED_COUNTERS); + return nr_bits > feature.f.bit || this_cpu_has(feature.f); } =20 static __always_inline uint64_t this_cpu_supported_xcr0(void) @@ -916,10 +937,16 @@ static __always_inline bool kvm_cpu_has_p(struct kvm_= x86_cpu_property property) =20 static inline bool kvm_pmu_has(struct kvm_x86_pmu_feature feature) { - uint32_t nr_bits =3D kvm_cpu_property(X86_PROPERTY_PMU_EBX_BIT_VECTOR_LEN= GTH); + uint32_t nr_bits; =20 - return nr_bits > feature.anti_feature.bit && - !kvm_cpu_has(feature.anti_feature); + if (feature.f.reg =3D=3D KVM_CPUID_EBX) { + nr_bits =3D kvm_cpu_property(X86_PROPERTY_PMU_EBX_BIT_VECTOR_LENGTH); + return nr_bits > feature.f.bit && !kvm_cpu_has(feature.f); + } + + TEST_ASSERT_EQ(feature.f.reg, KVM_CPUID_ECX); + nr_bits =3D kvm_cpu_property(X86_PROPERTY_PMU_NR_FIXED_COUNTERS); + return nr_bits > feature.f.bit || kvm_cpu_has(feature.f); } =20 static __always_inline uint64_t kvm_cpu_supported_xcr0(void) --=20 2.42.0.869.gea05f2083d-goog