From nobody Wed Dec 31 12:28:59 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2047BC4332F for ; Sat, 4 Nov 2023 00:03:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232907AbjKDADr (ORCPT ); Fri, 3 Nov 2023 20:03:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50652 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232138AbjKDADa (ORCPT ); Fri, 3 Nov 2023 20:03:30 -0400 Received: from mail-pl1-x649.google.com (mail-pl1-x649.google.com [IPv6:2607:f8b0:4864:20::649]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2D12710F6 for ; Fri, 3 Nov 2023 17:03:09 -0700 (PDT) Received: by mail-pl1-x649.google.com with SMTP id d9443c01a7336-1cc5ef7e815so20407335ad.3 for ; Fri, 03 Nov 2023 17:03:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1699056187; x=1699660987; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=2N5EUYzKIE6DRanUuff4sje3/Mjprhtofac5KNFLAZk=; b=bs0lrI4sAl18FK+Q6ggDjRpcjUspZfbXFqmsD9juxcfNjZURHrQw6+a23cIKlK3/UB lcf6GY6HDSsBgf8jLK9JFC860eg91bPJZFNDpsifkTg6YARL/IhHLe3kgROk3+4FvvfB 20dqn3JDq5VLCjrI/Gaz2PywN4rxhrNHwiBsrWmVuuy684Tk90/P88/bvDGIuJ5WoT5g NFd6my6lSQgYw6CT5t0rEWm5uusGjrkY//gYh5SU16YoaFrNMnRLXaI69iEiE85yq39A ftIlIQT1YttBaXCcXDVbjAAWPGbxctsGUgtco73scJhHRzHk7zeuokdX2ucRbdl2NPsT sWUQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699056187; x=1699660987; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=2N5EUYzKIE6DRanUuff4sje3/Mjprhtofac5KNFLAZk=; b=Cjb4t8Fl4eS4j3cw8aKCxn4ls7vg8dUNR1mk7cnl5kBfgIR6R9u98qM/8I2vdbdToX sS9Il8fvbKeLUULHo/CNXnYoHpLbiuMQRZv7qjsiiydOGHGrHBp71xf9N99z45fkhvhJ QomaLyLkLpWohgN7XGpA/YrGqoAJYv9jA4vNqAINmaiDL7WqHFBqUUyPq1nh5J0Fc10+ +YJ6xI6Ufj72pejx/2VdqTtftE0K6bAohiiVN2yxFANjSGEi0Es5DzMD6MsnuCJL6+65 0dM2fOa8BviVfDY6Z0ukZ6gu/Tu1erDPYofQDTk9zL7pvK36KJhkVV6z7rlGEQ358fIc Sb6g== X-Gm-Message-State: AOJu0Yx3QNQlurrmGblnljMZ2B9yiJN/9MTc2MsE37Y7R1TGFxGn86xQ sOlvCSGHHn3XFRRnI89KOkjQJtGRycM= X-Google-Smtp-Source: AGHT+IGqoPsr7nHMsIRIqS5Cijc5tXUUdVWUCuDH52bcJkptXQ5GvX8eGJ+C1jIxZ8FR/7vCr/kscvaAhjU= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a17:902:d48c:b0:1cc:2f2a:7d33 with SMTP id c12-20020a170902d48c00b001cc2f2a7d33mr392773plg.2.1699056187424; Fri, 03 Nov 2023 17:03:07 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 3 Nov 2023 17:02:32 -0700 In-Reply-To: <20231104000239.367005-1-seanjc@google.com> Mime-Version: 1.0 References: <20231104000239.367005-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.869.gea05f2083d-goog Message-ID: <20231104000239.367005-15-seanjc@google.com> Subject: [PATCH v6 14/20] KVM: selftests: Add functional test for Intel's fixed PMU counters From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jinrong Liang , Like Xu , Jim Mattson , Aaron Lewis Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Jinrong Liang Extend the fixed counters test to verify that supported counters can actually be enabled in the control MSRs, that unsupported counters cannot, and that enabled counters actually count. Co-developed-by: Like Xu Signed-off-by: Like Xu Signed-off-by: Jinrong Liang [sean: fold into the rd/wr access test, massage changelog] Signed-off-by: Sean Christopherson --- .../selftests/kvm/x86_64/pmu_counters_test.c | 29 ++++++++++++++++++- 1 file changed, 28 insertions(+), 1 deletion(-) diff --git a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c b/tools= /testing/selftests/kvm/x86_64/pmu_counters_test.c index 52b9d9f615eb..5e3a1575bffc 100644 --- a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c +++ b/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c @@ -324,7 +324,6 @@ static void guest_rd_wr_counters(uint32_t base_msr, uin= t8_t nr_possible_counters vector =3D wrmsr_safe(msr, 0); GUEST_ASSERT_PMC_MSR_ACCESS(WRMSR, msr, expect_gp, vector); } - GUEST_DONE(); } =20 static void guest_test_gp_counters(void) @@ -342,6 +341,7 @@ static void guest_test_gp_counters(void) base_msr =3D MSR_IA32_PERFCTR0; =20 guest_rd_wr_counters(base_msr, MAX_NR_GP_COUNTERS, nr_gp_counters, 0); + GUEST_DONE(); } =20 static void test_gp_counters(uint8_t pmu_version, uint64_t perf_capabiliti= es, @@ -365,6 +365,7 @@ static void guest_test_fixed_counters(void) { uint64_t supported_bitmask =3D 0; uint8_t nr_fixed_counters =3D 0; + uint8_t i; =20 /* Fixed counters require Architectural vPMU Version 2+. */ if (guest_get_pmu_version() >=3D 2) @@ -379,6 +380,32 @@ static void guest_test_fixed_counters(void) =20 guest_rd_wr_counters(MSR_CORE_PERF_FIXED_CTR0, MAX_NR_FIXED_COUNTERS, nr_fixed_counters, supported_bitmask); + + for (i =3D 0; i < MAX_NR_FIXED_COUNTERS; i++) { + uint8_t vector; + uint64_t val; + + if (i >=3D nr_fixed_counters && !(supported_bitmask & BIT_ULL(i))) { + vector =3D wrmsr_safe(MSR_CORE_PERF_FIXED_CTR_CTRL, BIT_ULL(4 * i)); + __GUEST_ASSERT(vector =3D=3D GP_VECTOR, + "Expected #GP for counter %u in FIXED_CTRL_CTRL", i); + + vector =3D wrmsr_safe(MSR_CORE_PERF_GLOBAL_CTRL, BIT_ULL(PMC_IDX_FIXED = + i)); + __GUEST_ASSERT(vector =3D=3D GP_VECTOR, + "Expected #GP for counter %u in PERF_GLOBAL_CTRL", i); + continue; + } + + wrmsr(MSR_CORE_PERF_FIXED_CTR0 + i, 0); + wrmsr(MSR_CORE_PERF_FIXED_CTR_CTRL, BIT_ULL(4 * i)); + wrmsr(MSR_CORE_PERF_GLOBAL_CTRL, BIT_ULL(PMC_IDX_FIXED + i)); + __asm__ __volatile__("loop ." : "+c"((int){NUM_BRANCHES})); + wrmsr(MSR_CORE_PERF_GLOBAL_CTRL, 0); + val =3D rdmsr(MSR_CORE_PERF_FIXED_CTR0 + i); + + GUEST_ASSERT_NE(val, 0); + } + GUEST_DONE(); } =20 static void test_fixed_counters(uint8_t pmu_version, uint64_t perf_capabil= ities, --=20 2.42.0.869.gea05f2083d-goog