From nobody Wed Dec 31 12:28:59 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BF485C4332F for ; Sat, 4 Nov 2023 00:03:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232651AbjKDADm (ORCPT ); Fri, 3 Nov 2023 20:03:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50578 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232012AbjKDAD3 (ORCPT ); Fri, 3 Nov 2023 20:03:29 -0400 Received: from mail-pl1-x649.google.com (mail-pl1-x649.google.com [IPv6:2607:f8b0:4864:20::649]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 675DBD73 for ; Fri, 3 Nov 2023 17:03:06 -0700 (PDT) Received: by mail-pl1-x649.google.com with SMTP id d9443c01a7336-1cc1ddb34ccso20498185ad.1 for ; Fri, 03 Nov 2023 17:03:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1699056185; x=1699660985; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=Q3Wa1t4oywOoWiKyaSylJlH+a4g8C6o2ts0796QA/2g=; b=R07e9vhAsl2IWu4KXyx8c9qzMQJKyDdyQ0tJd3FtaU4/0DZ8Pwtd6EjDF0223y3vHB 8WjBJCXUFEzrGkVUTqxcdnGan/3NFm2RKZJwvMBIUrIr6ku0eMcD5NucWBsZxc8754LU PXuoWykqpB5BGRPORMs5tmTRrV3xSI+km1cbsnyhM87072IEfnROcLEQBhw6Fy0vJyIy n0HIy0dWV1KR1wqOn3XYcu3iorYhAc6aerNz3Ei5qQeUNhhTj1ENdVze6D8PyMQHvAMb TADSvFdcqYnqkIpYuFAIS7jesPNZ3vHCblQb4bmIwv6Yg9Z5A7zdodV3QU8YHk/AgyjA UMWg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699056185; x=1699660985; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=Q3Wa1t4oywOoWiKyaSylJlH+a4g8C6o2ts0796QA/2g=; b=wnmbanPedQJr1MK14+YoXm4MEjvtvjb+aEkA76TtYM5DbD8YmV+naB+DWdSObTRFh3 +46DTWNwAocliuc/uI+zfP2i/CTLdHTuATfZPFpqKqoPXBe9bDpMFUGuBUuvI+Et9lKt a6i26ji4J+sTZlnAenFI/z3sbTJtRNW94/BNq5G+Dl8VBD4mHZ1CFTaGKSL6TsHSNj9u 96Rr1jeVi6FMwEBq5U35hnb4joS7zwPp4DzSQoM3eSr3eNGfBAyaCr0mv9fZKUsSpUzN B+YrfIkrgyTjMgOqrEXEyRHPwBKVDqVu8wYP7WSIT4vE0ftXAaTe8rzMLzaWRCzyifu5 S9yw== X-Gm-Message-State: AOJu0Yxjivk6nBizNQ/Z4NwWK4PZrf6oX0HDFDfJWEl/tBh/TTCktTvF f6qnZc8ZX+wyh8JDDMqkAY7VPPzZJRU= X-Google-Smtp-Source: AGHT+IFugYl7g7KDjaby2dbPe3lBADWmAk9vp1ufT7CHxwrV0MTPydKK3WqAuBlF3WWj/TdOW1JpD9MCWTw= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a17:903:2616:b0:1cc:2549:c281 with SMTP id jd22-20020a170903261600b001cc2549c281mr416287plb.13.1699056185478; Fri, 03 Nov 2023 17:03:05 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 3 Nov 2023 17:02:31 -0700 In-Reply-To: <20231104000239.367005-1-seanjc@google.com> Mime-Version: 1.0 References: <20231104000239.367005-1-seanjc@google.com> X-Mailer: git-send-email 2.42.0.869.gea05f2083d-goog Message-ID: <20231104000239.367005-14-seanjc@google.com> Subject: [PATCH v6 13/20] KVM: selftests: Test consistency of CPUID with num of fixed counters From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Kan Liang , Dapeng Mi , Jinrong Liang , Like Xu , Jim Mattson , Aaron Lewis Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Jinrong Liang Extend the PMU counters test to verify KVM emulation of fixed counters in addition to general purpose counters. Fixed counters add an extra wrinkle in the form of an extra supported bitmask. Thus quoth the SDM: fixed-function performance counter 'i' is supported if ECX[i] || (EDX[4:0= ] > i) Test that KVM handles a counter being available through either method. Co-developed-by: Like Xu Signed-off-by: Like Xu Signed-off-by: Jinrong Liang Co-developed-by: Sean Christopherson Signed-off-by: Sean Christopherson --- .../selftests/kvm/x86_64/pmu_counters_test.c | 60 ++++++++++++++++++- 1 file changed, 57 insertions(+), 3 deletions(-) diff --git a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c b/tools= /testing/selftests/kvm/x86_64/pmu_counters_test.c index 232b9a80a9db..52b9d9f615eb 100644 --- a/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c +++ b/tools/testing/selftests/kvm/x86_64/pmu_counters_test.c @@ -285,13 +285,19 @@ __GUEST_ASSERT(expect_gp ? vector =3D=3D GP_VECTOR : = !vector, \ expect_gp ? "#GP" : "no fault", msr, vector) \ =20 static void guest_rd_wr_counters(uint32_t base_msr, uint8_t nr_possible_co= unters, - uint8_t nr_counters) + uint8_t nr_counters, uint32_t or_mask) { uint8_t i; =20 for (i =3D 0; i < nr_possible_counters; i++) { const uint32_t msr =3D base_msr + i; - const bool expect_success =3D i < nr_counters; + + /* + * Fixed counters are supported if the counter is less than the + * number of enumerated contiguous counters *or* the counter is + * explicitly enumerated in the supported counters mask. + */ + const bool expect_success =3D i < nr_counters || (or_mask & BIT(i)); =20 /* * KVM drops writes to MSR_P6_PERFCTR[0|1] if the counters are @@ -335,7 +341,7 @@ static void guest_test_gp_counters(void) else base_msr =3D MSR_IA32_PERFCTR0; =20 - guest_rd_wr_counters(base_msr, MAX_NR_GP_COUNTERS, nr_gp_counters); + guest_rd_wr_counters(base_msr, MAX_NR_GP_COUNTERS, nr_gp_counters, 0); } =20 static void test_gp_counters(uint8_t pmu_version, uint64_t perf_capabiliti= es, @@ -355,9 +361,50 @@ static void test_gp_counters(uint8_t pmu_version, uint= 64_t perf_capabilities, kvm_vm_free(vm); } =20 +static void guest_test_fixed_counters(void) +{ + uint64_t supported_bitmask =3D 0; + uint8_t nr_fixed_counters =3D 0; + + /* Fixed counters require Architectural vPMU Version 2+. */ + if (guest_get_pmu_version() >=3D 2) + nr_fixed_counters =3D this_cpu_property(X86_PROPERTY_PMU_NR_FIXED_COUNTE= RS); + + /* + * The supported bitmask for fixed counters was introduced in PMU + * version 5. + */ + if (guest_get_pmu_version() >=3D 5) + supported_bitmask =3D this_cpu_property(X86_PROPERTY_PMU_FIXED_COUNTERS_= BITMASK); + + guest_rd_wr_counters(MSR_CORE_PERF_FIXED_CTR0, MAX_NR_FIXED_COUNTERS, + nr_fixed_counters, supported_bitmask); +} + +static void test_fixed_counters(uint8_t pmu_version, uint64_t perf_capabil= ities, + uint8_t nr_fixed_counters, + uint32_t supported_bitmask) +{ + struct kvm_vcpu *vcpu; + struct kvm_vm *vm; + + vm =3D pmu_vm_create_with_one_vcpu(&vcpu, guest_test_fixed_counters, + pmu_version, perf_capabilities); + + vcpu_set_cpuid_property(vcpu, X86_PROPERTY_PMU_FIXED_COUNTERS_BITMASK, + supported_bitmask); + vcpu_set_cpuid_property(vcpu, X86_PROPERTY_PMU_NR_FIXED_COUNTERS, + nr_fixed_counters); + + run_vcpu(vcpu); + + kvm_vm_free(vm); +} + static void test_intel_counters(void) { uint8_t nr_arch_events =3D kvm_cpu_property(X86_PROPERTY_PMU_EBX_BIT_VECT= OR_LENGTH); + uint8_t nr_fixed_counters =3D kvm_cpu_property(X86_PROPERTY_PMU_NR_FIXED_= COUNTERS); uint8_t nr_gp_counters =3D kvm_cpu_property(X86_PROPERTY_PMU_NR_GP_COUNTE= RS); uint8_t pmu_version =3D kvm_cpu_property(X86_PROPERTY_PMU_VERSION); unsigned int i; @@ -428,6 +475,13 @@ static void test_intel_counters(void) v, perf_caps[i]); for (j =3D 0; j <=3D nr_gp_counters; j++) test_gp_counters(v, perf_caps[i], j); + + pr_info("Testing fixed counters, PMU version %u, perf_caps =3D %lx\n", + v, perf_caps[i]); + for (j =3D 0; j <=3D nr_fixed_counters; j++) { + for (k =3D 0; k <=3D (BIT(nr_fixed_counters) - 1); k++) + test_fixed_counters(v, perf_caps[i], j, k); + } } } } --=20 2.42.0.869.gea05f2083d-goog