From nobody Wed Dec 31 12:27:28 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A76A6C4167D for ; Fri, 3 Nov 2023 20:18:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1378212AbjKCUSy (ORCPT ); Fri, 3 Nov 2023 16:18:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53768 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1378170AbjKCUSo (ORCPT ); Fri, 3 Nov 2023 16:18:44 -0400 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D74BB112 for ; Fri, 3 Nov 2023 13:18:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1699042722; x=1730578722; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=+d2Ama+P0okGNCcoxtJKk+xZsdc9UC+/3+lzRqHrSJs=; b=YjwJPAkzF+Ik+iLcV5r33eCsR/ewq1GrpqlnI3imMbcxrNqxbJLYSwNI WpphHGPJxvCJ2jIfmaQswEDWBUUnG4RQcrUxFj8WHPicox8uQewqt7XaC 8hkhAaO4jxbuByC9muXg33N5jt7IYBdcX0VFXK7v195LTR1vSCWnMA7fN KZgXQHMkqOqjLVZYCtv6jCvWmJpMzOuyvcdxIdNVlGl+p4GOhe1+BfF7y ORS3mphhpNJn/K1t2H7psXEimGt49Rfa1leeMj6IEGpJdI0r7rnLKG7RF PINkn4JS9/OyI2fI5vxBfnyj4u7NdwzW6KSLyQ7WA8W7+WPANxV2a7YT3 Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10883"; a="1896045" X-IronPort-AV: E=Sophos;i="6.03,275,1694761200"; d="scan'208";a="1896045" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Nov 2023 13:18:38 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10883"; a="832131116" X-IronPort-AV: E=Sophos;i="6.03,275,1694761200"; d="scan'208";a="832131116" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga004.fm.intel.com with ESMTP; 03 Nov 2023 13:18:34 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id C7D28618; Fri, 3 Nov 2023 22:18:33 +0200 (EET) From: Andy Shevchenko To: Jani Nikula , Andy Shevchenko , intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Cc: Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , Tvrtko Ursulin , David Airlie , Daniel Vetter , Hans de Goede Subject: [PATCH v4 04/16] drm/i915/dsi: rename platform specific *_exec_gpio() to *_gpio_set_value() Date: Fri, 3 Nov 2023 22:18:19 +0200 Message-Id: <20231103201831.1037416-5-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.40.0.1.gaa8946217a0b In-Reply-To: <20231103201831.1037416-1-andriy.shevchenko@linux.intel.com> References: <20231103201831.1037416-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Jani Nikula The lowest level functions are about setting GPIO values, not about executing any sequences anymore. Cc: Andy Shevchenko Cc: Hans de Goede Signed-off-by: Jani Nikula Signed-off-by: Andy Shevchenko --- drivers/gpu/drm/i915/display/intel_dsi_vbt.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dsi_vbt.c b/drivers/gpu/drm= /i915/display/intel_dsi_vbt.c index 11073efe26c0..f977d63a0ad4 100644 --- a/drivers/gpu/drm/i915/display/intel_dsi_vbt.c +++ b/drivers/gpu/drm/i915/display/intel_dsi_vbt.c @@ -243,8 +243,8 @@ static const u8 *mipi_exec_delay(struct intel_dsi *inte= l_dsi, const u8 *data) return data; } =20 -static void vlv_exec_gpio(struct intel_connector *connector, - u8 gpio_source, u8 gpio_index, bool value) +static void vlv_gpio_set_value(struct intel_connector *connector, + u8 gpio_source, u8 gpio_index, bool value) { struct drm_i915_private *dev_priv =3D to_i915(connector->base.dev); struct gpio_map *map; @@ -291,8 +291,8 @@ static void vlv_exec_gpio(struct intel_connector *conne= ctor, vlv_iosf_sb_put(dev_priv, BIT(VLV_IOSF_SB_GPIO)); } =20 -static void chv_exec_gpio(struct intel_connector *connector, - u8 gpio_source, u8 gpio_index, bool value) +static void chv_gpio_set_value(struct intel_connector *connector, + u8 gpio_source, u8 gpio_index, bool value) { struct drm_i915_private *dev_priv =3D to_i915(connector->base.dev); u16 cfg0, cfg1; @@ -345,8 +345,8 @@ static void chv_exec_gpio(struct intel_connector *conne= ctor, vlv_iosf_sb_put(dev_priv, BIT(VLV_IOSF_SB_GPIO)); } =20 -static void bxt_exec_gpio(struct intel_connector *connector, - u8 gpio_source, u8 gpio_index, bool value) +static void bxt_gpio_set_value(struct intel_connector *connector, + u8 gpio_source, u8 gpio_index, bool value) { struct drm_i915_private *dev_priv =3D to_i915(connector->base.dev); /* XXX: this table is a quick ugly hack. */ @@ -486,13 +486,13 @@ static const u8 *mipi_exec_gpio(struct intel_dsi *int= el_dsi, const u8 *data) if (native) icl_native_gpio_set_value(i915, gpio_number, value); else if (DISPLAY_VER(i915) >=3D 11) - bxt_exec_gpio(connector, gpio_source, gpio_index, value); + bxt_gpio_set_value(connector, gpio_source, gpio_index, value); else if (IS_VALLEYVIEW(i915)) - vlv_exec_gpio(connector, gpio_source, gpio_number, value); + vlv_gpio_set_value(connector, gpio_source, gpio_number, value); else if (IS_CHERRYVIEW(i915)) - chv_exec_gpio(connector, gpio_source, gpio_number, value); + chv_gpio_set_value(connector, gpio_source, gpio_number, value); else - bxt_exec_gpio(connector, gpio_source, gpio_index, value); + bxt_gpio_set_value(connector, gpio_source, gpio_index, value); =20 return data + size; } --=20 2.40.0.1.gaa8946217a0b