From nobody Wed Dec 31 17:58:07 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CDF65C4332F for ; Tue, 31 Oct 2023 20:47:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344397AbjJaUrq (ORCPT ); Tue, 31 Oct 2023 16:47:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41742 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234188AbjJaUrS (ORCPT ); Tue, 31 Oct 2023 16:47:18 -0400 Received: from mail.fris.de (unknown [IPv6:2a01:4f8:c2c:390b::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D5BED10C; Tue, 31 Oct 2023 13:47:15 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id A673EC0482; Tue, 31 Oct 2023 21:39:23 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=fris.de; s=dkim; t=1698784764; h=from:subject:date:message-id:to:cc:mime-version: content-transfer-encoding:in-reply-to:references; bh=b3atSga07buT537rB2qn+clIXRpIAAngMDLv2mOrMhM=; b=TuMzRYYmrqXnKcyQZujRdLgCyKEdHLPjOSTQQO9Hx50Q8Obp/5+ZSkjJNWnFx2jZ+kjGgr E9WcyFAw2PIJLWavAYZDcOBCnaUIVO5BIQLdBxtN/xkOrVs+O+rEN/x3GqnhIp7zxwLoGz 69xvv0N40/QrmeA9oO4BgXYq5ByBQ6ON079jfKUqDx/lWTokyOgCRb5F6ewqB2Gk6vMawJ qb7HKOHp+BBikuTDlpEG2nbr6cLeS0XpR14ikuIVp3AaBkhLAXbYuPgORNpoBqWkkO9Cvu rlCfhMk3TqDNCkATm6w0ONeTCyprmtqbH915mZQ+9p+pHux7qA6e8wxr7Y1EmQ== From: Frieder Schrempf To: Conor Dooley , devicetree@vger.kernel.org, Frieder Schrempf , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Rob Herring , Sascha Hauer , Shawn Guo Cc: Fabio Estevam , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team Subject: [PATCH 08/14] arm64: dts: imx8mm-kontron: Disable pull resistors for SD card signals on BL board Date: Tue, 31 Oct 2023 21:37:45 +0100 Message-ID: <20231031203836.3888404-9-frieder@fris.de> In-Reply-To: <20231031203836.3888404-1-frieder@fris.de> References: <20231031203836.3888404-1-frieder@fris.de> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Frieder Schrempf Some signals have external pullup resistors on the board and don't need the internal ones to be enabled. Due to silicon errata ERR050080 let's disable the internal pull resistors whererever possible and prevent any unwanted behavior in case they wear out. Fixes: 8668d8b2e67f ("arm64: dts: Add the Kontron i.MX8M Mini SoMs and base= boards") Signed-off-by: Frieder Schrempf --- .../boot/dts/freescale/imx8mm-kontron-bl.dts | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl.dts b/arch/arm= 64/boot/dts/freescale/imx8mm-kontron-bl.dts index fc096fe739f67..39ca6a65f935b 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl.dts @@ -465,40 +465,40 @@ MX8MM_IOMUXC_NAND_CE1_B_GPIO3_IO2 0x19 =20 pinctrl_usdhc2: usdhc2grp { fsl,pins =3D < - MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 + MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x90 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 - MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019 - MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 + MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x19 + MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xd0 >; }; =20 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { fsl,pins =3D < - MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194 + MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x94 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4 - MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019 - MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 + MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x19 + MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xd0 >; }; =20 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { fsl,pins =3D < - MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196 + MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x96 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6 - MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019 - MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 + MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x19 + MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xd0 >; }; }; --=20 2.42.0