From nobody Wed Dec 31 21:36:27 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 758A8C4332F for ; Mon, 30 Oct 2023 13:23:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233399AbjJ3NXP (ORCPT ); Mon, 30 Oct 2023 09:23:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48904 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232176AbjJ3NXL (ORCPT ); Mon, 30 Oct 2023 09:23:11 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DAD7DD3 for ; Mon, 30 Oct 2023 06:23:07 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 015CB6607385; Mon, 30 Oct 2023 13:23:05 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1698672186; bh=yXt8niUpqio+gdmTqqnUMTPMyUgKwAIOi8EGaWco710=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=IVDlq/FH4jjavt2ZWDKJiwXMVrsY7GhFgmBhj8euDGbAEmhbJ4VOMYgv+1wgCuvY8 cyfrR/+fLcJF2I093OA/i31G2bzz1MZmUJ8FuVU1jjPXiN0/wMQIY4mWc5E0w1BVIT wOTNjiKI3GZSP7YXpyo6x0g24p+vVLRFjaXh4P7lQR6KgqhyyfRyFfTjRfPndcDCpb qXMJCE0mg/sWIF38T8uO8hQH7mJEZKFF0YEZSI/40KFCuaoZc+yQ43U1zc573Mkai0 m7tg0HW/F6daZi2V83r096hgAGFr4o7P5FxZdHxJs9ELtvOb3nicEeG7aaEMj03Sis RVdzs/h8cumbQ== From: AngeloGioacchino Del Regno To: boris.brezillon@collabora.com Cc: robh@kernel.org, steven.price@arm.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, daniel@ffwll.ch, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, wenst@chromium.org, AngeloGioacchino Del Regno , kernel@collabora.com Subject: [PATCH 2/4] drm/panfrost: Set clocks on/off during system sleep on MediaTek SoCs Date: Mon, 30 Oct 2023 14:22:55 +0100 Message-ID: <20231030132257.85379-3-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231030132257.85379-1-angelogioacchino.delregno@collabora.com> References: <20231030132257.85379-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" All of the MediaTek SoCs supported by Panfrost can switch the clocks off and on during system sleep to save some power without any user experience penalty. Measurements taken on multiple MediaTek SoCs show that adding this will not prolong the time that is required to resume the system in any meaningful way. As an example, for MT8195 - a "before" with only runtime PM operations (so, without turning on/off GPU clocks), and an "after" executing full system sleep .resume() handler (.resume() -> .runtime_resume() -> done): Average Panfrost-only system sleep resume time, before: 110372ns Average Panfrost-only system sleep resume time, after: 114186ns Signed-off-by: AngeloGioacchino Del Regno --- drivers/gpu/drm/panfrost/panfrost_drv.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panf= rost/panfrost_drv.c index 7cabf4e3d1f2..82f3c5fe9c58 100644 --- a/drivers/gpu/drm/panfrost/panfrost_drv.c +++ b/drivers/gpu/drm/panfrost/panfrost_drv.c @@ -734,6 +734,7 @@ static const struct panfrost_compatible mediatek_mt8183= _b_data =3D { .supply_names =3D mediatek_mt8183_b_supplies, .num_pm_domains =3D ARRAY_SIZE(mediatek_mt8183_pm_domains), .pm_domain_names =3D mediatek_mt8183_pm_domains, + .pm_features =3D BIT(GPU_PM_CLK_DIS), }; =20 static const char * const mediatek_mt8186_pm_domains[] =3D { "core0", "cor= e1" }; @@ -742,6 +743,7 @@ static const struct panfrost_compatible mediatek_mt8186= _data =3D { .supply_names =3D mediatek_mt8183_b_supplies, .num_pm_domains =3D ARRAY_SIZE(mediatek_mt8186_pm_domains), .pm_domain_names =3D mediatek_mt8186_pm_domains, + .pm_features =3D BIT(GPU_PM_CLK_DIS), }; =20 static const char * const mediatek_mt8192_supplies[] =3D { "mali", NULL }; @@ -752,6 +754,7 @@ static const struct panfrost_compatible mediatek_mt8192= _data =3D { .supply_names =3D mediatek_mt8192_supplies, .num_pm_domains =3D ARRAY_SIZE(mediatek_mt8192_pm_domains), .pm_domain_names =3D mediatek_mt8192_pm_domains, + .pm_features =3D BIT(GPU_PM_CLK_DIS), }; =20 static const struct of_device_id dt_match[] =3D { --=20 2.42.0