From nobody Wed Dec 31 19:43:58 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9ADF6C4332F for ; Mon, 30 Oct 2023 13:23:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233380AbjJ3NXM (ORCPT ); Mon, 30 Oct 2023 09:23:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48898 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233330AbjJ3NXK (ORCPT ); Mon, 30 Oct 2023 09:23:10 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4C31BC9 for ; Mon, 30 Oct 2023 06:23:07 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 2A36666071A3; Mon, 30 Oct 2023 13:23:05 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1698672185; bh=AvtbfwF1Dmoz5okZm1OJr62qdbxZQHDDeV3MBvNQHDk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=PVBeFqRDwChS2uhD3feHK5NVM89UDT9+59Sdv/6XzOgefi6zsWF3gZ2vkz4hzWdMs Q5whdviz4xJ1Ty/S6e77JfwW8tV8wM53KOUilxbX3UPQCPdRpMyV3VrzC7V5WtYg5r lFnH/Pxovy6eEg1o/9DLvhNEdILT+gB+H1Fbvb3h6F14UBI0uHd/RKn6hytfkSHiRW pdzKpJ8s0uhL1moAk36RO725w3l8LgkYJ37cBf51KXkm3drCwHY0Z0EZ9LDcZ/MJgs IflFWu1YigiV+KltxuV9XDXqR1zHBrkmjRjyXs5elYMQYSMABz76iFYDJpIDt2/z56 BaUqEaxoouiGQ== From: AngeloGioacchino Del Regno To: boris.brezillon@collabora.com Cc: robh@kernel.org, steven.price@arm.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, daniel@ffwll.ch, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, wenst@chromium.org, AngeloGioacchino Del Regno , kernel@collabora.com Subject: [PATCH 1/4] drm/panfrost: Implement ability to turn on/off GPU clocks in suspend Date: Mon, 30 Oct 2023 14:22:54 +0100 Message-ID: <20231030132257.85379-2-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231030132257.85379-1-angelogioacchino.delregno@collabora.com> References: <20231030132257.85379-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Currently, the GPU is being internally powered off for runtime suspend and turned back on for runtime resume through commands sent to it, but note that the GPU doesn't need to be clocked during the poweroff state, hence it is possible to save some power on selected platforms. Add suspend and resume handlers for full system sleep and then add a new panfrost_gpu_pm enumeration and a pm_features variable in the panfrost_compatible structure: BIT(GPU_PM_CLK_DIS) will be used to enable this power saving technique only on SoCs that are able to safely use it. Note that this was implemented only for the system sleep case and not for runtime PM because testing on one of my MediaTek platforms showed issues when turning on and off clocks aggressively (in PM runtime), with the GPU locking up and unable to soft reset, eventually resulting in a full system lockup. Doing this only for full system sleep never showed issues in 3 days of testing by suspending and resuming the system continuously. Signed-off-by: AngeloGioacchino Del Regno --- drivers/gpu/drm/panfrost/panfrost_device.c | 61 ++++++++++++++++++++-- drivers/gpu/drm/panfrost/panfrost_device.h | 11 ++++ 2 files changed, 68 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/p= anfrost/panfrost_device.c index 28f7046e1b1a..2022ed76a620 100644 --- a/drivers/gpu/drm/panfrost/panfrost_device.c +++ b/drivers/gpu/drm/panfrost/panfrost_device.c @@ -403,7 +403,7 @@ void panfrost_device_reset(struct panfrost_device *pfde= v) panfrost_job_enable_interrupts(pfdev); } =20 -static int panfrost_device_resume(struct device *dev) +static int panfrost_device_runtime_resume(struct device *dev) { struct panfrost_device *pfdev =3D dev_get_drvdata(dev); =20 @@ -413,7 +413,7 @@ static int panfrost_device_resume(struct device *dev) return 0; } =20 -static int panfrost_device_suspend(struct device *dev) +static int panfrost_device_runtime_suspend(struct device *dev) { struct panfrost_device *pfdev =3D dev_get_drvdata(dev); =20 @@ -426,5 +426,58 @@ static int panfrost_device_suspend(struct device *dev) return 0; } =20 -EXPORT_GPL_RUNTIME_DEV_PM_OPS(panfrost_pm_ops, panfrost_device_suspend, - panfrost_device_resume, NULL); +static int panfrost_device_resume(struct device *dev) +{ + struct panfrost_device *pfdev =3D dev_get_drvdata(dev); + int ret; + + if (pfdev->comp->pm_features & BIT(GPU_PM_CLK_DIS)) { + ret =3D clk_enable(pfdev->clock); + if (ret) + return ret; + + if (pfdev->bus_clock) { + ret =3D clk_enable(pfdev->bus_clock); + if (ret) + goto err_bus_clk; + } + } + + ret =3D pm_runtime_force_resume(dev); + if (ret) + goto err_resume; + + return 0; + +err_resume: + if (pfdev->comp->pm_features & BIT(GPU_PM_CLK_DIS) && pfdev->bus_clock) + clk_disable(pfdev->bus_clock); +err_bus_clk: + if (pfdev->comp->pm_features & BIT(GPU_PM_CLK_DIS)) + clk_disable(pfdev->clock); + return ret; +} + +static int panfrost_device_suspend(struct device *dev) +{ + struct panfrost_device *pfdev =3D dev_get_drvdata(dev); + int ret; + + ret =3D pm_runtime_force_suspend(dev); + if (ret) + return ret; + + if (pfdev->comp->pm_features & BIT(GPU_PM_CLK_DIS)) { + clk_disable(pfdev->clock); + + if (pfdev->bus_clock) + clk_disable(pfdev->bus_clock); + } + + return 0; +} + +EXPORT_GPL_DEV_PM_OPS(panfrost_pm_ops) =3D { + RUNTIME_PM_OPS(panfrost_device_runtime_suspend, panfrost_device_runtime_r= esume, NULL) + SYSTEM_SLEEP_PM_OPS(panfrost_device_suspend, panfrost_device_resume) +}; diff --git a/drivers/gpu/drm/panfrost/panfrost_device.h b/drivers/gpu/drm/p= anfrost/panfrost_device.h index 1ef38f60d5dc..d7f179eb8ea3 100644 --- a/drivers/gpu/drm/panfrost/panfrost_device.h +++ b/drivers/gpu/drm/panfrost/panfrost_device.h @@ -25,6 +25,14 @@ struct panfrost_perfcnt; #define NUM_JOB_SLOTS 3 #define MAX_PM_DOMAINS 5 =20 +/** + * enum panfrost_gpu_pm - Supported kernel power management features + * @GPU_PM_CLK_DIS: Allow disabling clocks during system suspend + */ +enum panfrost_gpu_pm { + GPU_PM_CLK_DIS, +}; + struct panfrost_features { u16 id; u16 revision; @@ -75,6 +83,9 @@ struct panfrost_compatible { =20 /* Vendor implementation quirks callback */ void (*vendor_quirk)(struct panfrost_device *pfdev); + + /* Allowed PM features */ + u8 pm_features; }; =20 struct panfrost_device { --=20 2.42.0 From nobody Wed Dec 31 19:43:58 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 758A8C4332F for ; Mon, 30 Oct 2023 13:23:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233399AbjJ3NXP (ORCPT ); Mon, 30 Oct 2023 09:23:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48904 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232176AbjJ3NXL (ORCPT ); Mon, 30 Oct 2023 09:23:11 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DAD7DD3 for ; Mon, 30 Oct 2023 06:23:07 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 015CB6607385; Mon, 30 Oct 2023 13:23:05 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1698672186; bh=yXt8niUpqio+gdmTqqnUMTPMyUgKwAIOi8EGaWco710=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=IVDlq/FH4jjavt2ZWDKJiwXMVrsY7GhFgmBhj8euDGbAEmhbJ4VOMYgv+1wgCuvY8 cyfrR/+fLcJF2I093OA/i31G2bzz1MZmUJ8FuVU1jjPXiN0/wMQIY4mWc5E0w1BVIT wOTNjiKI3GZSP7YXpyo6x0g24p+vVLRFjaXh4P7lQR6KgqhyyfRyFfTjRfPndcDCpb qXMJCE0mg/sWIF38T8uO8hQH7mJEZKFF0YEZSI/40KFCuaoZc+yQ43U1zc573Mkai0 m7tg0HW/F6daZi2V83r096hgAGFr4o7P5FxZdHxJs9ELtvOb3nicEeG7aaEMj03Sis RVdzs/h8cumbQ== From: AngeloGioacchino Del Regno To: boris.brezillon@collabora.com Cc: robh@kernel.org, steven.price@arm.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, daniel@ffwll.ch, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, wenst@chromium.org, AngeloGioacchino Del Regno , kernel@collabora.com Subject: [PATCH 2/4] drm/panfrost: Set clocks on/off during system sleep on MediaTek SoCs Date: Mon, 30 Oct 2023 14:22:55 +0100 Message-ID: <20231030132257.85379-3-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231030132257.85379-1-angelogioacchino.delregno@collabora.com> References: <20231030132257.85379-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" All of the MediaTek SoCs supported by Panfrost can switch the clocks off and on during system sleep to save some power without any user experience penalty. Measurements taken on multiple MediaTek SoCs show that adding this will not prolong the time that is required to resume the system in any meaningful way. As an example, for MT8195 - a "before" with only runtime PM operations (so, without turning on/off GPU clocks), and an "after" executing full system sleep .resume() handler (.resume() -> .runtime_resume() -> done): Average Panfrost-only system sleep resume time, before: 110372ns Average Panfrost-only system sleep resume time, after: 114186ns Signed-off-by: AngeloGioacchino Del Regno --- drivers/gpu/drm/panfrost/panfrost_drv.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panf= rost/panfrost_drv.c index 7cabf4e3d1f2..82f3c5fe9c58 100644 --- a/drivers/gpu/drm/panfrost/panfrost_drv.c +++ b/drivers/gpu/drm/panfrost/panfrost_drv.c @@ -734,6 +734,7 @@ static const struct panfrost_compatible mediatek_mt8183= _b_data =3D { .supply_names =3D mediatek_mt8183_b_supplies, .num_pm_domains =3D ARRAY_SIZE(mediatek_mt8183_pm_domains), .pm_domain_names =3D mediatek_mt8183_pm_domains, + .pm_features =3D BIT(GPU_PM_CLK_DIS), }; =20 static const char * const mediatek_mt8186_pm_domains[] =3D { "core0", "cor= e1" }; @@ -742,6 +743,7 @@ static const struct panfrost_compatible mediatek_mt8186= _data =3D { .supply_names =3D mediatek_mt8183_b_supplies, .num_pm_domains =3D ARRAY_SIZE(mediatek_mt8186_pm_domains), .pm_domain_names =3D mediatek_mt8186_pm_domains, + .pm_features =3D BIT(GPU_PM_CLK_DIS), }; =20 static const char * const mediatek_mt8192_supplies[] =3D { "mali", NULL }; @@ -752,6 +754,7 @@ static const struct panfrost_compatible mediatek_mt8192= _data =3D { .supply_names =3D mediatek_mt8192_supplies, .num_pm_domains =3D ARRAY_SIZE(mediatek_mt8192_pm_domains), .pm_domain_names =3D mediatek_mt8192_pm_domains, + .pm_features =3D BIT(GPU_PM_CLK_DIS), }; =20 static const struct of_device_id dt_match[] =3D { --=20 2.42.0 From nobody Wed Dec 31 19:43:58 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 58D4AC4332F for ; Mon, 30 Oct 2023 13:23:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233396AbjJ3NXS (ORCPT ); Mon, 30 Oct 2023 09:23:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48936 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233384AbjJ3NXL (ORCPT ); Mon, 30 Oct 2023 09:23:11 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A996BD6 for ; Mon, 30 Oct 2023 06:23:08 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id CC49E6607388; Mon, 30 Oct 2023 13:23:06 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1698672187; bh=3dUd841wLvR/syQt4DasoXOByTVGgSmSqikDkfeYRv4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ayouEfh8u3VjZQoJfUNqaL1sbnU0XUvwScA51bRYXidoKUIU/WrrDyTxp2rZzk/LP Lz6bliSbO/x++VGiLXTCQ6ZzPXf3YDlOvkarhJwtIUppx4ey32GL7oOqNi1TOMzNXD xdnxo2z4Eufu3n2Vcn8p63HOxr1zZPjlw6FbbLFRgPQno90w/DyNpCW2rTf5mBCj6p 8jRURbNTgJPcaYq7LiGcCknoQgGcfBP5X46xsGHN32maWsaCVY03uaeyKsHbG/vaRu B3u2Kt3FUjSW/1Bt6Ab9yNw984J1Psqv1J9ea8BC6R50iiYkFSkgYFaKqef0zf1OWs IUzLvoG0fQ7Rg== From: AngeloGioacchino Del Regno To: boris.brezillon@collabora.com Cc: robh@kernel.org, steven.price@arm.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, daniel@ffwll.ch, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, wenst@chromium.org, AngeloGioacchino Del Regno , kernel@collabora.com Subject: [PATCH 3/4] drm/panfrost: Implement ability to turn on/off regulators in suspend Date: Mon, 30 Oct 2023 14:22:56 +0100 Message-ID: <20231030132257.85379-4-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231030132257.85379-1-angelogioacchino.delregno@collabora.com> References: <20231030132257.85379-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Some platforms/SoCs can power off the GPU entirely by completely cutting off power, greatly enhancing battery time during system suspend: add a new pm_feature GPU_PM_VREG_OFF to allow turning off the GPU regulators during full suspend only on selected platforms. Signed-off-by: AngeloGioacchino Del Regno --- drivers/gpu/drm/panfrost/panfrost_device.c | 19 ++++++++++++++++++- drivers/gpu/drm/panfrost/panfrost_device.h | 2 ++ 2 files changed, 20 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/p= anfrost/panfrost_device.c index 2022ed76a620..51b22eb0971d 100644 --- a/drivers/gpu/drm/panfrost/panfrost_device.c +++ b/drivers/gpu/drm/panfrost/panfrost_device.c @@ -431,10 +431,21 @@ static int panfrost_device_resume(struct device *dev) struct panfrost_device *pfdev =3D dev_get_drvdata(dev); int ret; =20 + if (pfdev->comp->pm_features & BIT(GPU_PM_VREG_OFF)) { + unsigned long freq =3D pfdev->pfdevfreq.fast_rate; + struct dev_pm_opp *opp; + + opp =3D dev_pm_opp_find_freq_ceil(dev, &freq); + if (IS_ERR(opp)) + return PTR_ERR(opp); + dev_pm_opp_put(opp); + dev_pm_opp_set_opp(dev, opp); + } + if (pfdev->comp->pm_features & BIT(GPU_PM_CLK_DIS)) { ret =3D clk_enable(pfdev->clock); if (ret) - return ret; + goto err_clk; =20 if (pfdev->bus_clock) { ret =3D clk_enable(pfdev->bus_clock); @@ -455,6 +466,9 @@ static int panfrost_device_resume(struct device *dev) err_bus_clk: if (pfdev->comp->pm_features & BIT(GPU_PM_CLK_DIS)) clk_disable(pfdev->clock); +err_clk: + if (pfdev->comp->pm_features & BIT(GPU_PM_VREG_OFF)) + dev_pm_opp_set_opp(dev, NULL); return ret; } =20 @@ -474,6 +488,9 @@ static int panfrost_device_suspend(struct device *dev) clk_disable(pfdev->bus_clock); } =20 + if (pfdev->comp->pm_features & BIT(GPU_PM_VREG_OFF)) + dev_pm_opp_set_opp(dev, NULL); + return 0; } =20 diff --git a/drivers/gpu/drm/panfrost/panfrost_device.h b/drivers/gpu/drm/p= anfrost/panfrost_device.h index d7f179eb8ea3..0fc558db6bfd 100644 --- a/drivers/gpu/drm/panfrost/panfrost_device.h +++ b/drivers/gpu/drm/panfrost/panfrost_device.h @@ -28,9 +28,11 @@ struct panfrost_perfcnt; /** * enum panfrost_gpu_pm - Supported kernel power management features * @GPU_PM_CLK_DIS: Allow disabling clocks during system suspend + * @GPU_PM_VREG_OFF: Allow turning off regulators during system suspend */ enum panfrost_gpu_pm { GPU_PM_CLK_DIS, + GPU_PM_VREG_OFF, }; =20 struct panfrost_features { --=20 2.42.0 From nobody Wed Dec 31 19:43:58 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2C3B3C4332F for ; Mon, 30 Oct 2023 13:23:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233424AbjJ3NXU (ORCPT ); Mon, 30 Oct 2023 09:23:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48942 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233391AbjJ3NXM (ORCPT ); Mon, 30 Oct 2023 09:23:12 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8AE55C9 for ; Mon, 30 Oct 2023 06:23:09 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id A6ED16607389; Mon, 30 Oct 2023 13:23:07 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1698672188; bh=Rs2Tz2duxz0x7ijP2hn/7R66LzyseqbsHizTc5CA0MU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dANsBif0cystNlFAFmjXOVWt1FQRW4An0MoKDZ1S/uaiNZ4O5spk4rfppG/x8r8ZC w4tfGGx2x5WQi4a+9dOnwBqJ1b2Vz3nC6QLcAytkxYiFN6nxgxMZlqByhd1TAeHVs0 TrXbu20VSWk/KaHTMNAYBuysmkNRFUpkPj6a2IswsVzE9sWSgYsF/CIwMPaFHT7XiO PHYI50bSQtQEaOdnDSjjMsZiLxMYF2sbwCtOuax1v1kTNMZiaPjuomZuID/Sj9NCbH SOoEfMCgmQpGtcAoSHiU8NBzpozL3UJfLmsjFNM5o3m39LeCnYmWJ15/Hh21ERC1BX 7iKtkLTr0vk+g== From: AngeloGioacchino Del Regno To: boris.brezillon@collabora.com Cc: robh@kernel.org, steven.price@arm.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, daniel@ffwll.ch, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, wenst@chromium.org, AngeloGioacchino Del Regno , kernel@collabora.com Subject: [PATCH 4/4] drm/panfrost: Set regulators on/off during system sleep on MediaTek SoCs Date: Mon, 30 Oct 2023 14:22:57 +0100 Message-ID: <20231030132257.85379-5-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231030132257.85379-1-angelogioacchino.delregno@collabora.com> References: <20231030132257.85379-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" All of the MediaTek SoCs supported by Panfrost can completely cut power to the GPU during full system sleep without any user-noticeable delay in the resume operation, as shown by measurements taken on multiple MediaTek SoCs. As an example, for MT8195 - a "before" with only runtime PM operations (so, without turning on/off regulators), and an "after" executing full system sleep .resume() handler (.resume() -> .runtime_resume() -> done): Average Panfrost-only system sleep resume time, before: 114186ns Average Panfrost-only system sleep resume time, after: 189684ns Keep in mind that this additional ~0,075ms delay happens only in resume from a full system suspend, and not in runtime PM operations, hence it is acceptable. Signed-off-by: AngeloGioacchino Del Regno --- drivers/gpu/drm/panfrost/panfrost_drv.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panf= rost/panfrost_drv.c index 82f3c5fe9c58..f63382d9ab04 100644 --- a/drivers/gpu/drm/panfrost/panfrost_drv.c +++ b/drivers/gpu/drm/panfrost/panfrost_drv.c @@ -734,7 +734,7 @@ static const struct panfrost_compatible mediatek_mt8183= _b_data =3D { .supply_names =3D mediatek_mt8183_b_supplies, .num_pm_domains =3D ARRAY_SIZE(mediatek_mt8183_pm_domains), .pm_domain_names =3D mediatek_mt8183_pm_domains, - .pm_features =3D BIT(GPU_PM_CLK_DIS), + .pm_features =3D BIT(GPU_PM_CLK_DIS) | BIT(GPU_PM_VREG_OFF), }; =20 static const char * const mediatek_mt8186_pm_domains[] =3D { "core0", "cor= e1" }; @@ -743,7 +743,7 @@ static const struct panfrost_compatible mediatek_mt8186= _data =3D { .supply_names =3D mediatek_mt8183_b_supplies, .num_pm_domains =3D ARRAY_SIZE(mediatek_mt8186_pm_domains), .pm_domain_names =3D mediatek_mt8186_pm_domains, - .pm_features =3D BIT(GPU_PM_CLK_DIS), + .pm_features =3D BIT(GPU_PM_CLK_DIS) | BIT(GPU_PM_VREG_OFF), }; =20 static const char * const mediatek_mt8192_supplies[] =3D { "mali", NULL }; @@ -754,7 +754,7 @@ static const struct panfrost_compatible mediatek_mt8192= _data =3D { .supply_names =3D mediatek_mt8192_supplies, .num_pm_domains =3D ARRAY_SIZE(mediatek_mt8192_pm_domains), .pm_domain_names =3D mediatek_mt8192_pm_domains, - .pm_features =3D BIT(GPU_PM_CLK_DIS), + .pm_features =3D BIT(GPU_PM_CLK_DIS) | BIT(GPU_PM_VREG_OFF), }; =20 static const struct of_device_id dt_match[] =3D { --=20 2.42.0