From nobody Wed Dec 31 20:14:03 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 10543C4332F for ; Mon, 30 Oct 2023 07:01:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231599AbjJ3HBg (ORCPT ); Mon, 30 Oct 2023 03:01:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39480 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231612AbjJ3HBb (ORCPT ); Mon, 30 Oct 2023 03:01:31 -0400 Received: from outboundhk.mxmail.xiaomi.com (outboundhk.mxmail.xiaomi.com [207.226.244.122]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 2806CC4 for ; Mon, 30 Oct 2023 00:01:25 -0700 (PDT) X-IronPort-AV: E=Sophos;i="6.03,262,1694707200"; d="scan'208";a="94799117" From: Fang Xiang To: , , , CC: Subject: [PATCH v3] irqchip/gic-v3-its: Flush ITS tables before writing GITS_BASER registers in non-coherent GIC designs. Date: Mon, 30 Oct 2023 15:00:20 +0800 Message-ID: <20231030070020.3689-1-fangxiang3@xiaomi.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.237.8.18] X-ClientProxiedBy: BJ-MBX15.mioffice.cn (10.237.8.135) To BJ-MBX15.mioffice.cn (10.237.8.135) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" In non-coherent GIC design, ITS tables should be clean and flushed to the PoV of the ITS before writing GITS_BASER registers, otherwise the ITS would read dirty tables and lead to UNPREDICTABLE behaviors. The ITS always got clean tables in initialization with this fix, by observing the signals from GIC. Furthermore, hoist the quirked non-shareable attributes earlier to save effort in tables setup. Signed-off-by: Marc Zyngier Signed-off-by: Fang Xiang Tested-by: Fang Xiang Link to v2: https://lore.kernel.org/all/20231027031007.2088-1-fangxiang3@xiaomi.com/ Link to v1: https://lore.kernel.org/all/20231026020116.4238-1-fangxiang3@xiaomi.com/ v2 -> v3: - Add 'Signed-off-by' trailer for original author Marc - Expand commit message with testing result v1 -> v2: - Flush ITS tables before writing GITS_BASER registers - Hoist the quirked non-shareable attributes earlier --- drivers/irqchip/irq-gic-v3-its.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-= its.c index 75a2dd550625..d76d44ea2de1 100644 --- a/drivers/irqchip/irq-gic-v3-its.c +++ b/drivers/irqchip/irq-gic-v3-its.c @@ -2379,12 +2379,12 @@ static int its_setup_baser(struct its_node *its, st= ruct its_baser *baser, break; } =20 + if (!shr) + gic_flush_dcache_to_poc(base, PAGE_ORDER_TO_SIZE(order)); + its_write_baser(its, baser, val); tmp =3D baser->val; =20 - if (its->flags & ITS_FLAGS_FORCE_NON_SHAREABLE) - tmp &=3D ~GITS_BASER_SHAREABILITY_MASK; - if ((val ^ tmp) & GITS_BASER_SHAREABILITY_MASK) { /* * Shareability didn't stick. Just use @@ -2394,10 +2394,9 @@ static int its_setup_baser(struct its_node *its, str= uct its_baser *baser, * non-cacheable as well. */ shr =3D tmp & GITS_BASER_SHAREABILITY_MASK; - if (!shr) { + if (!shr) cache =3D GITS_BASER_nC; - gic_flush_dcache_to_poc(base, PAGE_ORDER_TO_SIZE(order)); - } + goto retry_baser; } =20 @@ -2609,6 +2608,11 @@ static int its_alloc_tables(struct its_node *its) /* erratum 24313: ignore memory access type */ cache =3D GITS_BASER_nCnB; =20 + if (its->flags & ITS_FLAGS_FORCE_NON_SHAREABLE) { + cache =3D GITS_BASER_nC; + shr =3D 0; + } + for (i =3D 0; i < GITS_BASER_NR_REGS; i++) { struct its_baser *baser =3D its->tables + i; u64 val =3D its_read_baser(its, baser); --=20 2.34.1