From nobody Wed Dec 17 08:12:14 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2E3FCC25B67 for ; Fri, 27 Oct 2023 09:40:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345612AbjJ0JkH (ORCPT ); Fri, 27 Oct 2023 05:40:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59416 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231461AbjJ0JkE (ORCPT ); Fri, 27 Oct 2023 05:40:04 -0400 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 666A29C; Fri, 27 Oct 2023 02:40:02 -0700 (PDT) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 39R9drA6008704; Fri, 27 Oct 2023 04:39:53 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1698399593; bh=y2HnaShG1My+Rhxm7MXQ+jmvrrByF13Z+nsGkazdRWU=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=TvEQYPspN4O3ug9Yo9H5h/E+l/7BzY1f5MY3lfQd27c4xzFNR6GlGjcAJptOhdli6 15W5C71c9l+X+LpwufdAegsMk/BGjUn06vYwLp9zmTGGtOav7Sys1rV6HF+xPjnT7a jurAJWKYMG4uQIZE98VbvF2k8KKbyVlfnB2pCzts= Received: from DFLE115.ent.ti.com (dfle115.ent.ti.com [10.64.6.36]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 39R9dqd3047440 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 27 Oct 2023 04:39:53 -0500 Received: from DFLE109.ent.ti.com (10.64.6.30) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Fri, 27 Oct 2023 04:39:52 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Fri, 27 Oct 2023 04:39:52 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 39R9dpJI075082; Fri, 27 Oct 2023 04:39:52 -0500 From: Nitin Yadav To: , , , , , CC: , , Subject: [PATCH 1/2] arm64: dts: ti: k3-am62a-main: Add sdhci0 instance Date: Fri, 27 Oct 2023 15:09:49 +0530 Message-ID: <20231027093950.1202549-2-n-yadav@ti.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231027093950.1202549-1-n-yadav@ti.com> References: <20231027093950.1202549-1-n-yadav@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add sdhci0 DT node in k3-am62a-main for eMMC support. Droping ITAP values as they are NA in datasheet[0] for lower speed modes. Add mmc0 alias for sdhci0 in k3-am62a7-sk.dts. [0]https://www.ti.com/lit/gpn/am62a3 Table: 7-79 (Page No. 179) Signed-off-by: Nitin Yadav --- arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 19 +++++++++++++++++++ arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 1 + 2 files changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dt= s/ti/k3-am62a-main.dtsi index de36abb243f1..89b8b7d302cd 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi @@ -488,6 +488,25 @@ main_gpio1: gpio@601000 { status =3D "disabled"; }; =20 + sdhci0: mmc@fa10000 { + compatible =3D "ti,am62-sdhci"; + reg =3D <0x00 0xfa10000 0x00 0x260>, <0x00 0xfa18000 0x00 0x134>; + interrupts =3D ; + power-domains =3D <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>; + clocks =3D <&k3_clks 57 5>, <&k3_clks 57 6>; + clock-names =3D "clk_ahb", "clk_xin"; + assigned-clocks =3D <&k3_clks 57 6>; + assigned-clock-parents =3D <&k3_clks 57 8>; + mmc-hs200-1_8v; + ti,trm-icp =3D <0x2>; + ti,otap-del-sel-legacy =3D <0x0>; + ti,otap-del-sel-mmc-hs =3D <0x0>; + ti,otap-del-sel-hs200 =3D <0x6>; + bus-width =3D <8>; + ti,clkbuf-sel =3D <0x7>; + status =3D "disabled"; + }; + sdhci1: mmc@fa00000 { compatible =3D "ti,am62-sdhci"; reg =3D <0x00 0xfa00000 0x00 0x260>, <0x00 0xfa08000 0x00 0x134>; diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/= ti/k3-am62a7-sk.dts index cff283c75f8e..5d28c390b28e 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts @@ -20,6 +20,7 @@ aliases { serial0 =3D &wkup_uart0; serial2 =3D &main_uart0; serial3 =3D &main_uart1; + mmc0 =3D &sdhci0; mmc1 =3D &sdhci1; }; =20 --=20 2.25.1 From nobody Wed Dec 17 08:12:14 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4E1D3C25B67 for ; Fri, 27 Oct 2023 09:40:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345657AbjJ0JkJ (ORCPT ); Fri, 27 Oct 2023 05:40:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59426 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229503AbjJ0JkE (ORCPT ); Fri, 27 Oct 2023 05:40:04 -0400 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6697ACE; Fri, 27 Oct 2023 02:40:02 -0700 (PDT) Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 39R9dsR0008709; Fri, 27 Oct 2023 04:39:54 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1698399594; bh=0WxedLojY6wNJBa4g9+h9AlfhSUeJJ1XYerTxtOZric=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=RObeZZPURXAQA/byWjIlOe4hj6MQi2UjQORtOUvnfqecmiSpDufG85ZR0QAMkCX/S YGd8MScacXn51Y094T+ElnWC+0Z1KnfNrE/EawIiEaVNidCMqG9Nbhy+ixvYg9brsy MbxdQoz267Bq+h1YmTg99+IaGYadufAUJFampvsM= Received: from DLEE100.ent.ti.com (dlee100.ent.ti.com [157.170.170.30]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 39R9dsZE052573 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 27 Oct 2023 04:39:54 -0500 Received: from DLEE106.ent.ti.com (157.170.170.36) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Fri, 27 Oct 2023 04:39:54 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE106.ent.ti.com (157.170.170.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Fri, 27 Oct 2023 04:39:54 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 39R9drYe030842; Fri, 27 Oct 2023 04:39:53 -0500 From: Nitin Yadav To: , , , , , CC: , , Subject: [PATCH 2/2] arm64: dts: ti: k3-am62a7-sk: Enable eMMC support Date: Fri, 27 Oct 2023 15:09:50 +0530 Message-ID: <20231027093950.1202549-3-n-yadav@ti.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231027093950.1202549-1-n-yadav@ti.com> References: <20231027093950.1202549-1-n-yadav@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add support for 32GB eMMC card on AM62A7. Includes adding mmc0 pins settings and set sdhci0 status to okay. Signed-off-by: Nitin Yadav --- arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/= ti/k3-am62a7-sk.dts index 5d28c390b28e..c6f144d91734 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts @@ -173,6 +173,22 @@ AM62AX_IOPAD(0x0b4, PIN_INPUT_PULLUP, 1) /* (K24) GPMC= 0_CSn3.I2C2_SDA */ >; }; =20 + main_mmc0_pins_default: main-mmc0-default-pins { + pinctrl-single,pins =3D < + AM62AX_IOPAD(0x220, PIN_INPUT, 0) /* (Y3) MMC0_CMD */ + AM62AX_IOPAD(0x218, PIN_INPUT, 0) /* (AB1) MMC0_CLKLB */ + AM62AX_IOPAD(0x21c, PIN_INPUT, 0) /* (AB1) MMC0_CLK */ + AM62AX_IOPAD(0x214, PIN_INPUT, 0) /* (AA2) MMC0_DAT0 */ + AM62AX_IOPAD(0x210, PIN_INPUT_PULLUP, 0) /* (AA1) MMC0_DAT1 */ + AM62AX_IOPAD(0x20c, PIN_INPUT_PULLUP, 0) /* (AA3) MMC0_DAT2 */ + AM62AX_IOPAD(0x208, PIN_INPUT_PULLUP, 0) /* (Y4) MMC0_DAT3 */ + AM62AX_IOPAD(0x204, PIN_INPUT_PULLUP, 0) /* (AB2) MMC0_DAT4 */ + AM62AX_IOPAD(0x200, PIN_INPUT_PULLUP, 0) /* (AC1) MMC0_DAT5 */ + AM62AX_IOPAD(0x1fc, PIN_INPUT_PULLUP, 0) /* (AD2) MMC0_DAT6 */ + AM62AX_IOPAD(0x1f8, PIN_INPUT_PULLUP, 0) /* (AC2) MMC0_DAT7 */ + >; + }; + main_mmc1_pins_default: main-mmc1-default-pins { pinctrl-single,pins =3D < AM62AX_IOPAD(0x23c, PIN_INPUT, 0) /* (A21) MMC1_CMD */ @@ -362,3 +378,11 @@ cpsw3g_phy0: ethernet-phy@0 { ti,min-output-impedance; }; }; + +&sdhci0 { + status =3D "okay"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&main_mmc0_pins_default>; + ti,driver-strength-ohm =3D <50>; + disable-wp; +}; --=20 2.25.1